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152 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5826e2843a Inline pop/push functions 
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
 2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
c26d9d563c Missed include file 2008-04-04 21:10:30 +00:00
Stanislav Shwartsman
3f5263a142 Compilation fixes that allow to disable FPU by just setting BX_SUPPORT_FPU=0 2008-04-04 21:05:37 +00:00
Stanislav Shwartsman
bb1195f1e6 move denormals_are_zeros to fpu_specialize.h 2008-04-04 20:02:36 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
917a040cc4 Fixed more VCPP2008 warnings 2007-12-26 18:39:15 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
e51184c8cf Eliminate saving of RSP from heart of cpu_loop 
Now save RSP only where it is really required
 2007-11-24 14:22:34 +00:00
Stanislav Shwartsman
754e43baed FOO is 11 bit only field 2007-10-30 18:52:25 +00:00
Stanislav Shwartsman
d30a0d3699 warning fixes 2007-10-24 23:29:40 +00:00
Stanislav Shwartsman
42fdd8a3a1 During Bochs benchmarking I figured out that hostasm actually slow down the emulation ... so remove this ugly code which also doesn't help :) 
speedup flags update for some instructions - idea was taken from DT patch by h.johansson
 2007-10-21 22:07:33 +00:00
Stanislav Shwartsman
efbcc99e9a get rid of ugly do/while(0) construction 2007-09-14 19:39:11 +00:00
Stanislav Shwartsman
9612691aad Debug print changed to look a bit better 2007-09-11 13:11:03 +00:00
Stanislav Shwartsman
412eeeeb7c Get crregs definition to separate file from cpu.h 2007-09-10 16:00:15 +00:00
Stanislav Shwartsman
38d1f39c77 Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation 2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
5189cfbf10 SSE4 support 2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
b6c8275cfd remove old PIT model and always use Greg Alexander's new one 2007-04-08 21:57:06 +00:00
Stanislav Shwartsman
1ab3297115 FCOMI are P6 instructions 2007-04-02 10:46:57 +00:00
Stanislav Shwartsman
26f08fdb2c Change my e-mail to #SF one 2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
c7e732fc8c Merged patch from #SF site tracker 2006-09-08 11:26:04 +00:00
Stanislav Shwartsman
ea1127f235 Correctly detect inexact result in FPU (patch by No Name) 2006-08-28 18:48:51 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use 
--enable-sse=3 instead (Stanislav Shwartsman)
 2006-02-20 19:28:57 +00:00
Stanislav Shwartsman
765951b1a5 Fix problem in FLDENV/FSTENV instructions 2006-01-29 17:37:23 +00:00
Stanislav Shwartsman
356cb066d4 Reverting back last commit from Kevin. 
Both Intel and AMD docs say that fldenv should fault on pending exceptions.
(#MF If an unmasked x87 floating-point exception was pending)
 2006-01-28 21:31:20 +00:00
Kevin Lawton
2b45a94893 fldenv does not fault on pending exceptions. Reversed the order of 
the checks.
 2006-01-28 20:52:08 +00:00
Kevin Lawton
88183335e9 Patch "info fpu": 
o uses FPRi instead of ST(i)" (which was not quite right, as ST(0) was not the FPR at the TOP but alwasy fpr0).
  o shows the TOP, and the tag as {s,d,e,?}.
 2006-01-21 00:05:30 +00:00
Stanislav Shwartsman
ab4367604c Fixed compilation error when fpu-enabled and cpu-level=3 2005-08-13 17:40:41 +00:00
Stanislav Shwartsman
afe3ff691d Another fix for FPU tag word restore in FXRESTOR instruction (the tags were assigned to incorrect registers) 
Fixed FPU print state status word printing (printed partial status instead of normal status word)
 2005-06-18 20:46:08 +00:00
Stanislav Shwartsman
d10731f162 Update my e-mail in source files 
Update committed SF patches in changes
 2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
e01789b276 Add CVS header for FPU files 2005-03-20 21:19:38 +00:00
Stanislav Shwartsman
c583a6f9cf move segments and descriptors definitions and macroses for new descriptor.h 2005-02-27 17:41:45 +00:00
Stanislav Shwartsman
f45316a2b1 Change possibly broken BX_MIN_BIT16S to its real value 2005-02-16 21:36:16 +00:00
Stanislav Shwartsman
acd1d8f14f Merged patch 
[1104695] msvc6 compatibility update (Royce Mitchell III)
 2005-01-19 18:21:40 +00:00
Volker Ruppert
02ae558db8 - removed old unused code designed for a save/restore feature 
- fixed pcidev targets in iodev/Makefile.in
- updated all Makefile dependencies using a default setup (.conf.linux).
  TODO: dependencies should be generated at compile time since they depend on
  the config settings
 2004-12-13 19:10:38 +00:00
Stanislav Shwartsman
1a6656ce91 Fixed compilation warnings (g++, -Wall) 
Improve speed and precision of FPATAN FPU instruction
 2004-11-04 22:41:24 +00:00
Stanislav Shwartsman
283f9ae5d2 Simplify cpu.h 
Speedup FYL2X and FYL2XP1 instructions
 2004-09-14 20:19:54 +00:00
Stanislav Shwartsman
a7eef1d526 Significanly improve accuracy of FYL2X and FYL2XP1 
Optimize FMUL instructions
 2004-07-31 20:19:38 +00:00
Stanislav Shwartsman
f9bd2b74be 1. Fixed bug in FSUB instruction 
2. Fixed bug

[ 989478 ] I-Cache and undefined Instruktions

The L4 microkernel uses an undefined instruction to
trap for a special requests into the kernel (LOCK NOP).
The handler fixes this up and gives the user a special
code page with syscall stubs. If you're not using the
I-Cache optimization everthing works find on bochs. But
if you enable the I-Cache (--enable-icache), then the
undefined opcode exception is thrown only once for ever
virtual address it occurs. See the demodisk of the
L4KA::pistachio
(http://www.l4ka.org/projects/pistachio/download.php).
In this case the pingpong benchmark of this demo is of
interest. Everything runs fine until the program tries
to spawn a new task for its measurements. This new task
shares the code of the creating program. But the new
task stops executing at the undefined instruction
explained above and no exception is thrown.
 2004-07-29 20:15:19 +00:00
Stanislav Shwartsman
8d1989fb25 Fix exceptions mismatch in FXTRACT instruction 2004-07-24 19:26:50 +00:00
Stanislav Shwartsman
50aaf8ec6f Implemented FFREEP 287+ compatability instruction 2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
79b1cfdc1c removed unused code 2004-07-12 19:20:55 +00:00
Stanislav Shwartsman
cc61e5d5d5 Leave aligment in floatx80 reg to compiler. 
CPU code no longer assume that floatx80 register is 16-byte aligned
 2004-07-02 20:24:47 +00:00
Stanislav Shwartsman
26664e8044 optimize 2004-06-26 12:35:48 +00:00