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112 Commits

Author SHA1 Message Date
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8e3276cf14 split opcodes by ModC0 2009-08-22 11:47:42 +00:00
Stanislav Shwartsman
a259ba7321 FPU2MMX again 2009-08-22 11:02:45 +00:00
Stanislav Shwartsman
7a75cad5ea FPU2MMX fixed 2009-08-20 19:53:05 +00:00
Stanislav Shwartsman
cfa3611a5f bugfixes, comment fixes, compilation fix in VMX 2009-06-20 20:39:51 +00:00
Stanislav Shwartsman
d5efb5c378 implemented biasing of unmasked x87 over/underflow result 2009-06-05 17:48:55 +00:00
Stanislav Shwartsman
a98a917c98 code cleanup 2009-05-28 20:18:34 +00:00
Stanislav Shwartsman
98d632c197 Fixed ROUNDxx opcodes 2009-05-21 11:44:59 +00:00
Stanislav Shwartsman
024d36fa12 x87: fixed C1 (rounding up) for overflow condition 2009-04-11 17:00:28 +00:00
Stanislav Shwartsman
08de514d9c code cleanup for future optimization 2009-03-10 21:43:11 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
489447ae57 Fixed FPU2MMX state transition - should be done only fater all memory faults already checked 2008-10-08 10:51:38 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
709d74728d Call #UD exception directly instead of UndefinedOpcode function - for future use 2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
ec1ff39a5f Splitted memory access methods for 32 and 64-bit code. 
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
 2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
affbdbefb4 do not cause tranition to MMX state if no MMX reg touched 2008-04-29 21:47:16 +00:00
Stanislav Shwartsman
57a8e24615 Fixed REOUNDPS/PD/SS/SD 2008-04-20 14:10:44 +00:00
Stanislav Shwartsman
a45df4b584 Fixed ROUNDPS/PD bug 2008-04-20 13:32:42 +00:00
Stanislav Shwartsman
9668e735cd Inline fpu exceptions functions 2008-04-14 16:50:27 +00:00
Stanislav Shwartsman
026c333fa9 move handleDAZ to fpu 2008-04-04 20:03:27 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
8b5eaa5820 Make functions inline 2007-12-16 20:37:59 +00:00
Stanislav Shwartsman
83f6eb6945 Changes copyrights for the files I wrote :) 
Also split EqId G1 group for x86-64
 2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
dbb91069f4 Added SSE4_2 instructions emulation 2007-10-01 19:59:37 +00:00
Stanislav Shwartsman
02b7d8b43d Remove 'result' variable where it is definitelly not needed - simplify sse code 2007-09-27 16:23:29 +00:00
Stanislav Shwartsman
3e3254ecc4 some speedup for SSE code - achived by code simplification 2007-09-20 22:55:03 +00:00
Stanislav Shwartsman
55365ba713 Minimize usage of result register 2007-04-19 19:09:52 +00:00
Stanislav Shwartsman
1c3e703394 Fixed DAZ handling by CVT instructions 2007-04-19 18:50:57 +00:00
Stanislav Shwartsman
5189cfbf10 SSE4 support 2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
26f08fdb2c Change my e-mail to #SF one 2007-03-23 21:27:13 +00:00
Stanislav Shwartsman
8221fa6838 - Fixed zero upper 32-bit part of GPR in x86-64 mode 
- CMOV_GdEd should zero upper 32-bit part of GPR register even if the
    'cmov' condition was false !
 2007-01-26 22:12:05 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
8ba6c1178a Fixed PANIC in CMPxx SSE instructions 2006-02-22 20:20:21 +00:00
Stanislav Shwartsman
7cfa31492c Removed --enable-pni configure option, to compile with PNI use 
--enable-sse=3 instead (Stanislav Shwartsman)
 2006-02-20 19:28:57 +00:00
Stanislav Shwartsman
8c91790680 Redefine registers accessors in cpu.h 
Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
 2005-11-26 21:36:51 +00:00
Stanislav Shwartsman
d1c722211e Fix duplicate opcodes, fix opcode names and disasm bugs 2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
d10731f162 Update my e-mail in source files 
Update committed SF patches in changes
 2005-05-12 18:07:48 +00:00
Stanislav Shwartsman
3074078297 Added CVS version header to all the files. 
One more small change in APIC
 2005-03-19 20:44:01 +00:00
Stanislav Shwartsman
730b8c0243 Fix this pointers in the code 2004-11-14 21:25:42 +00:00
Stanislav Shwartsman
2a0a361298 Implemented precision lost up indication in floating point status word 2004-06-25 18:51:28 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
cf6d1b8bd9 port some changes from spftfloat-fpu branch to the MT 2004-04-09 15:34:59 +00:00
Stanislav Shwartsman
33b50ec4c4 For spammers o 2004-04-08 17:17:47 +00:00
Stanislav Shwartsman
dfef46e311 removed unused variables 2004-03-10 20:39:47 +00:00
Stanislav Shwartsman
f5316dad70 fixed bug in HADDPD/HSUBPD instructions 2004-03-05 09:19:58 +00:00
Stanislav Shwartsman
cc7b85ae7e just update release dates 2004-02-13 21:27:45 +00:00
Stanislav Shwartsman
52d75d7aed Fast table-based implementation of reciprocal (RCPSS/RCPPS) 
This implemntation is much more clear than old one.
RSQRTSS/RSQRTPS coming soon.
 2003-12-30 23:06:59 +00:00
Stanislav Shwartsman
a6c1bdbbb2 Optimization of RCPSS/RCPPS functions 2003-11-19 20:27:58 +00:00
Stanislav Shwartsman
ac50ab3760 Implemented RCPSS/RCPPS SSE instructions 2003-11-07 20:53:27 +00:00
Stanislav Shwartsman
7f570b0150 Added PNI new streaming extensions instructions 
PNI could be enabled by setting BX_SUPPORT_PNI in config.h
After the feature will be fully validation I'll also add configure option.

The implemntation is ~complete. I've missed only three FPU new opcodes of FUSTTP instruction and MONITOR/WAIT instructions.

Enjoy ! ;)
 2003-08-29 21:20:52 +00:00
Stanislav Shwartsman
b6ff1e6d9d dos2unix for softfloat 
fixed denormals handling for MUL/DIV instructions
 2003-05-26 19:30:33 +00:00
Stanislav Shwartsman
0cb847f6d3 Quite different implementation of DAZ feature 
Fixed bugs in execution of float64 packed instructions (almost all instructions affected)
 2003-05-26 18:06:09 +00:00
Stanislav Shwartsman
1d45167e5b Merged NEW-INSTRUCTIONS branch 2003-05-15 16:41:17 +00:00
Stanislav Shwartsman
8193a710ad Changed MMX/SSE/SSE2 diagnostic messages to be more informative 2003-03-21 20:33:23 +00:00
Stanislav Shwartsman
1cd38bb7dd Recommitted SSE code reorganization. 
Fix in FXSAVE/FXRESTOR opcodes -> If the OSFXSR bitCR4 is not set, the FXRSTOR instruction does not restore the states of the XMM and MXCSR registers.
 2002-12-22 20:13:00 +00:00
Bryce Denney
9b2914fd1d - Temporarily revert Stanislav's changes between 2002-12-18 and 2002-12-19. 
Because source files were added/removed it would require an update
  of the windows and macos project files, so I want to wait until after 2.0.
    M Makefile.in         1.51 back to 1.50
    M cpu.h               1.121 back to 1.120
    M fetchdecode.cc      1.37 back to 1.36
    M fetchdecode64.cc    1.33 back to 1.32
    M sse.cc              1.17 back to 1.16
    A sse2.cc             1.27 back to 1.26  (added back)
    R sse_move.cc         removed
    R sse_pfp.cc          removed
- to bring these changes back again, all we have to do is
  "cvs update -j tmp-before1 -j tmp-after1"
 2002-12-19 05:53:18 +00:00
Stanislav Shwartsman
aa361badf2 Reorganized SSE/SSE2 code 
sse.cc -> general SSE stuff and SSE integer (MMX extensions)
sse_move.cc -> memory transfer and shuffle opcodes
sse_pfp.cc -> packed floating point operations
 2002-12-18 22:33:44 +00:00