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72 Commits

Author SHA1 Message Date
Stanislav Shwartsman
180667fb4e Fixed compilation warning 2006-02-13 18:37:21 +00:00
Stanislav Shwartsman
ace3b9916a Print branch target linear address for all in disasm when possible (i.e. cs.base and eip supplied) 2006-02-11 19:46:03 +00:00
Stanislav Shwartsman
5a65e1065e Decoding functionality for Bochs disassembler. 
Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
 2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
24d4de03a1 - Fixed bug with missed ES segment override prefix 
- Correctly disassemble x86-64 opcodes

	Ia_cvttsd2si_Gq_Wsd
	Ia_cvttss2si_Gq_Wss
	Ia_cvtsd2si_Gq_Wsd
	Ia_cvtss2si_Gq_Wss
	Ia_movq_Pq_Eq
	Ia_movq_Vdq_Eq
	Ia_movq_Eq_Pq
	Ia_movq_Eq_Vq

- Correctly disassemble Intel SSE3 opcodes (not supported by Bochs)
	Ia_monitor
	Ia_mwait
 2006-01-31 17:42:31 +00:00
Stanislav Shwartsman
934f552ea3 Fix disassembly 2006-01-30 17:39:17 +00:00
Stanislav Shwartsman
cb58d08c11 Fix MSVC warning 2006-01-28 14:48:40 +00:00
Stanislav Shwartsman
557c15699f New function - toggle syntax mode 2006-01-24 21:34:39 +00:00
Stanislav Shwartsman
99a1f0838a FIx opcode table 2006-01-24 18:15:55 +00:00
Stanislav Shwartsman
276c006129 Merge new disasm module with x96-64 support 2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
40d8016e90 Fix disasm for FCOMI instructions 2005-11-17 17:42:15 +00:00
Stanislav Shwartsman
7b7ac565f9 Getting ready for long mode disasm support, patch will posted soon 2005-11-14 18:09:22 +00:00
Stanislav Shwartsman
5af5d80602 Small disasm fixes 2005-10-23 20:43:32 +00:00
Stanislav Shwartsman
d1c722211e Fix duplicate opcodes, fix opcode names and disasm bugs 2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
6244d43607 Fixed disasm bugs 2005-09-22 21:49:16 +00:00
Stanislav Shwartsman
7a6931159f Pre-support 64 bit disasm. For noew just cleanup to minimize diff 2005-09-12 16:46:54 +00:00
Stanislav Shwartsman
59f9763f5b Fix typo 2005-08-21 18:24:45 +00:00
Stanislav Shwartsman
47442d437a Speedup ICAche decWriteStamp operation. The main idea for this speedup was given by h.johansson. 2005-06-16 20:28:27 +00:00
Stanislav Shwartsman
51b9646407 Merge disasm fixes for PNI instructions (h.johansson) 2005-06-16 16:59:36 +00:00
Stanislav Shwartsman
438ad27ea1 Fixed handling of duplicate 0x66 and 0x67 prefixes in disasm (h.johanson) 2005-06-14 20:05:37 +00:00
Stanislav Shwartsman
7f26baeb94 small optimization in disasm code 2004-12-15 17:15:43 +00:00
Stanislav Shwartsman
757188d93b Fix disasm error caused by last commit 2004-12-13 22:04:31 +00:00
Stanislav Shwartsman
9306266580 Add missed "duplicated opcode group" to dis_tables.h 2004-12-12 22:17:13 +00:00
Stanislav Shwartsman
f375203fdb preparations for x86-64 support in disasm 2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
b009c2d1d7 disasm for instructions IRETD, PUSHFD, POPFD, PUSHAD, POPAD 
cVS: ----------------------------------------------------------------------
 2004-12-11 21:28:00 +00:00
Stanislav Shwartsman
8ac3790ab3 Added experimental support of AT&T syntax to disasm 
Fixed operand for CMPXCHG8B instruction

Feature request to somebidy who understand Bochs debugger code
  - to add Bochs debugger command which will switch between
    Intel and AT&T style for disassembler.
 2004-12-10 14:04:57 +00:00
Stanislav Shwartsman
a0efe5e577 small cleanup disasm code 
implement branch taken/not taken indication for conditional Jcc insructions
 2004-12-09 23:19:48 +00:00
Stanislav Shwartsman
139baaebf5 Fix OP_X and OP_Y methods for disasm 2004-12-09 20:01:00 +00:00
Stanislav Shwartsman
b054e3ac36 added missed syntax.cc file for disasm 2004-12-08 18:55:13 +00:00
Stanislav Shwartsman
9d1b401512 Fixed several disassembler bugs 
Prepared for AT&T style support in Bochs disassembler
 - it already supports all AT&T style except opcode name suffixes
 - AT&T support in future will be possible to enable from bx_debugger
 2004-12-08 18:54:15 +00:00
Stanislav Shwartsman
69c0b06955 fixes in disassembler 
split REPEAT instructions according to opsize to speedup execution
now each REPEATABLE instruction splitted to 3 different instructions, one for 16-bit operand size, one for 32-bit and one for 64-bit. Choosing of correct instruction occure in fetchdecode step.
 2004-11-20 23:26:32 +00:00
Stanislav Shwartsman
31f5ceb522 everal fixes in disasm 2004-10-22 22:56:59 +00:00
Stanislav Shwartsman
21f43f42fa Some preparations and cleanups for future x86-64 2004-10-17 22:05:17 +00:00
Stanislav Shwartsman
b37ae8a969 added new option --enable-show-ips to configure -> allow to enable BX_SHOW_IPS through configure script 
fixed print prefixes in disasm -> only LOCK, REP and REPNE prefixes printed
update changes
 2004-10-16 21:17:44 +00:00
Stanislav Shwartsman
158ba92f2e Fixed MOV opcode 0xA3, had wrong operand size (h.johansson) - disasm 2004-07-28 19:02:40 +00:00
Stanislav Shwartsman
35741f5cbd Fix configure script for Peter Tattam 2004-07-15 19:57:31 +00:00
Stanislav Shwartsman
50aaf8ec6f Implemented FFREEP 287+ compatability instruction 2004-07-15 19:45:33 +00:00
Stanislav Shwartsman
3274e0dd12 Commit patch 
[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
 2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
aa934c0bd2 update makefile for support .cpp suffixes for C++ sources 2004-01-24 16:37:15 +00:00
Christophe Bothamy
7061211fbe - another fix for compiling with vcpp 2004-01-04 18:53:02 +00:00
Christophe Bothamy
f1e558a39d - updates so bochs compiles when the debugger is enabled 2004-01-04 13:13:45 +00:00
Stanislav Shwartsman
7b35ac3575 Added two missed diassembler table entries 2004-01-02 11:56:59 +00:00
Stanislav Shwartsman
fd60a984a0 Instructions that should not check pending FPU exceptions 2003-12-28 18:58:15 +00:00
Stanislav Shwartsman
0eb71999db Added missed 287 opcodes which should be executed as NOP in 387+ 2003-12-28 18:19:41 +00:00
Stanislav Shwartsman
dacdaadf3d I forgot to add thos file last time 2003-12-27 09:27:26 +00:00
Stanislav Shwartsman
fc1473cb8c Update changes 
dos2unix cleanup
 2003-12-24 20:44:39 +00:00
Stanislav Shwartsman
ab6b9c7dcb New table-based disassembler: 
* Fully supports
	* MMX/XMM/3DNOW instruction sets
	* FPU instruction
	* SSE3 extensions
 currently only 16/32 bit mode bug anyway, it is much better that old one ;)
 2003-12-24 20:32:59 +00:00
Daniel Gimpelevich
fff74a6f83 Fixed incompatibility with gcc3.3, I think. 2003-11-28 15:07:29 +00:00
Alexander Krisak
45df735c30 Apply Vitaly's Vorobyov debugger patch 2003-08-04 16:03:09 +00:00
Stanislav Shwartsman
549eb70324 Committed CPU fixes from Vitaly Vorobyov: 
[x] fixed bug in int01 (opcode 0xF1) emulation
[x] fixed bug in x86 debugger with dr0-dr3 registers

Committed disassembler bugfix from Dirk Thierbach:

[x] fixed bug in relative addresses in Jmp, Jcc, Call and so on
 2003-08-03 16:44:53 +00:00
Christophe Bothamy
c4782d5e9c - apply patches/patch.disasm-luizshiguno from Luiz Henrique Shigunov. 
From the author:

  I've implemented functions ALOb(), ObAL(), YbAL(),
  ALXb() and eAXXv() from dis_groups.cc.

  I've also changed dis_decode.cc to print cmpsd if code
  is 32 bits and cmpsw if code is 16 bits. The same with
  stosd, lodsd and scasd.
 2003-01-21 13:23:47 +00:00