added new option --enable-show-ips to configure -> allow to enable BX_SHOW_IPS through configure script

fixed print prefixes in disasm -> only LOCK, REP and REPNE prefixes printed
update changes

bochs/.conf.everything

@@ -29,4 +29,5 @@
   --enable-sb16=linux \
   --enable-instrumentation \
   --enable-iodebug \
+  --enable-show-ips \
   --with-all-libs

bochs/CHANGES

@@ -26,6 +26,7 @@ Changes to next release:
     (Stanislav Shwartsman)
   - added missed GP(0) exception when loading incorrect flags combination 
     to CR0 (Stanislav Shwartsman)
+  - implemented CR8 register (aliased to APIC.TPR[7:4]) in x86-64 mode
 
 - FPU
   - totally rewritten all FPU code based on softfloat library 
@@ -40,6 +41,13 @@ Changes to next release:
       by magic number for all operations, including float32 
       and float64.
 
+- APIC (Zwane Mwaikambo)
+  - APIC arbitration
+  - Processor priority
+  - Various interrupt delivery fixes
+  - Focus processor checking
+  - ExtINT delivery
+
 - Disassembler
   - fixed MOV opcode 0x88, had exchanged the operands (h.johansson)
   - fixed MOV opcode 0xA3, had wrong operand size (h.johansson)
@@ -110,6 +118,8 @@ Changes to next release:
   - --enable-mmx enabled by default only if cpu-level > 4
   - fixes for Solaris SunPro (Robin Kay)
   - --enable-pni option added
+  - --enable-show-ips option added, enable Instruction Per Second counter 
+    in log file 
 
 - SF patches applied
   [894595] MSR_APICBASE always returns APIC ADDRESS 0 by Kangmo Kim

bochs/configure.in

@@ -2,7 +2,7 @@ dnl // Process this file with autoconf to produce a configure script.
 
 AC_PREREQ(2.50)
 AC_INIT(bochs.h)
-AC_REVISION([[$Id: configure.in,v 1.264 2004-10-03 20:02:08 vruppert Exp $]])
+AC_REVISION([[$Id: configure.in,v 1.265 2004-10-16 21:17:44 sshwarts Exp $]])
 AC_CONFIG_HEADER(config.h)
 AC_CONFIG_HEADER(ltdlconf.h)
 
@@ -1113,6 +1113,21 @@ AC_ARG_ENABLE(port-e9-hack,
     ]
   )
 
+AC_MSG_CHECKING(show IPS)
+AC_ARG_ENABLE(show_ips,
+  [  --enable-show-ips                 show IPS],
+  [if test "$enableval" = yes; then
+    AC_MSG_RESULT(yes)
+    AC_DEFINE(BX_SHOW_IPS, 1)
+   else
+    AC_MSG_RESULT(no)
+    AC_DEFINE(BX_SHOW_IPS, 0)
+   fi],
+  [
+    AC_MSG_RESULT(no)
+    AC_DEFINE(BX_SHOW_IPS, 0)
+    ]
+  )
 
 AC_MSG_CHECKING(whether to reset on triple fault)
 AC_ARG_ENABLE(reset-on-triple-fault,

bochs/disasm/dis_decode.cc

@@ -210,7 +210,7 @@ unsigned disassembler::disasm(bx_bool is_32,
 
   // print prefixes
   for(unsigned i=0;i<n_prefixes;i++)
-        if (*(instr+i) == 0xF3 || *(instr+i) != 0xF2 || *(instr+i) != 0xF0) 
+        if (*(instr+i) == 0xF3 || *(instr+i) == 0xF2 || *(instr+i) == 0xF0) 
              dis_sprintf("%s ", BxDisasmOpcodes[*(instr+i)].Opcode);
 
   // print opcode

bochs/disasm/dis_groups.cc

@@ -345,12 +345,12 @@ void disassembler::sIb(unsigned attr)
 {
   if (i32bit_opsize)
   {
-    Bit32u imm32 =  (Bit8s) fetch_byte();
+    Bit32u imm32 = (Bit8s) fetch_byte();
     dis_sprintf("0x%x", imm32);
   }
   else
   {
-    Bit32u imm16 =  (Bit8s) fetch_byte();
+    Bit32u imm16 = (Bit8s) fetch_byte();
     dis_sprintf("0x%x", imm16);
   }
 }

bochs/disasm/dis_tables.h

@@ -143,6 +143,13 @@ struct BxDisasmOpcodeInfo_t
 #define Mps &disassembler::OP_MEM, O_MODE
 #define Mpd &disassembler::OP_MEM, O_MODE
 
+ // jump
+#define Jb  &disassembler::Jb, 0
+#define Jv  &disassembler::Jv, 0
+
+ // call
+#define Ap  &disassembler::Ap, 0
+
  // still unsorted
 #define Gb  &disassembler::Gb, 0
 #define Gw  &disassembler::Gw, 0
@@ -156,12 +163,6 @@ struct BxDisasmOpcodeInfo_t
 #define Ea  &disassembler::Ea, 0
 #define Ep  &disassembler::Ep, 0
 
- // jump
-#define Jb  &disassembler::Jb, 0
-#define Jv  &disassembler::Jv, 0
-
-#define Ap  &disassembler::Ap, 0
-
 #define Ob  &disassembler::Ob, 0
 #define Ov  &disassembler::Ov, 0
 
@@ -2412,7 +2413,7 @@ static BxDisasmOpcodeInfo_t BxDisasmOpcodes[256*2] = {
   /* 0F 0A */  { "(invalid)", 0,  XX,  XX, XX },
   /* 0F 0B */  { "ud2a",      0,  XX,  XX, XX },
   /* 0F 0C */  { "(invalid)", 0,  XX,  XX, XX },
-  /* 0F 0D */  { "(invalid)", 0,  XX,  XX, XX },        // 3DNow!
+  /* 0F 0D */  { "prefetch",  0,  Mb,  XX, XX },        // 3DNow!
   /* 0F 0E */  { "femms",     0,  XX,  XX, XX },        // 3DNow!
   /* 0F 0F */  { GRP3DNOW     },
   /* 0F 10 */  { GRPSSE(0f10) },