Stanislav Shwartsman
0f39ce58be
fixed compilation warnings and errors with MSVCPP
2014-07-09 16:08:16 +00:00
Stanislav Shwartsman
816f5cc2d7
fixed massive code duplication
2014-07-03 06:40:42 +00:00
Stanislav Shwartsman
1e46de78ad
add proper alignment of XMM/YMM/ZMM registers within CPU class
2014-06-25 19:12:14 +00:00
Stanislav Shwartsman
2fe0aaa472
added configure option for trace linking optimization and mention it in CHANGES
2014-05-01 18:30:23 +00:00
Stanislav Shwartsman
ab6230a9a8
Implemented XSAVEC instruction emulation and XINUSE optimization in the XSAVEOPT instruction
2014-03-17 20:29:44 +00:00
Stanislav Shwartsman
d8fa7aa28a
implemented INIT optimization for XSAVEOPT instruction
2014-03-16 21:56:30 +00:00
Stanislav Shwartsman
97d2965d58
continue xsave code rework
2014-03-16 20:37:47 +00:00
Stanislav Shwartsman
d10fa93d89
fixed to VSCALEF instruction + one more step in the implementation in the softfloat
2014-03-14 20:26:50 +00:00
Stanislav Shwartsman
02e19de346
Added shape of implementation for last missing VSCALEF* AVX-512 instructons.
...
The softfloat implementation is still missing (only corner cases are supported).
Extend softfloat floatNN_class methods to distinguish between SNaN and QNaN.
2014-03-09 21:42:11 +00:00
Stanislav Shwartsman
bfe6ecabb8
xsave sse state using same interface as all other advanced states
2014-03-04 21:06:29 +00:00
Stanislav Shwartsman
402b2c01c9
Implemented AVX-512 conflict detection instructions (VPCONFLICT, VPLZCNT, VPBROADCASTMB2Q, VPBROADCASTMW2D)
...
Only missed AVX-512 opcodes are:
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
2014-02-27 21:12:02 +00:00
Stanislav Shwartsman
648221d419
rewritten xsave/xrestor for more modular functionality. todo: replace walk through state using simple for loop
2014-02-22 21:00:47 +00:00
Stanislav Shwartsman
0a1b4f1c7e
added template for missing avx-512 instructions
2014-02-17 20:21:58 +00:00
Stanislav Shwartsman
7775483d5e
Implemented VCVTPS2PH AVX-512 instruction
...
Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
2014-02-15 19:21:08 +00:00
Stanislav Shwartsman
09414f2f4b
implemented access to opmask AVX-512 registers from debugger, fixed enhdbg buffer overflow with EVEX enabled
2014-02-11 20:51:18 +00:00
Stanislav Shwartsman
b510cf794b
complete compressed displ feature support, bugfixes in AVX-512 code
2014-02-11 16:10:31 +00:00
Stanislav Shwartsman
9613e4b402
implementation of AVX-512 compressed displacement feature which is required for AVX-512 emu correctness (first step). todo: fix rest of EVEX opcodes
2014-02-10 21:12:08 +00:00
Stanislav Shwartsman
7a6727da34
implemented AVX-512 version of VCVTPH2PS
2014-02-04 20:32:54 +00:00
Stanislav Shwartsman
b33f93b9f3
Implemented VGETMANT* AVX-512 instructions
...
Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
2014-02-03 20:40:46 +00:00
Stanislav Shwartsman
ac06ee46ae
Implemented VPMOVSX*/VPMOVZX* AVX-512 instructions
...
Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
2014-02-02 19:56:08 +00:00
Stanislav Shwartsman
55e1d53a48
implement DPPS/DPPD ops using existing primitives; added some missing defs
2014-02-02 18:57:25 +00:00
Stanislav Shwartsman
ef130ca145
convert some defines to enum
2014-01-31 19:40:34 +00:00
Stanislav Shwartsman
ccb003b0e1
fixed swapped sources of VEXTRACTF*
2014-01-30 20:48:41 +00:00
Stanislav Shwartsman
41e13703a3
Implemented VEXTRACT* AVX-512 instructions
...
Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH
512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0 25 VPMOVSXDQ
512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0 35 VPMOVSzDQ
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
2014-01-30 20:31:08 +00:00
Stanislav Shwartsman
63e99da4af
Implemented VALIGN* AVX-512 instructions
...
Now only missed AVX-512 opcodes now are:
512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH
512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0 25 VPMOVSXDQ
512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0 35 VPMOVSzDQ
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
512.66.0F3A.W0 19 VEXTRACTF32x4
512.66.0F3A.W1 1B VEXTRACTF64x4
512.66.0F3A.W0 39 VEXTRACTI32x4
512.66.0F3A.W1 3B VEXTRACTI64x4
512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
2014-01-28 19:36:46 +00:00
Stanislav Shwartsman
36ba25847f
Implemented last missed AVX-512 unsigned convert instructions
...
The only missed AVX-512 opcodes now are:
512.66.0F38.W0 13 VCVTPH2PS
512.66.0F3A.W0 1D VCVTPS2PH
512.66.0F38.WIG 21 VPMOVSXBD
512.66.0F38.WIG 22 VPMOVSXBQ
512.66.0F38.WIG 23 VPMOVSXWD
512.66.0F38.WIG 24 VPMOVSXWQ
512.66.0F38.W0 25 VPMOVSXDQ
512.66.0F38.WIG 31 VPMOVSZBD
512.66.0F38.WIG 32 VPMOVSZBQ
512.66.0F38.WIG 33 VPMOVSZWD
512.66.0F38.WIG 34 VPMOVSZWQ
512.66.0F38.W0 35 VPMOVSzDQ
512.66.0F38.W0 2C VSCALEFPS
512.66.0F38.W1 2C VSCALEFPD
NDS.LIG.66.0F38.W0 2D VSCALESS
NDS.LIG.66.0F38.W1 2D VSCALESD
512.66.0F38.W0 4C VRCP14PS
512.66.0F38.W1 4C VRCP14PD
NDS.LIG.66.0F38.W0 4D VRCP14SS
NDS.LIG.66.0F38.W1 4D VRCP14SD
512.66.0F38.W0 4E VRSQRT14PS
512.66.0F38.W1 4E VRSQRT14PD
NDS.LIG.66.0F38.W0 4F VRSQRT14SS
NDS.LIG.66.0F38.W1 4F VRSQRT14SD
NDS.512.66.0F3A.W0 03 VALIGND
NDS.512.66.0F3A.W1 03 VALIGNQ
512.66.0F3A.W0 08 VRNDSCALEPS
512.66.0F3A.W1 09 VRNDSCALEPD
NDS.LIG.66.0F3A.W1 0A VRNDSCALESS
NDS.LIG.66.0F3A.W1 0B VRNDSCALESD
512.66.0F3A.W0 19 VEXTRACTF32x4
512.66.0F3A.W1 1B VEXTRACTF64x4
512.66.0F3A.W0 39 VEXTRACTI32x4
512.66.0F3A.W1 3B VEXTRACTI64x4
512.66.0F3A.W0 26 VGETMANTPS
512.66.0F3A.W1 26 VGETMANTPD
NDS.LIG.66.0F3A.W0 27 VGETMANTSS
NDS.LIG.66.0F3A.W1 27 VGETMANTSD
2014-01-28 12:57:38 +00:00
Stanislav Shwartsman
15979a52b6
implemented avx-512 getexp instructions
2014-01-27 21:25:07 +00:00
Stanislav Shwartsman
3798ed66b5
new function for disasm. todo: support it independently of CPU
2014-01-26 20:01:50 +00:00
Stanislav Shwartsman
4d4d194c16
implemented missed vpmul* avx-512 opcodes
2014-01-24 20:04:36 +00:00
Stanislav Shwartsman
7beb85b850
implemented vperm* avx-512 opcodes
2014-01-24 19:23:19 +00:00
Stanislav Shwartsman
407681c98a
implemented some more avx-512 opcodes
2014-01-24 12:02:47 +00:00
Stanislav Shwartsman
33889cd02e
implemented avx-512 vpermq opcode
2014-01-22 21:21:32 +00:00
Stanislav Shwartsman
a21f03e69b
implemented few more avx-512 cvt opcodes
2014-01-21 21:00:40 +00:00
Stanislav Shwartsman
d591c1dd34
implemented few more avx-512 cvt opcodes
2014-01-21 20:31:10 +00:00
Stanislav Shwartsman
a63280a6d1
implemented few more AVX-512 cvt opcodes
2014-01-19 20:23:14 +00:00
Stanislav Shwartsman
ba52890538
implemented few more AVX-512 floating point convert instructions
2014-01-18 20:10:05 +00:00
Stanislav Shwartsman
5cdcd7bef7
Implemented AVX-512 VPMOV* down-conversion stores
2014-01-12 13:08:16 +00:00
Stanislav Shwartsman
af29c8bd60
infrastructure change for avx-512: before going to more new instructions modelling
2014-01-10 19:40:38 +00:00
Stanislav Shwartsman
58470763fa
implement few more avx-512 opcodes
2013-12-31 23:51:25 +00:00
Stanislav Shwartsman
e200d04ad5
implemented two AVX512 unsigned CVT instructions
2013-12-22 19:53:03 +00:00
Stanislav Shwartsman
776cabf4fe
move canonical check of high part of page split access to another function to fix code duplication
2013-12-21 21:56:55 +00:00
Stanislav Shwartsman
da0cec4300
implemented AVX-512 VINSERTF*/VINSERTI* opcodes
2013-12-17 20:38:19 +00:00
Stanislav Shwartsman
734d1c7af8
implemented VFIXUPIMM AVX-512 opcodes
2013-12-17 16:44:46 +00:00
Stanislav Shwartsman
51d0161148
implement few AVX-512 unsigned convert instructions
2013-12-15 20:07:57 +00:00
Stanislav Shwartsman
258a60f3fa
Implemented AVX512 EXPAND/COMPRESS instructions
...
Fixed memory access size for AVX shift instructions with shift count in memory
Do not allow to encode with EVEX.b instructions which do not support implicit broadcast
softfloat: prepare float32/64 to uint32 conversion functions
2013-12-10 21:09:46 +00:00
Stanislav Shwartsman
ccb1d86d6e
code cleanups
2013-12-09 20:36:24 +00:00
Stanislav Shwartsman
d20c81417c
Implemented VSHUFF32x4/64x2, VSHUFI32x4/64x2 AVX512 instructions
...
Implemented AVX512 blend instructions
Do not allow setting of EVEX.b in reg form when no floating point exceptions could be generated by instruction
2013-12-09 19:09:37 +00:00
Stanislav Shwartsman
4c78ca8c1c
implemented mask load for most of the load+op instructions. all take care for instructions which do not support maksing of memory exceptions (shuffle and permutes)
2013-12-08 21:54:59 +00:00
Stanislav Shwartsman
7ed017a56d
implemented avx-512 gather/scatter
2013-12-07 20:15:56 +00:00
Stanislav Shwartsman
ca2793ac76
Debugger: fixed param tree access to 64-bit variables (need to use get64() instead of get())
...
Debugger: if AVX-512 if not supported by current configuration do not print high256 of vector registers and zmm15..zmm31 in AVX command
Implement VBROADCASTF64x4, VBROADCASTF32x4, VBROADCASTFI64x4, VBROADCASTI32x4 AVX-512 instructions
Fetchdecode optimizations and bugfixes
2013-12-05 19:17:16 +00:00
