mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

fixed swapped sources of VEXTRACTF*

Browse Source
This commit is contained in:
Stanislav Shwartsman 2014-01-30 20:48:41 +00:00
parent 41e13703a3
commit ccb003b0e1
4 changed files with 32 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
bochs/cpu/avx512.cc
View File

@ -755,7 +755,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VINSERTF64x4_MASK_VpdHpdWpdIbR(bxI
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_VpsWpsIbR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_WpsVpsIbR(bxInstruction_c *i)
{
unsigned len = i->getVL(), offset = i->Ib() & (len - 1);
@ -764,7 +764,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_VpsWpsIbR(bxInstruct
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_MASK_WpsVpsIbR(bxInstruction_c *i)
{
unsigned len = i->getVL(), offset = i->Ib() & (len - 1);
BxPackedXmmRegister op = BX_READ_AVX_REG_LANE(i->src(), offset);
@ -780,7 +780,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbR(bxIns
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_VpsWpsIbM(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_WpsVpsIbM(bxInstruction_c *i)
{
unsigned len = i->getVL(), offset = i->Ib() & (len - 1);
BxPackedXmmRegister op = BX_READ_AVX_REG_LANE(i->src(), offset);
@ -791,7 +791,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_VpsWpsIbM(bxInstruct
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbM(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_MASK_WpsVpsIbM(bxInstruction_c *i)
{
unsigned len = i->getVL(), offset = i->Ib() & (len - 1);
BxPackedAvxRegister op;
@ -804,7 +804,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbM(bxIns
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_VpdWpdIbR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_WpdVpdIbR(bxInstruction_c *i)
{
unsigned len = i->getVL();
if (len != BX_VL512) {
@ -817,7 +817,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_VpdWpdIbR(bxInstruct
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbR(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_MASK_WpdVpdIbR(bxInstruction_c *i)
{
unsigned len = i->getVL();
if (len != BX_VL512) {
@ -833,7 +833,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbR(bxIns
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_VpdWpdIbM(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_WpdVpdIbM(bxInstruction_c *i)
{
unsigned len = i->getVL();
if (len != BX_VL512) {
@ -847,7 +847,7 @@ BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_VpdWpdIbM(bxInstruct
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbM(bxInstruction_c *i)
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::VEXTRACTF64x4_MASK_WpdVpdIbM(bxInstruction_c *i)
{
unsigned len = i->getVL();
if (len != BX_VL512) {

16
bochs/cpu/cpu.h
View File

@ -3439,15 +3439,15 @@ public: // for now...
BX_SMF BX_INSF_TYPE VINSERTF32x4_MASK_VpsHpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VINSERTF64x4_MASK_VpdHpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_MASK_VpsWpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_MASK_VpdWpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_WpsVpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_MASK_WpsVpsIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_WpdVpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_MASK_WpdVpdIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_VpsWpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_MASK_VpsWpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_VpdWpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_MASK_VpdWpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_WpsVpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF32x4_MASK_WpsVpsIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_WpdVpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VEXTRACTF64x4_MASK_WpdVpdIbM(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPBROADCASTD_MASK_VdqWdR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
BX_SMF BX_INSF_TYPE VPBROADCASTQ_MASK_VdqWqR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);

16
bochs/cpu/fetchdecode_evex.h
View File

@ -1588,12 +1588,12 @@ static const BxOpcodeInfo_t BxOpcodeTableEVEX[256*3*2] = {
/* 17 */ { 0, BX_IA_ERROR }, // #UD
/* 18 k0 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTF32x4_VpsHpsWpsIb_Kmask },
/* 18 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTF32x4_VpsHpsWpsIb_Kmask },
/* 19 k0 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF32x4_VpsWpsIb },
/* 19 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF32x4_VpsWpsIb_Kmask },
/* 19 k0 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF32x4_WpsVpsIb },
/* 19 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF32x4_WpsVpsIb_Kmask },
/* 1A k0 */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTF64x4_VpdHpdWpdIb_Kmask },
/* 1A */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTF64x4_VpdHpdWpdIb_Kmask },
/* 1B k0 */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF64x4_VpdWpdIb },
/* 1B */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF64x4_VpdWpdIb_Kmask },
/* 1B k0 */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF64x4_WpdVpdIb },
/* 1B */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTF64x4_WpdVpdIb_Kmask },
/* 1C k0 */ { 0, BX_IA_ERROR },
/* 1C */ { 0, BX_IA_ERROR },
/* 1D k0 */ { 0, BX_IA_ERROR },
@ -1652,12 +1652,12 @@ static const BxOpcodeInfo_t BxOpcodeTableEVEX[256*3*2] = {
/* 37 */ { 0, BX_IA_ERROR },
/* 38 k0 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTI32x4_VdqHdqWdqIb_Kmask },
/* 38 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTI32x4_VdqHdqWdqIb_Kmask },
/* 39 k0 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI32x4_VdqWdqIb },
/* 39 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI32x4_VdqWdqIb_Kmask },
/* 39 k0 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI32x4_WdqVdqIb },
/* 39 */ { BxVexW0 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI32x4_WdqVdqIb_Kmask },
/* 3A k0 */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTI64x4_VdqHdqWdqIb_Kmask },
/* 3A */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VINSERTI64x4_VdqHdqWdqIb_Kmask },
/* 3B k0 */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI64x4_VdqWdqIb },
/* 3B */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI64x4_VdqWdqIb_Kmask },
/* 3B k0 */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI64x4_WdqVdqIb },
/* 3B */ { BxVexW1 | BxVexL1 | BxPrefixSSE66 | BxImmediate_Ib, BX_IA_V512_VEXTRACTI64x4_WdqVdqIb_Kmask },
/* 3C k0 */ { 0, BX_IA_ERROR },
/* 3C */ { 0, BX_IA_ERROR },
/* 3D k0 */ { 0, BX_IA_ERROR },

16
bochs/cpu/ia_opcodes.h
View File

@ -2726,15 +2726,15 @@ bx_define_opcode(BX_IA_V512_VINSERTF64x4_VpdHpdWpdIb_Kmask, &BX_CPU_C::LOAD_Half
bx_define_opcode(BX_IA_V512_VINSERTI32x4_VdqHdqWdqIb_Kmask, &BX_CPU_C::LOADU_Wdq, &BX_CPU_C::VINSERTF32x4_MASK_VpsHpsWpsIbR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_Wdq, OP_Ib, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VINSERTI64x4_VdqHdqWdqIb_Kmask, &BX_CPU_C::LOAD_Half_Vector, &BX_CPU_C::VINSERTF64x4_MASK_VpdHpdWpdIbR, BX_ISA_AVX512, OP_Vdq, OP_Hdq, OP_Wdq, OP_Ib, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF32x4_VpsWpsIb, &BX_CPU_C::VEXTRACTF32x4_VpsWpsIbM, &BX_CPU_C::VEXTRACTF32x4_VpsWpsIbR, BX_ISA_AVX512, OP_Vps, OP_Wps, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF32x4_VpsWpsIb_Kmask, &BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbM, &BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbR, BX_ISA_AVX512, OP_Vps, OP_Wps, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF64x4_VpdWpdIb, &BX_CPU_C::VEXTRACTF64x4_VpdWpdIbM, &BX_CPU_C::VEXTRACTF64x4_VpdWpdIbR, BX_ISA_AVX512, OP_Vpd, OP_Wpd, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF64x4_VpdWpdIb_Kmask, &BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbM, &BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbR, BX_ISA_AVX512, OP_Vpd, OP_Wpd, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF32x4_WpsVpsIb, &BX_CPU_C::VEXTRACTF32x4_WpsVpsIbM, &BX_CPU_C::VEXTRACTF32x4_WpsVpsIbR, BX_ISA_AVX512, OP_Wps, OP_Vps, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF32x4_WpsVpsIb_Kmask, &BX_CPU_C::VEXTRACTF32x4_MASK_WpsVpsIbM, &BX_CPU_C::VEXTRACTF32x4_MASK_WpsVpsIbR, BX_ISA_AVX512, OP_Vps, OP_Wps, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF64x4_WpdVpdIb, &BX_CPU_C::VEXTRACTF64x4_WpdVpdIbM, &BX_CPU_C::VEXTRACTF64x4_WpdVpdIbR, BX_ISA_AVX512, OP_Wpd, OP_Vpd, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTF64x4_WpdVpdIb_Kmask, &BX_CPU_C::VEXTRACTF64x4_MASK_WpdVpdIbM, &BX_CPU_C::VEXTRACTF64x4_MASK_WpdVpdIbR, BX_ISA_AVX512, OP_Vpd, OP_Wpd, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI32x4_VdqWdqIb, &BX_CPU_C::VEXTRACTF32x4_VpsWpsIbM, &BX_CPU_C::VEXTRACTF32x4_VpsWpsIbR, BX_ISA_AVX512, OP_Vdq, OP_Wdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI32x4_VdqWdqIb_Kmask, &BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbM, &BX_CPU_C::VEXTRACTF32x4_MASK_VpsWpsIbR, BX_ISA_AVX512, OP_Vdq, OP_Wdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI64x4_VdqWdqIb, &BX_CPU_C::VEXTRACTF64x4_VpdWpdIbM, &BX_CPU_C::VEXTRACTF64x4_VpdWpdIbR, BX_ISA_AVX512, OP_Vdq, OP_Wdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI64x4_VdqWdqIb_Kmask, &BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbM, &BX_CPU_C::VEXTRACTF64x4_MASK_VpdWpdIbR, BX_ISA_AVX512, OP_Vdq, OP_Wdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI32x4_WdqVdqIb, &BX_CPU_C::VEXTRACTF32x4_WpsVpsIbM, &BX_CPU_C::VEXTRACTF32x4_WpsVpsIbR, BX_ISA_AVX512, OP_Wdq, OP_Vdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI32x4_WdqVdqIb_Kmask, &BX_CPU_C::VEXTRACTF32x4_MASK_WpsVpsIbM, &BX_CPU_C::VEXTRACTF32x4_MASK_WpsVpsIbR, BX_ISA_AVX512, OP_Vdq, OP_Wdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI64x4_WdqVdqIb, &BX_CPU_C::VEXTRACTF64x4_WpdVpdIbM, &BX_CPU_C::VEXTRACTF64x4_WpdVpdIbR, BX_ISA_AVX512, OP_Wdq, OP_Vdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VEXTRACTI64x4_WdqVdqIb_Kmask, &BX_CPU_C::VEXTRACTF64x4_MASK_WpdVpdIbM, &BX_CPU_C::VEXTRACTF64x4_MASK_WpdVpdIbR, BX_ISA_AVX512, OP_Vdq, OP_Wdq, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VMOVLPS_VpsHpsMq, &BX_CPU_C::VMOVLPD_VpdHpdMq, &BX_CPU_C::VMOVHLPS_VpsHpsWps, BX_ISA_AVX512, OP_Vps, OP_Hps, OP_Wq, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)
bx_define_opcode(BX_IA_V512_VMOVHPS_VpsHpsMq, &BX_CPU_C::VMOVHPD_VpdHpdMq, &BX_CPU_C::VMOVLHPS_VpsHpsWps, BX_ISA_AVX512, OP_Vps, OP_Hps, OP_Wq, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST)