2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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2011-02-25 00:54:04 +03:00
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// $Id$
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2001-10-03 17:10:38 +04:00
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/////////////////////////////////////////////////////////////////////////
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//
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2012-03-25 15:54:32 +04:00
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// Copyright (C) 2001-2012 The Bochs Project
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2001-04-10 05:04:59 +04:00
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//
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// This library is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Lesser General Public
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// License as published by the Free Software Foundation; either
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// version 2 of the License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, write to the Free Software
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2009-01-16 21:18:59 +03:00
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA B 02110-1301 USA
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2007-11-17 21:08:46 +03:00
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/////////////////////////////////////////////////////////////////////////
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2001-04-10 05:04:59 +04:00
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2001-05-24 22:46:34 +04:00
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#define NEED_CPU_REG_SHORTCUTS 1
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2001-04-10 05:04:59 +04:00
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#include "bochs.h"
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2006-03-07 01:03:16 +03:00
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#include "cpu.h"
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merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.
In general this provides a generic interface for logging.
logfunctions:: is a class that is inherited by some classes, and also
. allocated as a standalone global called 'genlog'. All logging uses
. one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
. class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
. respectively.
.
. An example usage:
. BX_INFO(("Hello, World!\n"));
iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance. It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf(). At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.
More cleanup is coming, but this works for now. If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.
Comments, bugs, flames, to me: todd@fries.net
2001-05-15 18:49:57 +04:00
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#define LOG_THIS BX_CPU_THIS_PTR
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2001-04-10 05:04:59 +04:00
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2013-09-24 09:21:00 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdIdM(bxInstruction_c *i)
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{
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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write_virtual_dword(i->seg(), eaddr, i->Id());
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EdIdR(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), i->Id());
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32_EdGdM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2009-04-07 20:12:19 +04:00
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Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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write_virtual_dword_32(i->seg(), eaddr, BX_READ_32BIT_REG(i->src()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-29 23:21:38 +04:00
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}
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2012-03-25 15:54:32 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32S_EdGdM(bxInstruction_c *i)
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{
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Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2012-08-05 17:52:40 +04:00
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stack_write_dword(eaddr, BX_READ_32BIT_REG(i->src()));
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2012-03-25 15:54:32 +04:00
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BX_NEXT_INSTR(i);
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GdEdR(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32_GdEdM(bxInstruction_c *i)
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2002-09-28 09:38:11 +04:00
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{
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2009-04-07 20:12:19 +04:00
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Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-09-07 01:10:40 +04:00
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Bit32u val32 = read_virtual_dword_32(i->seg(), eaddr);
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2012-03-25 15:54:32 +04:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), val32);
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2012-03-25 15:54:32 +04:00
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BX_NEXT_INSTR(i);
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV32S_GdEdM(bxInstruction_c *i)
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{
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Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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Bit32u val32 = stack_read_dword(eaddr);
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), val32);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2002-09-28 09:38:11 +04:00
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}
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2001-04-10 05:04:59 +04:00
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::LEA_GdM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2011-07-07 00:01:18 +04:00
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Bit32u eaddr = (Bit32u) BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), eaddr);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EAXOd(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-09-07 01:18:08 +04:00
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RAX = read_virtual_dword_32(i->seg(), i->Id());
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_OdEAX(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-09-07 01:18:08 +04:00
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write_virtual_dword_32(i->seg(), i->Id(), EAX);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-08-08 13:22:49 +04:00
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2008-08-08 13:22:49 +04:00
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Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
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2007-11-17 21:29:00 +03:00
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/* zero extend byte op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_8);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-17 21:29:00 +03:00
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}
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2001-04-10 05:04:59 +04:00
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEbR(bxInstruction_c *i)
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2007-11-17 21:29:00 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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2005-05-21 00:06:50 +04:00
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/* zero extend byte op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_8);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-08-08 13:22:49 +04:00
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2008-08-08 13:22:49 +04:00
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Bit16u op2_16 = read_virtual_word(i->seg(), eaddr);
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2007-11-17 21:29:00 +03:00
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/* zero extend word op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_16);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-17 21:29:00 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVZX_GdEwR(bxInstruction_c *i)
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2007-11-17 21:29:00 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
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2001-04-10 05:04:59 +04:00
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2005-05-21 00:06:50 +04:00
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/* zero extend word op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit32u) op2_16);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-08-08 13:22:49 +04:00
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2008-08-08 13:22:49 +04:00
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Bit8u op2_8 = read_virtual_byte(i->seg(), eaddr);
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2007-11-17 21:29:00 +03:00
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/* sign extend byte op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit8s) op2_8);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-17 21:29:00 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEbR(bxInstruction_c *i)
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2007-11-17 21:29:00 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit8u op2_8 = BX_READ_8BIT_REGx(i->src(), i->extend8bitL());
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2001-04-10 05:04:59 +04:00
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2005-05-21 00:06:50 +04:00
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/* sign extend byte op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit8s) op2_8);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-08-08 13:22:49 +04:00
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2008-08-08 13:22:49 +04:00
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Bit16u op2_16 = read_virtual_word(i->seg(), eaddr);
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2007-11-17 21:29:00 +03:00
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/* sign extend word op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit16s) op2_16);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-17 21:29:00 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::MOVSX_GdEwR(bxInstruction_c *i)
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2007-11-17 21:29:00 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit16u op2_16 = BX_READ_16BIT_REG(i->src());
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2001-04-10 05:04:59 +04:00
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2005-05-21 00:06:50 +04:00
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/* sign extend word op2 into dword op1 */
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->dst(), (Bit16s) op2_16);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2001-04-10 05:04:59 +04:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdM(bxInstruction_c *i)
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2001-04-10 05:04:59 +04:00
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{
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2008-08-08 13:22:49 +04:00
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bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
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2008-01-10 22:37:56 +03:00
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2011-04-24 00:39:27 +04:00
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Bit32u op1_32 = read_RMW_virtual_dword(i->seg(), eaddr);
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2012-08-05 17:52:40 +04:00
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Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
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2007-11-17 15:44:10 +03:00
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write_RMW_virtual_dword(op2_32);
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->src(), op1_32);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2007-11-17 15:44:10 +03:00
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}
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2011-07-07 00:01:18 +04:00
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EdGdR(bxInstruction_c *i)
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2007-11-17 15:44:10 +03:00
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{
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2012-08-05 17:52:40 +04:00
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Bit32u op1_32 = BX_READ_32BIT_REG(i->dst());
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Bit32u op2_32 = BX_READ_32BIT_REG(i->src());
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2001-04-10 05:04:59 +04:00
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2012-08-05 17:52:40 +04:00
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BX_WRITE_32BIT_REGZ(i->src(), op1_32);
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BX_WRITE_32BIT_REGZ(i->dst(), op2_32);
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2011-07-07 00:01:18 +04:00
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BX_NEXT_INSTR(i);
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2005-05-21 00:06:50 +04:00
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}
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2001-04-10 05:04:59 +04:00
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2007-12-21 21:24:19 +03:00
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// Note: CMOV accesses a memory source operand (read), regardless
|
|
|
|
// of whether condition is true or not. Thus, exceptions may
|
|
|
|
// occur even if the MOV does not take place.
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVO_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNO_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (!get_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2008-02-03 00:46:54 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVB_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_CF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2008-02-03 00:46:54 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNB_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (!get_CF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2008-02-03 00:46:54 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVZ_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_ZF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2008-02-03 00:46:54 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNZ_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (!get_ZF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2008-02-03 00:46:54 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVBE_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_CF() || get_ZF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2008-02-03 00:46:54 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNBE_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (! (get_CF() || get_ZF()))
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVS_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_SF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNS_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (!get_SF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_PF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNP_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (!get_PF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVL_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (getB_SF() != getB_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNL_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (getB_SF() == getB_OF())
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVLE_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (get_ZF() || (getB_SF() != getB_OF()))
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2007-12-21 21:24:19 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 00:01:18 +04:00
|
|
|
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVNLE_GdEdR(bxInstruction_c *i)
|
2007-12-21 21:24:19 +03:00
|
|
|
{
|
|
|
|
if (! get_ZF() && (getB_SF() == getB_OF()))
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_WRITE_32BIT_REGZ(i->dst(), BX_READ_32BIT_REG(i->src()));
|
2007-12-21 21:24:19 +03:00
|
|
|
|
2012-08-05 17:52:40 +04:00
|
|
|
BX_CLEAR_64BIT_HIGH(i->dst()); // always clear upper part of the register
|
2011-07-07 00:01:18 +04:00
|
|
|
|
|
|
|
BX_NEXT_INSTR(i);
|
2001-04-10 05:04:59 +04:00
|
|
|
}
|