<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
"off_t" and the return value is a "paddr_t" to allow mappings
at offsets past 2^31 bytes. Somewhat inspired by FreeBSD, which
only changed the offset to a "vm_offset_t".
Includes updates for the i386, pc532 and sh3 mmmmap from Jason Thorpe.
and scsipi_device respectively, with size reduction of ncr53c9x_softc.
Specifying NULL instructs the driver to use default adapter and default
device codes. Every target port has ncr53c9x_attach(sc, NULL, NULL) anyway.
I've fixed the problem that's been keeping me from using anything newer than
1.4.1 now. I tracked down the problem checkin, it's the big reorg of
nextdma.c between 1.19 and 1.20. It didn't introduce a new bug but it
activated a check which wasn't activated before. It's the
is-the-limit-in-the-right-window-check which was ifdeffed before because
some DMA-regs would sometimes have strange values. I think I've fixed the
DMA-reg stuff for now: at the end of nextdma_intr, when the csr is poked
to make DMA do something, I think the check for the ENABLE bit introduces a
race condition. I fixed this by unconditionally setting DMACSR_SETENABLE,
this seems to work and also makes the code more readable. I've also tried
setting DMACSR_SETSUPDATE unconditionally and this also works well, but I
don't know what it implies. Unless you have reasons to not set SUPDATE all
the time, I'd suggest making this change as well, it makes the code cleaner
and faster...
I've tested this patch and it does stop the panics, although I don't think setting
SUPDATE all the tima as he suggests is a good idea. The "SUPDATE" bit implies
a single update (i.e. the end of a dma chain.)
now uses the DMACSR_READ bit and no longer keeps _nd_dmadir in softc
unified transfer cleanup code, now in routine next_dma_finish_xfer()
fixed bounds checking on registers after transfer.
removed checking for bus errors since the bit is always set on some nexts
(specifically, on mourning, a 25mhz 68040 mono slab)
fixed a couple of dma bugs involving chaining dma buffers.
DMACSR_READ is now a CSR status bit which can be used to know if current transfer is
from cpu to device.
the old DMACSR_READ bit is renamed DMACSR_SETREAD. This is a control bit that tells
the dma transfer to be from cpu to device.
return 0 instead of EINVAL. In this case, there will only be one media
type, and the upper-level if_media code will ensure that the user is
setting to that type.
This matches changes Jason made a while back to sys/dev/ic/lance.c
managed pages, into KVA space. Since the pages are managed, we should
use pmap_enter(), not pmap_kenter_pa().
Also, when entering the mappings, enter with an access_type of
VM_PROT_READ | VM_PROT_WRITE. We do this for a couple of reasons:
(1) On systems that have H/W mod/ref attributes, the hardware
may not be able to track mod/ref done by a bus master.
(2) On systems that have to do mod/ref emulation, this prevents
a mod/ref page fault from potentially happening while in an
interrupt context, which can be problematic.
This latter change is fairly important if we ever want to be able to
transfer DMA-safe memory pages to anonymous memory objects; we will need
to know that the pages are modified, or else data could be lost!
Note that while the pages are unowned (i.e. "just DMA-safe memory pages"),
they won't consume any swap resources, as the mappings are wired, and
the pages aren't on the active or inactive queues.
directly, call the function pointer (*if_input)(ifp, m). The input routine
expects the packet header to be at the head of the packet, and will adjust
as necessary. Privatize the layer 2 input and output routines, allowing
*_ifattach() to set them up as appropriate.
* Map the message buffer with access_type = VM_PROT_READ|VM_PROT_WRITE `just
because'.
* Map the file system buffers with access_type = VM_PROT_READ|VM_PROT_WRITE to
avoid possible problems with pagemove().
* Do not use VM_PROT_EXEC with either of the above.
* Map pages for /dev/mem with access_type = prot. Also, DO NOT use
pmap_kenter() for this, as we DO NOT want to lose modification information.
* Map pages in dumpsys() with VM_PROT_READ.
* Map pages in m68k mappedcopyin()/mappedcopyout() and writeback() with
access_type = prot.
* For now, bus_dma*(), pmap_map(), vmapbuf(), and similar functions still use
access_type = 0. This should probably be revisited.
These patches include:
Added framebuffer mapping for color framebuffer to support color wscons
which is coming soon.
Renamed wskbdmap_mfii[ch] to wskbdmap_next[ch]
Changed video to be white on black instead of black on white.
Now handles and discards mouse interrupts.
Video and keyboard is now working on mono machines.
write operations appear to lose scsi interrupts and causes timeouts.
changes in this checkin include:
a nextdma bugfix causing a diagnostic check to erroneously trigger
Changed tail strategy to only use tail buffer for the minimal end slop
changed expected write dma overrun to 32 bytes.
turned on nextdma diagnostic check for dma end address since it
no longer gets triggerred by ethernet dma and helps debug scsi dma.
Added esp debugging printout and support.
a filesystem, but is not stable enough yet for general use.
increased priority of ethernet interrupts, mostly useful to aid debugging
of scsi interrupts while using an nfs disk.
added additional debugging output in the next dma driver.
perform extranneous cache flushes/purges before dma reads/ after dma writes
to aid debugging of scsi dma.
Make the initializer for BAUDLO depend on PCLK directly; it was incorrect on
some ports where PCLK is not 4.9152MHz.
XXX Is the default value actually used?
it still probes the disks ok, but is having trouble with 0xdeadbeef
in buffers read from the disk. Suspected problems with DMA alignment
and toggling the secret ninja dma control register
remove check for normal chaining interrupts and add check for combined chaining interrupts
only when used with a tail chain. This allows scsi to work for short unaligned buffers
and large aligned buffers.
tv