Commit Graph

1270 Commits

Author SHA1 Message Date
chris
ceb06608ed Don't pass NULL as an integer. 2003-10-24 23:03:50 +00:00
jdolecek
821f341675 add necessary majors for miscellaneous devices, such as missing
wscons/scsi/isdn devices
2003-10-24 08:18:36 +00:00
kleink
422697679e * Move the definitions for types other than single-precision and double-
precision back to machine-dependent headers.  C99 has no strict
  requirement which, if any, extended-precision type `long double' must
  match, and even between 80-bit formats there are differences in
  implementation (m68k vs. x86).
* On arm, consider __VFP_FP__.
2003-10-23 23:26:06 +00:00
scw
1fdc9cd5a1 Add a defflag for __BUS_SPACE_HAS_STREAM_METHODS, and add the
appropriate glue in bus.h, contingent on the option being defined.

This allows stream methods to be available on a port-by-port basis.
2003-10-23 15:03:24 +00:00
scw
41e7743573 Map the expansion bus registers. 2003-10-23 09:32:17 +00:00
scw
0df102009a Add a few more register definitions. 2003-10-23 09:29:36 +00:00
scw
3a414f559e Use pmap_enter() instead of pmap_kenter_pa() as the former automatically
ensures the mapping is cache-inhibited, so we don't have to frob the PTE
directly.
2003-10-23 09:25:44 +00:00
scw
0fd0c83111 A few minor tweaks to the onfault handlers.
Save some instructions in the non-fault return path.
2003-10-23 09:11:35 +00:00
scw
52c15bbd20 Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop
instead.

With this change, we no longer need to save the current interrupt level
in the switchframe. This is no great loss since both cpu_switch and
cpu_switchto are always called at splsched, so the process' spl is
effectively saved somewhere in the callstack.

This fixes an evbarm problem reported by Allen Briggs:

        lwp gets into sa_switch -> mi_switch with newl != NULL
            when it's the last element on the runqueue, so it
            hits the second bit of:
                if (newl == NULL) {
                        retval = cpu_switch(l, NULL);
                } else {
                        remrunqueue(newl);
                        cpu_switchto(l, newl);
                        retval = 0;
                }

        mi_switch calls remrunqueue() and cpu_switchto()

        cpu_switchto unlocks the sched lock
        cpu_switchto drops CPU priority
        softclock is received
        schedcpu is called from softclock
        schedcpu hits the first if () {} block here:
                if (l->l_priority >= PUSER) {
                        if (l->l_stat == LSRUN &&
                            (l->l_flag & L_INMEM) &&
                            (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) {
                                remrunqueue(l);
                                l->l_priority = l->l_usrpri;
                                setrunqueue(l);
                        } else
                                l->l_priority = l->l_usrpri;
                }

        Since mi_switch has already run remrunqueue, the LWP has been
            removed, but it's not been put back on any queue, so the
            remrunqueue panics.
2003-10-23 08:59:10 +00:00
skrll
601de4df8c Rename dsrtc to ds1687rtc to avoid conflicting with the MI i2c
ds1307 driver.

Hi Jason.
2003-10-21 08:15:39 +00:00
briggs
093821886e Define SIGTRAMP_VALID(v). 2003-10-18 17:57:06 +00:00
jdolecek
4bb42bc621 switch ARM to use same minor for /dev/zero as other archs
as discussed on tech-arm@
2003-10-16 12:02:58 +00:00
scw
def6ab457b Remove the #ifdef __XSCALE__ around the strd test as the instruction
is available on any v5E processor.

Pointed out by Richard Earnshaw.
2003-10-15 14:07:03 +00:00
scw
9be5d4cbe9 Document the need for pcb32_r8 to be quad-aligned, now that cpuswitch()
uses Xscale's "strd" instruction.
2003-10-13 21:46:39 +00:00
scw
63d24b09fd A couple of Xscale tweaks:
- Use the "clz" instruction to pick a run-queue, instead of using the
   ffs-by-table-lookup method.
 - Use strd instead of stmia where possible.
 - Use multiple ldr instructions instead of ldmia where possible.
2003-10-13 21:44:27 +00:00
scw
100d67ec52 Xscale-optimised bcopyinout.
Contributed by Wasabi Systems.
2003-10-13 21:22:40 +00:00
scw
3bf49b3ae8 Tweak the read/write data abort check to recognise Xscale's strd/ldrd
instructions.

While the original code matched "strd" just fine, it also matched
the "ldrd" instruction ...
2003-10-13 21:13:30 +00:00
scw
9d9ddf0409 Xscale-optimised b{copy,zero}_page().
Contributed by Wasabi Systems.
2003-10-13 21:03:13 +00:00
scw
063066a055 On Xscale, define PMAP_UAREA() and use it to tweak uarea mappings so
they use the mini D$.

This results in a small performance boost on xscale platforms, since
flushing the main cache on a context switch won't affect the kernel
stack/pcb.
2003-10-13 20:50:34 +00:00
jdolecek
ef5bb330f5 reassing majors for crypto and pf to use the newly defined MI major
range
2003-10-10 22:42:39 +00:00
jdolecek
4e915c9ccd update the comment - the space for machine-dependant majors
is reduced to 0-143
follows discussion on tech-kern
2003-10-10 21:21:25 +00:00
matt
0dbe439e05 Adapt ARM Linux compat code to deal with SIGINFO. 2003-10-10 14:44:42 +00:00
thorpej
901da40cf9 Add some accessor macros for the ucontext:
* _UC_MACHINE_PC() - access the program counter
* _UC_MACHINE_INTRV() - access the integer return value register
* _UC_MACHINE_SET_PC() - set the program counter (this requires
  special handling on some platforms).
2003-10-08 22:43:01 +00:00
scw
0047ff3f6e Ok, I give up for now. There's no easy/reliable way to deal with
these spurious interrupts.
2003-10-08 19:46:12 +00:00
scw
677ee2fdbf Simplify the last change to just check for spurious GPIO interrupts. 2003-10-08 19:39:40 +00:00
scw
ecc5fec473 If no interrupt handler claims to have dealt with a level-triggered
GPIO interrupt, check the GPIO interrupt status register after clearing
it down to see if the interrupt source has disappeared. If it does,
assume it was a spurious event. Otherwise, panic.
2003-10-08 19:31:17 +00:00
scw
fb2c521159 Make it easier to support different types of IXP425 board:
- Move board-specific PCI/GPIO initialisation to its rightful place.

 - Handle clearing down latched GPIO interrupts in a board-independent way.

 - Use MI com(4) driver for on-chip UARTs.

 - Misc. tidying up.

Tested on IXDP425.
2003-10-08 14:55:04 +00:00
lukem
1c33b4e6a4 Overhaul MBR handling (part 1):
<sys/bootblock.h>:
    *	Added definitions for the Master Boot Record (MBR) used by
	a variety of systems (primarily i386), including the format
	of the BIOS Parameter Block (BPB).
	This information was cribbed from a variety of sources
	including <sys/disklabel_mbr.h> which this is a superset of.

	As part of this, some data structure elements and #defines
	were renamed to be more "namespace friendly" and consistent
	with other bootblocks and MBR documentation.
	Update all uses of the old names to the new names.

<sys/disklabel_mbr.h>:
    *	Deprecated in favor of <sys/bootblock.h> (the latter is more
	"host tool" friendly).

amd64 & i386:
    *	Renamed /usr/mdec/bootxx_dosfs to /usr/mdec/bootxx_msdos, to
	be consistent with the naming convention of the msdosfs tools.

    *	Removed /usr/mdec/bootxx_ufs, as it's equivalent to bootxx_ffsv1
	and it's confusing to have two functionally equivalent bootblocks,
	especially given that "ufs" has multiple meanings (it could be
	a synonym for "ffs", or the group of ffs/lfs/ext2fs file systems).

    *	Rework pbr.S (the first sector of bootxx_*):
	    +	Ensure that BPB (bytes 11..89) and the partition table
		(bytes 446..509) do not contain code.
	    +	Add support for booting from FAT partitions if BOOT_FROM_FAT
		is defined.  (Only set for bootxx_msdos).
	    +	Remove "dummy" partition 3; if people want to installboot(8)
		these to the start of the disk they can use fdisk(8) to
		create a real MBR partition table...
	    +	Compile with TERSE_ERROR so it fits because of the above.
		Whilst this is less user friendly, I feel it's important
		to have a valid partition table and BPB in the MBR/PBR.

    *	Renamed /usr/mdec/biosboot to /usr/mdec/boot, to be consistent
	with other platforms.

    *	Enable SUPPORT_DOSFS in /usr/mdec/boot (stage2), so that
    	we can boot off FAT partitions.

    *	Crank version of /usr/mdec/boot to 3.1, and fix some of the other
	entries in the version file.

installboot(8) (i386):
    *	Read the existing MBR of the filesystem and retain the BIOS
    	Parameter Block (BPB) in bytes 11..89 and the MBR partition
	table in bytes 446..509.  (Previously installboot(8) would
	trash those two sections of the MBR.)

mbrlabel(8):
    *	Use sys/lib/libkern/xlat_mbr_fstype.c instead of homegrown code
	to map the MBR partition type to the NetBSD disklabel type.


Test built "make release" for i386, and new bootblocks verified to work
(even off FAT!).
2003-10-08 04:25:43 +00:00
thorpej
68723a995b * Shuffle some data structures so, and add a flags word to ksiginfo_t.
Right now the only flag is used to indicate if a ksiginfo_t is a
  result of a trap.  Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap.  Expands to 0 if the ksiginfo_t was
  not the result of a trap.  This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
  Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
  the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern.  Reviewed and OK's by Christos.
2003-10-08 00:28:40 +00:00
thorpej
2c0d381bd7 New generic I2C framework. Supports bit-bang and "intelligent" I2C
interface controllers (of varying intelligence levels).

Contributed by Wasabi Systems, Inc.  Primarily written by Steve Woodford,
with some modification by me.

(NOTE: "cvs ci" was missed on this directory during the initial checkin
of the new I2C code.)
2003-10-06 16:11:19 +00:00
thorpej
d322684f55 Add support for the i80312 and i80321 I2C controllers. 2003-10-06 16:06:05 +00:00
thorpej
df011fda1d Make sure to pass mod/ref seeds with PMAP_WIRED. 2003-10-06 15:43:35 +00:00
thorpej
388386eef7 Make sure to pass mod/ref seeds with PMAP_WIRED. 2003-10-06 00:40:36 +00:00
matt
73ca535921 Add SA_SIGINFO support for ARM (from Chris Gilbert). 2003-10-05 19:44:58 +00:00
jdolecek
e6286b949a Add some framework for MI assignment of device majors - add sys/dev/majors
which is automatically included during kernel config, and add comments
to individual machine-dependant majors.* files to assign new MI majors
in MI file.

Range 0-191 is reserved for machine-specific assignments, range
192+ are MI assignments.

Follows recent discussion on tech-kern@
2003-10-05 08:04:24 +00:00
bsh
81227d1ae1 avoid compile error with GCC3, and add some comments. 2003-10-03 07:24:05 +00:00
thorpej
2652188cc4 New generic I2C framework. Supports bit-bang and "intelligent" I2C
interface controllers (of varying intelligence levels).

Contributed by Wasabi Systems, Inc.  Primarily written by Steve Woodford,
with some modification by me.
2003-09-30 00:35:30 +00:00
scw
960dfae23f Define ELF32_MACHDEP_ENDIANNESS according to target byte order. 2003-09-29 09:08:20 +00:00
nathanw
4d59420344 Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
so that they can be used in a namespace-friendly way.
2003-09-26 22:45:41 +00:00
simonb
550b4bef88 Fix "constify sendsig/trapsignal" fallout for non-siginfo'd archs. Test
compiled on most architectures.
2003-09-26 12:02:55 +00:00
ichiro
066497ec38 add comment and delete unused definition 2003-09-25 14:48:16 +00:00
ichiro
663ccee1cc pci bus support 2003-09-25 14:11:18 +00:00
mycroft
3e08e45a55 Fix GCC 3 barfage. 2003-09-24 11:57:44 +00:00
scw
6b19830ebb Tweak register usage to shave a couple of instructions off
the Xscale code.
2003-09-23 10:01:36 +00:00
matt
6bf111a80e Fix GCC 3.3.1 nits. 2003-09-21 19:32:37 +00:00
matt
b9d20d131e Fix GCC 3.3.1 nits 2003-09-21 15:12:16 +00:00
matt
2d54fd3a9c Change some type-punning detected by gcc 3.3.1 to (void *). 2003-09-21 00:26:09 +00:00
agc
81976735fd If we're going to reference SA variables in this file, might as well
include the header file to define them. From Steve Woodford.
2003-09-19 11:42:20 +00:00
cl
2c1366cfee add MD part of SA/pthread pagefault handling on arm 2003-09-18 22:37:38 +00:00
ichiro
22d06d95f5 fix typo
#if DEBUG -> #ifdef PCI_DEBUG
2003-09-15 05:11:31 +00:00