NetBSD/sys/arch/arm
scw 52c15bbd20 Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop
instead.

With this change, we no longer need to save the current interrupt level
in the switchframe. This is no great loss since both cpu_switch and
cpu_switchto are always called at splsched, so the process' spl is
effectively saved somewhere in the callstack.

This fixes an evbarm problem reported by Allen Briggs:

        lwp gets into sa_switch -> mi_switch with newl != NULL
            when it's the last element on the runqueue, so it
            hits the second bit of:
                if (newl == NULL) {
                        retval = cpu_switch(l, NULL);
                } else {
                        remrunqueue(newl);
                        cpu_switchto(l, newl);
                        retval = 0;
                }

        mi_switch calls remrunqueue() and cpu_switchto()

        cpu_switchto unlocks the sched lock
        cpu_switchto drops CPU priority
        softclock is received
        schedcpu is called from softclock
        schedcpu hits the first if () {} block here:
                if (l->l_priority >= PUSER) {
                        if (l->l_stat == LSRUN &&
                            (l->l_flag & L_INMEM) &&
                            (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) {
                                remrunqueue(l);
                                l->l_priority = l->l_usrpri;
                                setrunqueue(l);
                        } else
                                l->l_priority = l->l_usrpri;
                }

        Since mi_switch has already run remrunqueue, the LWP has been
            removed, but it's not been put back on any queue, so the
            remrunqueue panics.
2003-10-23 08:59:10 +00:00
..
arm Xscale-optimised bcopyinout. 2003-10-13 21:22:40 +00:00
arm32 Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop 2003-10-23 08:59:10 +00:00
conf reassing majors for crypto and pf to use the newly defined MI major 2003-10-10 22:42:39 +00:00
footbridge Rename dsrtc to ds1687rtc to avoid conflicting with the MI i2c 2003-10-21 08:15:39 +00:00
fpe-arm Merge the nathanw_sa branch. 2003-01-17 21:55:23 +00:00
include Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop 2003-10-23 08:59:10 +00:00
iomd New generic I2C framework. Supports bit-bang and "intelligent" I2C 2003-10-06 16:11:19 +00:00
ixp12x0 Fix GCC 3.3.1 nits. 2003-09-21 19:32:37 +00:00
mainbus __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
ofw __KERNEL_RCSID() 2003-07-15 00:24:37 +00:00
s3c2xx0 Fix GCC 3 barfage. 2003-09-24 11:57:44 +00:00
sa11x0 split StrongArm companion chip (sacc) driver so that we can support 2003-08-08 12:29:22 +00:00
xscale Ok, I give up for now. There's no easy/reliable way to deal with 2003-10-08 19:46:12 +00:00
Makefile cats and netwinder can share a common footbridge_intr.h file, so install and 2002-09-28 15:53:03 +00:00