Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop
instead.
With this change, we no longer need to save the current interrupt level
in the switchframe. This is no great loss since both cpu_switch and
cpu_switchto are always called at splsched, so the process' spl is
effectively saved somewhere in the callstack.
This fixes an evbarm problem reported by Allen Briggs:
lwp gets into sa_switch -> mi_switch with newl != NULL
when it's the last element on the runqueue, so it
hits the second bit of:
if (newl == NULL) {
retval = cpu_switch(l, NULL);
} else {
remrunqueue(newl);
cpu_switchto(l, newl);
retval = 0;
}
mi_switch calls remrunqueue() and cpu_switchto()
cpu_switchto unlocks the sched lock
cpu_switchto drops CPU priority
softclock is received
schedcpu is called from softclock
schedcpu hits the first if () {} block here:
if (l->l_priority >= PUSER) {
if (l->l_stat == LSRUN &&
(l->l_flag & L_INMEM) &&
(l->l_priority / PPQ) != (l->l_usrpri / PPQ)) {
remrunqueue(l);
l->l_priority = l->l_usrpri;
setrunqueue(l);
} else
l->l_priority = l->l_usrpri;
}
Since mi_switch has already run remrunqueue, the LWP has been
removed, but it's not been put back on any queue, so the
remrunqueue panics.
This commit is contained in:
scw
parent
65d5587ddd
commit
52c15bbd20
@ -1,4 +1,4 @@
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/* $NetBSD: cpuswitch.S,v 1.37 2003/10/13 21:44:27 scw Exp $ */
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/* $NetBSD: cpuswitch.S,v 1.38 2003/10/23 08:59:10 scw Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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@ -195,28 +195,45 @@ ASENTRY_NP(idle)
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#if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
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bl _C_LABEL(sched_unlock_idle)
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#endif
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ldr r3, .Lcpu_do_powersave
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/* Enable interrupts */
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IRQenable
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ldr r6, .Lcpu_do_powersave
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/* Lower the spl level to spl0 and get the current spl level. */
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#ifdef __NEWINTR
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mov r0, #(IPL_NONE)
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bl _C_LABEL(_spllower)
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#else /* ! __NEWINTR */
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mov r0, #(_SPL_0)
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bl _C_LABEL(splx)
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#endif /* __NEWINTR */
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/* Old interrupt level in r0 */
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/* If we don't want to sleep, use a simpler loop. */
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ldr r3, [r3] /* r3 = cpu_do_powersave */
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teq r3, #0
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ldr r6, [r6] /* r6 = cpu_do_powersave */
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teq r6, #0
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bne 2f
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/* Non-powersave idle. */
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1: /* should maybe do uvm pageidlezero stuff here */
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ldr r3, [r7] /* r3 = whichqs */
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teq r3, #0x00000000
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bne .Lswitch_search
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b 1b
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beq 1b
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adr lr, .Lswitch_search
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b _C_LABEL(splx) /* Restore ipl, return to switch_search */
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2: /* Powersave idle. */
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ldr r4, .Lcpufuncs
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mov r6, r0 /* Preserve old interrupt level */
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3: ldr r3, [r7] /* r3 = whichqs */
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teq r3, #0x00000000
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bne .Lswitch_search
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moveq r0, r6
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adreq lr, .Lswitch_search
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beq _C_LABEL(splx) /* Restore ipl, return to switch_search */
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/* if saving power, don't want to pageidlezero */
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mov r0, #0
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@ -259,25 +276,7 @@ ENTRY(cpu_switch)
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/* stash the old proc while we call functions */
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mov r5, r0
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#if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
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/* release the sched_lock before handling interrupts */
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bl _C_LABEL(sched_unlock_idle)
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#endif
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/* Lower the spl level to spl0 and get the current spl level. */
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#ifdef __NEWINTR
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mov r0, #(IPL_NONE)
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bl _C_LABEL(_spllower)
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#else /* ! __NEWINTR */
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mov r0, #(_SPL_0)
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bl _C_LABEL(splx)
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#endif /* __NEWINTR */
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/* Push the old spl level onto the stack */
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str r0, [sp, #-0x0004]!
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/* First phase : find a new lwp */
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ldr r7, .Lwhichqs
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/* rem: r5 = old lwp */
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@ -285,9 +284,6 @@ ENTRY(cpu_switch)
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.Lswitch_search:
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IRQdisable
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#if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
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bl _C_LABEL(sched_lock_idle)
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#endif
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/* Do we have any active queues */
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ldr r3, [r7]
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@ -369,8 +365,8 @@ ENTRY(cpu_switch)
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str r0, [r7, #(L_BACK)]
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/* Update the RAM copy of the queue not empty flags word. */
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ldr r7, .Lwhichqs
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str r3, [r7]
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ldreq r7, .Lwhichqs
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streq r3, [r7]
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/* rem: r1 = old lwp */
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/* rem: r3 = whichqs - NOT NEEDED ANY MORE */
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@ -398,7 +394,13 @@ ENTRY(cpu_switch)
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mov r1, r7
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#endif
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.Lswitch_resume:
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/* rem: r1 = old lwp */
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/* rem: r4 = return value [not used if came from cpu_switchto()] */
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/* rem: r6 = new process */
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/* rem: interrupts are disabled */
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#ifdef MULTIPROCESSOR
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/* XXX use curcpu() */
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ldr r0, .Lcpu_info_store
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@ -745,16 +747,11 @@ ENTRY(cpu_switch)
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*/
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ldr r2, [r5, #(P_NRAS)]
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ldr r4, [r7, #(PCB_TF)] /* r4 = trapframe (used below) */
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ldr r1, [r7, #(PCB_TF)] /* r1 = trapframe (used below) */
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teq r2, #0 /* p->p_nras == 0? */
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bne .Lswitch_do_ras /* no, check for one */
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.Lswitch_return:
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/* Get the spl level from the stack and update the current spl level */
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ldr r0, [sp], #0x0004
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bl _C_LABEL(splx)
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/* cpu_switch returns 1 == switched, 0 == didn't switch */
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mov r0, r4
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@ -765,11 +762,12 @@ ENTRY(cpu_switch)
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ldmfd sp!, {r4-r7, pc}
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.Lswitch_do_ras:
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ldr r1, [r4, #(TF_PC)] /* second ras_lookup() arg */
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ldr r1, [r1, #(TF_PC)] /* second ras_lookup() arg */
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mov r0, r5 /* first ras_lookup() arg */
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bl _C_LABEL(ras_lookup)
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cmn r0, #1 /* -1 means "not in a RAS" */
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strne r0, [r4, #(TF_PC)]
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ldrne r1, [r7, #(PCB_TF)]
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strne r0, [r1, #(TF_PC)]
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b .Lswitch_return
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.Lswitch_exited:
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@ -798,55 +796,25 @@ ENTRY(cpu_switch)
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ENTRY(cpu_switchto)
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stmfd sp!, {r4-r7, lr}
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/* Lower the spl level to spl0 and get the current spl level. */
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mov r6, r0 /* save old lwp */
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mov r5, r1 /* save new lwp */
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mov r6, r1 /* save new lwp */
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#if defined(LOCKDEBUG)
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/* release the sched_lock before handling interrupts */
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mov r5, r0 /* save old lwp */
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bl _C_LABEL(sched_unlock_idle)
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#endif
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#ifdef __NEWINTR
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mov r0, #(IPL_NONE)
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bl _C_LABEL(_spllower)
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#else /* ! __NEWINTR */
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#ifdef spl0
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mov r0, #(_SPL_0)
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bl _C_LABEL(splx)
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mov r1, r5
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#else
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bl _C_LABEL(spl0)
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#endif /* spl0 */
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#endif /* __NEWINTR */
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/* Push the old spl level onto the stack */
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str r0, [sp, #-0x0004]!
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mov r1, r0
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#endif
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IRQdisable
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#if defined(LOCKDEBUG)
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bl _C_LABEL(sched_lock_idle)
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#endif
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mov r0, r6 /* restore old lwp */
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mov r1, r5 /* restore new lwp */
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/* rem: r0 = old lwp */
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/* rem: r1 = new lwp */
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/* rem: interrupts are disabled */
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/*
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* Okay, set up registers the way cpu_switch() wants them,
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* and jump into the middle of it (where we bring up the
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* new process).
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*
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* r1 = old lwp (r6 = new lwp)
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*/
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mov r6, r1 /* r6 = new lwp */
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#if defined(LOCKDEBUG)
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mov r5, r0 /* preserve old lwp */
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bl _C_LABEL(sched_unlock_idle)
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mov r1, r5 /* r1 = old lwp */
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#else
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mov r1, r0 /* r1 = old lwp */
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#endif
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b .Lswitch_resume
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/*
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@ -1007,6 +975,14 @@ ENTRY(savectx)
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ldmfd sp!, {r4-r7, pc}
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ENTRY(proc_trampoline)
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#ifdef __NEWINTR
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mov r0, #(IPL_NONE)
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bl _C_LABEL(_spllower)
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#else /* ! __NEWINTR */
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mov r0, #(_SPL_0)
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bl _C_LABEL(splx)
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#endif /* __NEWINTR */
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#ifdef MULTIPROCESSOR
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bl _C_LABEL(proc_trampoline_mp)
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: vm_machdep.c,v 1.29 2003/07/15 00:24:42 lukem Exp $ */
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/* $NetBSD: vm_machdep.c,v 1.30 2003/10/23 08:59:10 scw Exp $ */
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/*
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* Copyright (c) 1994-1998 Mark Brinicombe.
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@ -44,7 +44,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.29 2003/07/15 00:24:42 lukem Exp $");
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__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.30 2003/10/23 08:59:10 scw Exp $");
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#include "opt_armfpe.h"
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#include "opt_pmap_debug.h"
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@ -197,7 +197,6 @@ cpu_lwp_fork(l1, l2, stack, stacksize, func, arg)
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tf->tf_usr_sp = (u_int)stack + stacksize;
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sf = (struct switchframe *)tf - 1;
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sf->sf_spl = 0; /* always equivalent to spl0() */
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sf->sf_r4 = (u_int)func;
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sf->sf_r5 = (u_int)arg;
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sf->sf_pc = (u_int)proc_trampoline;
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@ -211,7 +210,6 @@ cpu_setfunc(struct lwp *l, void (*func)(void *), void *arg)
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struct trapframe *tf = pcb->pcb_tf;
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struct switchframe *sf = (struct switchframe *)tf - 1;
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sf->sf_spl = 0; /* always equivalent to spl0() */
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sf->sf_r4 = (u_int)func;
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sf->sf_r5 = (u_int)arg;
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sf->sf_pc = (u_int)proc_trampoline;
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@ -1,4 +1,4 @@
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/* $NetBSD: frame.h,v 1.5 2002/10/19 00:10:54 bjh21 Exp $ */
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/* $NetBSD: frame.h,v 1.6 2003/10/23 08:59:10 scw Exp $ */
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/*
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* Copyright (c) 1994-1997 Mark Brinicombe.
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@ -83,7 +83,6 @@ typedef struct irqframe {
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*/
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struct switchframe {
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int sf_spl;
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u_int sf_r4;
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u_int sf_r5;
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u_int sf_r6;
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