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788 Commits

Author SHA1 Message Date
matt
511223b674 If ALTIVEC is not defined, treat EXC_VEC|EXC_USER exceptions as PGM 
exceptions.  [Note that we still can't trap these due to issues in
trap_subr.S which are (yet) fixed]
 2002-06-27 21:15:35 +00:00
matt
cd85109523 Make traps even smaller by noticing the checking of privilege mode and 
use of curpcb/USPACE is common and move that into the common trap processing.
 2002-06-26 20:00:17 +00:00
matt
1a5c0cf685 When not using the OLD pmap, bump kernel KVA space to 512MB (OLD pmap stays 
at 256MB).
 2002-06-26 01:16:22 +00:00
matt
7a12a9737c Revamp how SR(s) are loaded on the user/kernel boundary. We now load all 
16 SR registers when transitioning between kernel and user.  Also, don't
reload the kernel SR(s) on every trap but only on traps from user space.
Instead of loading magic SRs for the kernel, load the kernel SRs from the
kernel_pmap_.  This makes trap_subr.S completely ignorant of SR uses and
so they can change with having to change trap_subr.S.  Also note that
since the user and kernel get complete SR sets, user VA space can now be
increased to 4GB if desired.
 2002-06-26 01:14:45 +00:00
matt
7c77963b01 Set SR_PRKEY for user pmaps. For the kernel SR(s) set SR_SUKEY|SR_PRKEY. 
Note that we never use a PTE PP of 0 or 1 (supervisor protection) so the
"key" is basically unused.  However, use SR_PRKEY for user space is
conceptionally the right thing to do.  Currently the kernel_pmap SR(s) are
ignored but that is going to be fixed shortly.
 2002-06-26 01:10:20 +00:00
thorpej
aaf6e7902d Add ENTRY_NOPROFILE(). 2002-06-23 17:26:58 +00:00
briggs
31d3b62eff Pick up support for a few more things for the IBM750FX: l2cache 
configuration and temperature sensor support, for example.
 2002-06-21 01:38:57 +00:00
matt
6fcbf3b943 Don't load the SR registers on a context switch. They get switched from 
the user's SR registers to the kernel's SR registers on an exception or
interrupt from user level and restored with the user's SR register when the
exception or interrupt returns back to user level.
 2002-06-21 00:46:18 +00:00
matt
365f1d6150 Add support for IBM750FX (used in latest iBooks). 2002-06-21 00:01:53 +00:00
matt
da483421e8 Add IBM750FX (0x7000) 2002-06-20 23:51:22 +00:00
briggs
029a7e8e9a - The 8240 and 8245 have a 603 core -- add them to the 603 lists... 
- Use atop(dcache_size / assoc) for uvm_page_recolor(ing) instead
  of  atop(dcache_line_size / assoc).
 2002-06-19 17:43:30 +00:00
briggs
d6cfd2cc8c Include the Processor ID for the MPC8245. 2002-06-19 17:39:26 +00:00
wrstuden
2eb3dc82d8 Fix recent bugs seen on Performa 4400 macppc's by 
Makoto Fujiwara <makoto@ki.nu> and Manuel Bouyer <bouyer@netbsd.org>.
Help from Allen Briggs, Jason Thorpe, and Matt Thomas.

We need to call cpu_cache_probe() early in boot (machdep.c).
Add 603 info for completeness, and use NBPG not PAGESIZE, as the
latter relies on uvm being setup (cpu_subr.c).
Let uvm_page_recolor() be called before uvm has been set up; just
note the page coloring value (uvm_page.c).
 2002-06-19 17:01:18 +00:00
matt
c937154e18 Add a missing return; after print the 745x cache size(s). 2002-06-17 21:28:48 +00:00
christos
281c8c638b apply the fix from the powerpc port. this is almost a copy of powerpc/trap.c 
and needs to be refactored.
 2002-06-17 21:08:56 +00:00
christos
eb5c1061a2 try to make this compile. 2002-06-17 21:07:40 +00:00
christos
3b50728cf4 MD systrace gluons. 2002-06-17 16:32:57 +00:00
kleink
dd6cccb3f2 Add a case label for the 603ev cache (identical to 603e). 2002-06-11 22:24:35 +00:00
scw
9f2155138c Fix a botched pmap_vsid_bitmap[] index. 
I'm surprised this worked as long as it did.
 2002-06-05 15:55:51 +00:00
drochner
d2b9876081 move initialization of the "struct pglist" returned by uvm_pglistalloc() 
from the calling code into uvm_pglistalloc() itself for consistency
and easier error handling
 2002-06-02 14:44:35 +00:00
lukem
06de426449 SIMPLEQ rototill: 
- implement SIMPLEQ_REMOVE(head, elm, type, field).  whilst it's O(n),
  this mirrors the functionality of SLIST_REMOVE() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
  this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
 2002-06-01 23:50:52 +00:00
tsubai
5fcd112b3a Add gcc 3.x version. 2002-06-01 09:22:44 +00:00
kleink
0bf753ef67 Cosmetics: there are exceptions to the PVR major/minor rule. 2002-05-31 20:10:45 +00:00
kleink
46b946bc5f Fill in real cache size/organization information and recolor; currently 
doesn't make a difference except for the 604e.

XXX Does not consider L2 caches yet.
 2002-05-31 15:04:14 +00:00
augustss
e916f073c3 Add bus_space_vaddr(). 2002-05-31 11:31:30 +00:00
augustss
cea3466ea6 Add NEED_BINARY, similar to NEED_SREC. 2002-05-19 18:57:33 +00:00
augustss
7202dc2f30 Add CPU_CI symbol so that bzero.S actually compiles on ports other than walnut. 2002-05-19 18:56:54 +00:00
jdolecek
2fc860bc0d make usable in LKM context (use #if defined(_KERNEL_OPT)) 2002-05-19 16:55:43 +00:00
augustss
aaf6178285 Handle the "aligment" fault generated by DCBZ when the cache is off. 
That way you can run the processor with caches off.
 2002-05-19 06:35:45 +00:00
matt
0a6d35b7ed Nuke local extern label_t *db_recover; it's now in <ddb/db_extern.h> 2002-05-13 20:30:07 +00:00
matt
f62dc5c664 Remove redundant declarations. 2002-05-13 07:04:24 +00:00
matt
d210f0530b Eliminate commons. 2002-05-13 06:05:32 +00:00
kleink
ba482b3950 * On the 601, obliterate all BAT entries when returning from kernel to 
userlevel; this is necessary due to the 601, unlike other 6xx, having
  no concept of separated Valid_user vs. Valid_supervisor for BATs.
* When crossing the kernel/userlevel boundary, have platform-provided
  hooks set up the two fixed BAT entries, and possibly additional
  segment registers to redeem the 601's BAT limitations.

Both of the above are only built if the $MACHINE provides these hooks,
sparing others the pain.
 2002-05-02 16:47:49 +00:00
kleink
3626919f4c Oops, swapped mtsrin operands in previous. 2002-04-23 17:14:45 +00:00
kleink
3a03930d13 Add a third argument to pmap_bootstrap() which platform-specific 
initialization can use to specify additional segment registers to be set
up in the kernel pmap.
 2002-04-23 12:41:04 +00:00
kleink
0b463cc8f9 Express tempsave and disisave addresses using the symbolic names of the 
exception handlers which they are `borrowed' from.
 2002-04-22 23:20:08 +00:00
kleink
0b82377f11 Fix a swapped register pasto(?) introduced in rev. 1.17. 2002-04-22 18:31:11 +00:00
kleink
884898e332 Convert the spill stack frame to use symbolic offset names; inspired by 
a conversation with Matt Thomas.
 2002-04-21 22:05:45 +00:00
kleink
a641861ab8 Rig pmap_print_mmuregs() for the 601. 2002-04-19 20:56:56 +00:00
kleink
99d4b7c71f Unused; already implemented in libkern. 2002-04-18 21:42:36 +00:00
matt
66c475ca19 Use a common genassym.cf for all the PPC_MPC6XX ports. Add a makeoptions to 
std.foo to indicate the directory to get genassym.cf from.  Add an intrframe
to <powerpc/frame.h> and make trap_subr.S use symbolic offsets into it.
 2002-04-18 20:08:05 +00:00
kleink
eb225418ed Don't do random replacement in isitrap601; just like isitrap. 2002-04-18 12:33:26 +00:00
matt
54d0dedd0c Cleanup the debug prints in pmap_enter. 2002-04-13 15:58:30 +00:00
briggs
4fb4a95b7e Install cpu.h. Noted in PR port-powerpc/16285 from smi@sm.sony.co.jp. 2002-04-10 15:36:42 +00:00
matt
f8b9dbe468 Add some MPC745x L3CR cache definitions. 2002-04-03 00:12:41 +00:00
matt
830666e31e Clean the icache for pages when they are entered as executable and before 
they were either not mapped at all or mapped as non-executable.  Round
memory regions in pmap_bootstrap.
 2002-04-03 00:12:07 +00:00
matt
7e121bd39d Properly print out 745x cache information. 2002-04-03 00:09:52 +00:00
eeh
67c9b24c04 Follow the post-UBC semantics of resetting ref/mod collection inside of 
pmap_clear_{reference,modify}().
 2002-03-28 18:07:31 +00:00
kleink
1b6af7fb37 Add separate 601 versions of DSI/ISI trap entries, considering the 
different battable entry format and the combined BAT implementation.
 2002-03-27 15:40:46 +00:00
kleink
032762e1e9 On the 601, construct the CPU counter value from the RTC[UL] registers. 2002-03-26 21:50:39 +00:00
matt
12810ed37d Use size_t in prototype (so this will be LP64 clean for PPC64 someday). 
Calculate len separately for icache & dcache in case each has different
cacheline widths.  Make the code for both loops the same except for the
dcbst/icbi.  Deal with sizes >=2GB properly (like that'll happen but ...)
 2002-03-26 21:20:24 +00:00
kleink
7e9d845469 * Add MPC601 versions of BAT_VA_MATCH_P() and BAT_VALID_P(). 
* Make the extern declaration of the battable array incomplete;
  a given port might want to use a differently-sized definition to
  support the 601 BAT implementation, where blocks map up to 8M only.
 2002-03-25 21:35:45 +00:00
briggs
a2e0bd5a5d Use p->p_psstr instead of PS_STRINGS. 
Tested on boot to multi-user on sandpoint.
 2002-03-18 04:50:32 +00:00
eeh
0754ce0386 Use properties instead of board_info. 2002-03-15 21:12:07 +00:00
eeh
75343f2177 Use new non-PCI mainbus. 2002-03-15 21:10:46 +00:00
eeh
5468c6fb37 Fixup distinguishing between user and kernel addresses for IBM 4xx CPUs. 2002-03-15 21:01:28 +00:00
eeh
de5252061e Use properties to pass around board-specific information rather than a 
structure.
 2002-03-15 20:59:23 +00:00
eeh
7c79cb049f Some files have been moved into powerpc/ibm4xx. 2002-03-14 17:27:59 +00:00
eeh
a3833eb1c6 Add this file. 2002-03-13 23:59:58 +00:00
eeh
d26d3b351c This should be pretty standard. 2002-03-13 23:12:11 +00:00
eeh
2277f9518e Delete this file. It's only relevent to 405gp. 2002-03-13 23:09:52 +00:00
eeh
2b55b12b59 405gp-specific DCRs. 2002-03-13 23:09:11 +00:00
eeh
266bd056b2 Adapt to the new, separate mainbus. 2002-03-13 19:13:10 +00:00
eeh
8e235a382a Add a vector for machine check traps. 2002-03-13 19:11:53 +00:00
eeh
d94ffa460b Generic mainbus driver. 2002-03-13 01:04:16 +00:00
eeh
ba8ac60043 pmap improvements: 
Remove the cache flush routines that have been moved to cpu.c

Make sure we clear out the unused PA bits in the TTE which causes breakage
on some MMU models.
 2002-03-13 00:47:58 +00:00
eeh
9129e6fe1d Generalized IBM UIC driver. 2002-03-13 00:40:50 +00:00
eeh
4b971968ac Add cache_info to cpu_info which provides details about D$ and I$ 
sizes and line sizes.  This is needed for cache flusing, clearing
memory, and several other operations.  This information is accessible
from userland through a new CPU_CACHEINFO sysctl.
 2002-03-13 00:38:13 +00:00
chs
bd2a5f591d switch all mpc6xx powerpc ports to NEWPMAP by default. 
the old pmap is still available with the OLDPMAP option.
 2002-03-09 23:35:56 +00:00
thorpej
a180cee23b Pool deals fairly well with physical memory shortage, but it doesn't 
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map).  Try to deal with this:

* Group all information about the backend allocator for a pool in a
  separate structure.  The pool references this structure, rather than
  the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
  to become available, but will still fail if it cannot callocate KVA
  space for the pages.  If this happens, carefully drain all pools using
  the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
  some pages, and use that information to make draining easier and more
  efficient.
* Get rid of PR_URGENT.  There was only one use of it, and it could be
  dealt with by the caller.

From art@openbsd.org.
 2002-03-08 20:48:27 +00:00
simonb
abf4139889 Include libkern.h for strcmp() prototype. 2002-03-08 01:36:34 +00:00
tsutsui
3c8b0446fe Change type of dumpmag to u_int32_t since it is actually 
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.
 2002-03-06 13:10:18 +00:00
nathanw
3be9fbe42e Move #include <dev/sysmon/sysmonvar.h> inside #ifdef _KERNEL. 2002-03-06 06:37:17 +00:00
kleink
8a79f029ad VRSAVE is SPR 256, not 238. 2002-03-04 13:37:42 +00:00
dbj
b5fde890d0 add cnpollc() calls around cngetc for TRAP_PANICWAIT 2002-03-04 04:07:35 +00:00
kleink
995081f947 Make this link again in the absence of envsys/sysmon. 2002-03-04 00:55:04 +00:00
nathanw
b50fb54af2 Calculate and print the speed of G3 and G4 processors. 
Add code to read the on-chip temperature sensor on the G3 and hook it in
to the envsys/sysmon subsystem. "envstat" now prints the CPU temperature.
 2002-03-03 07:31:33 +00:00
nathanw
1eeb28024d Add sysmon data structures to struct cpu_info. 2002-03-03 07:09:09 +00:00
matt
d26c78e764 All Moto PPC revisions should be printed as maj.min (0x0200 -> 2.0). 2002-03-03 07:09:01 +00:00
matt
e0ba5cf38d Add initial MPC7455 support. 2002-03-03 06:56:09 +00:00
matt
997374a8dd Add MPC7455 2002-03-03 06:47:25 +00:00
nathanw
5d5aeaa547 Add bit definitions for the MMCR's, and event numbers for the events 
that are common to the G3 and G4.
 2002-03-03 06:38:31 +00:00
nathanw
7a92615001 Correct the SPR numbers of PMC3 and PMC4. 
SIA wasn't retconned, but the SPR number was wrong. Re-add it, and add
USIA.
 2002-03-03 05:32:37 +00:00
nathanw
c2b8ec655a Delete the retconned SIAR SPR. 2002-03-03 05:17:48 +00:00
nathanw
ee2cbbfe4a Add MPC7xx/7xxx performance monitor control registers (MMCR0-2, UMMCR0-2). 2002-03-03 05:15:44 +00:00
nathanw
28b2a20fb9 Add bit definitions for the MPC750 thermal management registers. 2002-03-03 04:31:53 +00:00
kleink
4a513728e8 Add end-of-comment missing in previous. 2002-03-02 21:36:27 +00:00
kleink
a34187bca3 Also reset segment register 0 on kernel entry: there may not always be 
a fixed BAT entry covering segment 0, or not completely covering it,
and we do restore it on return to user level already.
 2002-03-02 15:19:56 +00:00
kleink
dc0a08feaa Note that Guarded bit is not implemented on the 601. 2002-03-02 15:07:35 +00:00
matt
4b948be2fc Disable BTIC on rev 2.0 or earlier MPC7450s as Motorola Errata #31 for the 
MPC7450.
 2002-03-02 02:18:38 +00:00
simonb
4324f37586 Use "#define<tab>". 2002-02-28 03:17:23 +00:00
kleink
39a685458d Fix pastos & typoe. 2002-02-27 04:13:10 +00:00
matt
178af24f65 Add a comment to where we increment intr_depth to show that intstk+INTSTK 
== intr_depth. (gag)
 2002-02-27 03:27:14 +00:00
christos
e8116a8f5b - Use DEV_ constants, instead of documenting the numbers! 
- Delete cdev_decl(mm); where appropriate, and other hand-crufting [hi powerpc!]
 2002-02-27 01:20:51 +00:00
kleink
f7a55f56d3 PIR is the same on 601. 2002-02-26 00:48:58 +00:00
kleink
67678b7c54 Handle the 601's Run Mode/Trace Exception. 2002-02-22 18:50:45 +00:00
kleink
543f1e7a2d Handle the 601's Run Mode/Trace Exception as well. 2002-02-22 13:51:40 +00:00
simonb
2d8577fb83 Clean up some rampant code duplication wrt ieee number handling: 
- Add alignment-safe double and float unions.
 - Use the above for the __infinity and __nan constants on all
   architectures that use the standard ieee754 representation of
   those constants.
 - Add a single copy of various ieee754 math functions (frexp, isinf,
   isnan, ldexp and modf) that had numerous duplicates among the
   arch-specific directories.
 - Use the above functions on all architectures where the generic C
   versions where used.  Architectures that had local assembly
   routines are untouched (for those functions only).
 2002-02-19 13:08:12 +00:00
chs
b744097a5f allow writing to write-only mappings. fixes PR 3493. 2002-02-14 07:08:02 +00:00
kleink
11402be7a5 Header for the 601's I/O Controller Interface Address Translation 
segment register format.
 2002-02-09 17:44:40 +00:00
briggs
9827f27b9f Update from thorpej: 
* Define type and size of _mcount stub to make PIC code happy.
* Rename mcount to __mcount to get it out of the user namespace.
 2002-02-07 05:13:35 +00:00
kleink
3b7a9506f7 Printf the 601's HID0. 2002-02-06 20:00:48 +00:00
kleink
69e30815cf Add a printf bitmask for HID0. 2002-02-06 19:59:30 +00:00
kleink
cd6a8bc27c Add MPC601 MQ and RTCU/RTCL SPRs. 2002-02-05 19:49:17 +00:00
dbj
ecf4398451 increment uvmexp.traps on entry to trap() 2002-02-02 22:02:00 +00:00
dbj
0ac4681659 add support for kgdb over zs 2002-01-06 00:35:10 +00:00
jhawk
d77edb248a Print negative SIMM operands correctly; previously, negative numbers 
were bogus.
 2002-01-05 22:07:26 +00:00
jhawk
a0dca6bb1d Remove gratuitous ", " after the last opcode for SIMM and UIMM opcodes. 2002-01-05 20:22:52 +00:00
jhawk
c7996c4a47 Print addresses symbolicly using the new ddb helper function, db_symstr(). 
This disassembler still needs a fair chunk of work.
 2002-01-05 20:21:37 +00:00
dbj
86e773e9fd change apparent typo of MS_SFILES to MD_SFILES 
This fixes some dependency problems with locore.S
 2002-01-05 17:58:48 +00:00
jhawk
ac054a2787 Support 
t/t	PID
on the powerpc. (remember to use 0tPID if pid is in decimal...)
 2002-01-03 22:15:06 +00:00
chs
9451559ef4 pmap_page_protect(VM_PROT_NONE) must remove all mappings in the PV list, 
even if they are wired.  we need to be able to remove all mappings to
pages that are being freed due to (eg.) file truncation.
 2002-01-02 00:51:33 +00:00
dbj
98cbceb382 handle have_address=TRUE 2001-12-31 18:29:07 +00:00
dbj
f03e8813e0 allow ddb access to lr, ctr, cr and xer registers when not on PPC_IBM4XX 2001-12-30 20:53:04 +00:00
dbj
98d1a18067 remove unused variable in kgdb_acc 2001-12-30 20:50:53 +00:00
dbj
1b65d8fd30 fix single stepping and continuing from breakpoints in ddb 2001-12-27 10:32:23 +00:00
dbj
2bea447d60 sync the instruction cache even when only writing 2 or 4 bytes 2001-12-27 10:25:41 +00:00
dbj
d91a86f994 revert revision 1.13 
this turns single stepping back off since it doesn't correctly work
note that without single stepping, several things do not work as
expected, including continuing from interrupts
 2001-12-24 16:57:40 +00:00
dbj
ce516e4e69 add declaration of ipkdb_trap_glue 2001-12-23 08:25:27 +00:00
dbj
3ff5d761b8 restore msr on return from ddb, this allows single stepping 2001-12-23 08:19:44 +00:00
tv
8e6f7afb5b MKfoo=no -> NOfoo 2001-12-12 01:48:43 +00:00
briggs
25e9f1f519 Provide basic bus_space_mmap(). Noted by self and in PR port-powerpc/14873. 
This at least allows the compile to complete.  There are still Issues with
vga_pci.c's assumptions about a PC-ish environment.
 2001-12-10 20:30:21 +00:00
thorpej
51535d4bf5 Add support for dumping ELF-cormat core files. 2001-12-09 23:05:56 +00:00
atatat
b45c51b1fc Roll the rest of the ports over to the new MI kernel build machinery. 
Any problems reported by testers have been fixed, and massive
cross-compiling of kernels has shown that any problems that remain
with actually building kernels are not related to this.
 2001-12-09 05:00:40 +00:00
bjh21
20d6672fda Change L2CR_CONFIG from defflag to defparam, since it takes an argument. 2001-12-07 12:58:43 +00:00
chs
5e5ab17808 fix the sense of a MULTIPROCESSOR conditional, cpus after the first are 
not configured if MULTIPROCESSOR is *not defined.
 2001-12-05 05:13:50 +00:00
chs
f0d9c43220 fix macppc MULTIPROCESSOR compilation. 2001-12-05 05:02:10 +00:00
thorpej
fbd78c8e3c Add PVR processor type fields for IBM 405GP and IBM 405L. 2001-12-02 20:11:49 +00:00
tsutsui
163114ab3c Implement pmap_kenter_pa() and pmap_kremove() properly. 
This should fix `kernel diagnostic assertion "rv" failed' panic
and the problem was tracked down by tsubai.
Also add small optimization in pmap_enter() and pmap_remove(), from tsubai.
 2001-12-01 23:34:52 +00:00
chs
bf5f058642 don't depend on other headers to include sys/proc.h for us. 2001-11-30 07:53:13 +00:00
mjl
90acd67a3c Need CACHELINESIZE for libkern memset. 2001-11-29 00:16:35 +00:00
lukem
ecb81c3f6d - convert usage of "defopt" to "defflag" where the relevant option does 
not support a value (e.g., it's to be used as "options FOO" instead of
  "options FOO=xxx"). options that take a value were converted to
  defparam recently.
- minor whitespace & formatting cleanups
 2001-11-28 10:21:10 +00:00
thorpej
9235283af1 Rename NOCACHE -> PPC_4XX_NOCACHE to avoid conflict with the namei 
flag of the same name.

From Frank van der Linden <fvdl@wasabisystems.com>.
 2001-11-26 23:26:33 +00:00
thorpej
77fdde7f2c Reset the unused RPN bits in a TLBLO to 0, as specified by the PPC401B3 
user's manual, page 8-40.

From Frank van der Linden <fvdl@wasabisystems.com>.
 2001-11-26 23:24:20 +00:00
lukem
0fa231134c - replace "defopt" with "defparam" for options which must take a value, 
as config(8) will warn for value-less defparam options
- minor whitespace/formatting cleanup
- consolidate opt_tcp_recvspace.h and opt_tcp_sendspace.h into opt_tcp_space.h
 2001-11-20 14:34:18 +00:00
lukem
03aef4723c cleanup: 
options SPACE TAB
	makeoptions TAB
	psuedo-device TAB
	remove trailing whitespace
	replace multiple spaces -> tabs
	options "FOO" -> options FOO
	options "FOO=bar" -> options FOO=bar
	options "FOO=\"bar\"" -> options FOO="\"bar\""
 2001-11-20 12:56:17 +00:00
matt
77ab725cbb Enable DOZE mode for the 604ev. 2001-11-19 23:30:07 +00:00
matt
34d4887431 Some #ifdef cleanup for DIAGNOSTIC/DEBUG/PMAPCHECK so that that many of 
the expensive checks are skipped when (!DEBUG&&!PMAPCHECK) and all of the
light-weigth checks are skipped when (!DIAGNOSTIC&&!DEBUG&&!PMAPCHECK).
This bring pmap.o's text down from 21KB (with PMAPCHECK) to 18.5KB (DEBUG)
to 16KB text (!DIAGNOSTIC).
 2001-11-14 20:38:22 +00:00
matt
ab93af26ea Fix pte_clear to TLB flush the va, not the tlb adress (which is only valid 
for clearing the ref bit).  pvo_to_pte (if !diagnostic) will return NULL
immediately if PTE_VALID is not set.
 2001-11-11 23:07:02 +00:00
matt
1f09ca6e53 Fix a small buglet in syncicache (if the area to sync crosses the 
segment 0 boundary).
 2001-11-06 06:25:28 +00:00
simonb
15a42388c0 In pmap_enter(), sync the instruction cache if VM_PROT_EXECUTE. Fixes 
problems when executing programs where text is copied to a page without
a dma sync (like NFS data bcopy'd to a buffer cache page).

From discussion with Jason Thorpe and Eduardo Horvath.
 2001-11-06 04:49:49 +00:00
matt
a696291eab Fix bug in pte_spill (wasn't searching the right pvo_table list for the 
victim PTE is the PTE was a secondary entry).
 2001-11-05 06:44:11 +00:00
matt
4f3943d89a Test the right bit for wired in the PVO. 2001-11-05 06:24:55 +00:00
matt
f02b548314 Don't try to pool_putting a PVO when re-entering a mapping. Since the 
PVO_MANAGED may get munged, we can possible put this into the wrong pool.
 2001-11-05 01:25:38 +00:00
matt
8a49af3cec Need to use a separate variable for return value of pmap_pte_inset in 
pte_spill.  Make off the high bit of the MFTB().
 2001-11-04 22:39:08 +00:00
matt
3ca8d91fc8 Add few a more PMAP_PVO_CHECKs in pte_spill; print pte addr of unmatched 
pte in panicstr.
 2001-11-04 21:15:03 +00:00
simonb
163e969b09 Include bit definitions for the Debug Status Register; from Artem Belevich 
at Riverstone Networks.
 2001-10-29 02:02:19 +00:00
simonb
545af90346 Don't return at the end of a void function. 2001-10-29 02:00:01 +00:00
jmc
6d536163de Change defaults for kernel compiles. Default all to USETOOLS?=no and have 
the etc Makefile override that by putting USETOOLS into $.MAKEOVERRIDES
This way the default for kernel compiles is still to use the installed
toolchain instead of depending on $TOOLDIR. $TOOLDIR can be used by
simply adding USETOOLS=yes to the command line as usual.

Adjust each ports template to set the default no setting and also pull in
bsd.own.mk if they weren't already to ensure they'll build correctly
with the new toolchain setup.
 2001-10-26 06:45:33 +00:00
thorpej
ba217c4196 Set MACHINE_ARCH explicitly in Makefiles for which it is constant. 
Also, since config(8) now explcitly sets MACHINE, there is no need
to do it here in the Makefile.
 2001-10-23 19:26:41 +00:00
thorpej
2c5ebcddfb Use MACHINE, not TARGET_MACHINE. 2001-10-23 18:57:32 +00:00
thorpej
dc1a120d26 ofwr_init(): don't clobber r7 -- early startup code needs it to find 
DDB symbols.
 2001-10-23 02:59:09 +00:00
thorpej
458af13ace If we get a secondary CPU on a non-MP kernel, bail out early 
and print a message about why.  This prevents the primary CPU's
cpu_info from being scribbled over w/ secondary CPU info.
 2001-10-22 01:45:51 +00:00
thorpej
102249430c Use <bsd.own.mk> so that the right thing happens when building a 
kernel w/ USE_NEW_TOOLCHAIN.
 2001-10-21 21:13:11 +00:00
simonb
d7357337e0 Fix typo, noted by Artem Belevich. 2001-10-21 15:09:36 +00:00
billc
60a9daa74c Get check for CPU type right. 2001-10-20 08:23:49 +00:00
matt
cc06635a2c Use correct SRR1 bit in EXC_PGM|EXC_USER fault to catch a trap. 2001-10-18 01:33:48 +00:00
matt
f2ceecb472 In pmap_syncicache, preserve the page offset contained in the supplied 
physical address.
 2001-10-18 01:03:44 +00:00
chs
4c1a2f36f8 fix pmap_changebit() to look for the bit in the page attrs 
in addition to any PTEs.  fixes PR 14220.
 2001-10-13 18:28:10 +00:00
mycroft
2668b4d43f Unlike most other platforms, PowerPC uses a 1:1 mapping for d_mmap and 
pmap_phys_address()...
 2001-09-30 01:23:47 +00:00
mycroft
49c87d1447 /dev/mem was severely broken. If you tried to access outside managed memory, 
it would go into an infinite loop.  Instead, allow such I/O.

Also, implement mmap(2) for /dev/mem.
 2001-09-29 23:36:54 +00:00
wiz
4c99916337 va_{start,end} audit: 
Make sure that each va_start has one and only one matching va_end,
especially in error cases.
If the va_list is used multiple times, do multiple va_starts/va_ends.
If a function gets va_list as argument, don't let it use va_end (since
it's the callers responsibility).

Improved by comments from enami and christos -- thanks!

Heimdal/krb4/KAME changes already fed back, rest to follow.

Inspired by, but not not based on, OpenBSD.
 2001-09-24 13:22:25 +00:00
chs
62b6d75cc8 implement pmap_wired_count(). 2001-09-23 08:12:59 +00:00
wiz
456dff6cb8 Spell 'occurred' with two 'r's. 2001-09-16 16:34:23 +00:00
chs
1661137341 it's perfectly legal for pmap_extract() on the kernel pmap to not find 
anything mapped there, even though it never used to happen.  with today's
other changes it happens a lot now, so remove the debug check for it.
 2001-09-16 05:40:46 +00:00
eeh
93b54eb36a Implement pmap_growkernel(). 2001-09-11 04:35:43 +00:00
chris
0e7661f023 Update pmap_update to now take the updated pmap as an argument. 
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.

Currently this is a no-op on most platforms, so they should see no difference.

Reviewed by Jason.
 2001-09-10 21:19:08 +00:00
matt
8402e4d93f Fix a missing restore interrupt. disable interrupts around pvo_enter in 
pmap_kenter.  Shouldn't be needed but ...
 2001-09-09 04:35:22 +00:00
matt
04bdd02c1a Make pmap_pte_insert STATIC so it will show up in DEBUG kernel with DDB 
traces.
 2001-08-30 22:06:44 +00:00
matt
4a580ee45e Make sure to restore SR 0 since returning from a syscall is actually 
one way of doing a process context switch.
 2001-08-30 22:00:48 +00:00
matt
a140263932 Add new 7450 SPRs 2001-08-30 21:55:27 +00:00
matt
50b056bc3a Teach db_trace that some low addresses are ok to trace. 2001-08-30 21:44:58 +00:00
briggs
89829e4825 defines for OPENPIC_ICR / serial mode. 2001-08-30 03:08:52 +00:00
briggs
0ea9d87eb1 Create an opt_openpic.h and add both OPENPIC and OPENPIC_SERIAL_MODE to it. 2001-08-30 03:08:22 +00:00
simonb
352f878e45 Gah, fix a number of channel status/select bitfields. 2001-08-29 23:32:21 +00:00
matt
dfbb14ad68 __syncicache needs to be exports to userspace as well as the kernel. 2001-08-28 03:03:43 +00:00
simonb
7ec91f6656 Include ${THISPPC}/conf/Makefile.${TARGET_MACHINE}.inc if it exists (ala 
mips' Makefile.mips).
 2001-08-26 10:59:26 +00:00
matt
550ffff41b Make all powerpc ports use a common Makefile.powerpc (except walnut) 
Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports.
Split out macppc cpu support and make common to mpc6xx ports.  Make
other mpc6xx ports use it.  Add evcnts for mpc6xx traps.
 2001-08-26 02:47:33 +00:00
matt
d98bf76f56 Fix bootstrap loss of memory. Fix pmap_activate problem. Revamp debug 
messages.
 2001-08-22 22:17:57 +00:00
matt
076780a19c Include the 7410/7450 hid definitions 2001-08-22 21:05:25 +00:00
wiz
c52d355d71 "wierd" is weird. 2001-08-20 12:20:01 +00:00
chs
c489e9bff4 add missing pmap_update(). 2001-08-19 18:09:20 +00:00
simonb
e807a5f821 Fix typo, noted by UCHIYAMA Yasushi in private mail. 2001-08-14 04:32:56 +00:00
tsutsui
17f8dae7c0 This file is no longer used. (moved to ofppc/soft_spl.c) 2001-08-09 16:08:34 +00:00
matt
f3011c96b4 Fix thinko. Do the mask before the divide. 2001-08-08 21:09:58 +00:00
chs
ea127ad258 use pmap_k* in pagemove(), ie. for buffer cache pages. 
in vunmapbuf(), call pmap_kremove() explicitly since uvm_km_free_wakeup()
will soon no longer do it for us.
 2001-08-04 07:42:07 +00:00
wiz
035b63a542 auxilliary -> auxiliary 2001-07-26 22:53:13 +00:00
wiz
611461bc5e memcpy -> memmove. Noted by Tsubai Masanari. 2001-07-22 13:21:04 +00:00
wiz
0ef3731e14 Replace memcpy's of obviously overlapping regions with memmove. 
Noted by Izumi Tsutsui.
 2001-07-22 13:08:09 +00:00
wiz
c5a6be17f4 bcopy -> memcpy, bzero -> memset, bcmp -> memcmp. 
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.
 2001-07-22 11:29:44 +00:00
thorpej
babefc5331 Add BUS_DMA_READ and BUS_DMA_WRITE flags, that hint the back-end 
at dmamap load time that the mapping will be used for a unidirectional
transfer of the specified direction.
 2001-07-19 15:32:10 +00:00
toshii
4866f1a22b Fix typo. s/extention/extension/ 2001-07-05 08:38:24 +00:00
matt
454a630dbd Print both the lower and upper dbat register when printing dbat registers. 2001-06-30 02:03:16 +00:00
matt
39fa08a172 Reset segment registers 1-7 upon entry to kernel (via trap or interrupts) 
so that the bat spill code won't run into spurious valid user pages and
treat them as kernel pages.  Restore segment registers 1-7 upon return to
user mode from either a trap or interrupt.   XXX  eventually do all 16 SRs
 2001-06-30 01:24:13 +00:00
matt
7c5977ea4f Fix a spurious debug printf. 
Fix pmap_procwr to not check a NULL pvo.  (Duh!)
Reformat pmap_print_mmuregs.  Actually *fill in* the dbat registers.
 2001-06-30 01:21:24 +00:00
matt
03ff023c76 Onfault needs to be done even from interrupts so restore that. Default 
to EFAULT for the error.
 2001-06-28 21:27:47 +00:00
matt
6ca9622494 Add pmap_interrupt_* to pmap_*map_pa. Remove interrupt toggling from 
pmap_pte_spill.  Fix pmap_protect.  Macroize mfsrin instruction.
 2001-06-28 20:35:21 +00:00
matt
78c7d18804 Turn on PMAP_MAP_POOLPAGE 2001-06-28 20:31:37 +00:00
matt
fdb7751e9c Update for thorepj's UVM changes. Don't even try to call uvm_fault or do 
pcb_onfault recovery while in interrupt mode.  Just die.  Print out error
returned from uvm_fault (-1 for interrupts).
 2001-06-28 18:33:39 +00:00
matt
87a64549c4 Change a bcopy to a structure copy. 2001-06-28 15:23:39 +00:00