Reset segment registers 1-7 upon entry to kernel (via trap or interrupts)
so that the bat spill code won't run into spurious valid user pages and treat them as kernel pages. Restore segment registers 1-7 upon return to user mode from either a trap or interrupt. XXX eventually do all 16 SRs
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@ -1,4 +1,4 @@
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/* $NetBSD: trap_subr.S,v 1.9 2001/06/23 02:36:14 matt Exp $ */
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/* $NetBSD: trap_subr.S,v 1.10 2001/06/30 01:24:13 matt Exp $ */
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/*
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -542,6 +542,20 @@ _C_LABEL(ipkdbsize) = .-_C_LABEL(ipkdblow)
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/* Restore user & kernel access SR: */ \
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lis 2,_C_LABEL(curpm)@ha; /* get real address of pmap */ \
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lwz 2,_C_LABEL(curpm)@l(2); \
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lwz 3,PM_SR+4(2); \
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mtsr 1,3; /* restore SR1 */ \
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lwz 3,PM_SR+8(2); \
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mtsr 2,3; /* restore SR2 */ \
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lwz 3,PM_SR+12(2); \
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mtsr 3,3; /* restore SR3 */ \
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lwz 3,PM_SR+16(2); \
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mtsr 4,3; /* restore SR4 */ \
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lwz 3,PM_SR+20(2); \
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mtsr 5,3; /* restore SR5 */ \
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lwz 3,PM_SR+24(2); \
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mtsr 6,3; /* restore SR6 */ \
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lwz 3,PM_SR+28(2); \
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mtsr 7,3; /* restore SR7 */ \
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lwz 3,PM_USRSR(2); \
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mtsr USER_SR,3; \
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lwz 3,PM_KERNELSR(2); \
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@ -585,6 +599,16 @@ s_trap:
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lis 31,KERNEL_SEGMENT@h
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ori 31,31,KERNEL_SEGMENT@l
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mtsr KERNEL_SR,31
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/* Obliterate SRs so BAT spills work correctly */
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lis 31,EMPTY_SEGMENT@h
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ori 31,31,EMPTY_SEGMENT@l
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mtsr 1,31
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mtsr 2,31
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mtsr 3,31
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mtsr 4,31
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mtsr 5,31
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mtsr 6,31
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mtsr 7,31
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FRAME_SETUP(tempsave)
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/* Now we can recover interrupts again: */
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mfmsr 7
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@ -729,11 +753,22 @@ s_isitrap:
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stw 5,20(1); \
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stw 4,12(1); \
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stw 3,8(1); \
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mtcr 3; \
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bc 4,17,99f; /* branch if PSL_PR is false */ \
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lis 3,EMPTY_SEGMENT@h; \
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ori 3,3,EMPTY_SEGMENT@l; \
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mtsr 1,3; /* reset SRs so BAT spills work */ \
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mtsr 2,3; \
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mtsr 3,3; \
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mtsr 4,3; \
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mtsr 5,3; \
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mtsr 6,3; \
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mtsr 7,3; \
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/* interrupts are recoverable here, and enable translation */ \
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lis 3,(KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY)@h; \
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ori 3,3,(KERNEL_SEGMENT|SR_SUKEY|SR_PRKEY)@l; \
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mtsr KERNEL_SR,3; \
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mfmsr 5; \
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99: mfmsr 5; \
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ori 5,5,(PSL_IR|PSL_DR|PSL_RI); \
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mtmsr 5; \
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isync
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@ -770,6 +805,20 @@ intr_exit:
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bc 4,17,1f /* branch if PSL_PR is false */
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lis 3,_C_LABEL(curpm)@ha /* get current pmap real address */
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lwz 3,_C_LABEL(curpm)@l(3)
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lwz 4,PM_SR+4(3)
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mtsr 1,4 /* Restore SR1 */
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lwz 4,PM_SR+8(3)
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mtsr 2,4 /* Restore SR2 */
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lwz 4,PM_SR+12(3)
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mtsr 3,4 /* Restore SR3 */
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lwz 4,PM_SR+16(3)
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mtsr 4,4 /* Restore SR4 */
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lwz 4,PM_SR+20(3)
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mtsr 5,4 /* Restore SR5 */
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lwz 4,PM_SR+24(3)
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mtsr 6,4 /* Restore SR6 */
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lwz 4,PM_SR+28(3)
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mtsr 7,4 /* Restore SR7 */
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lwz 3,PM_KERNELSR(3)
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mtsr KERNEL_SR,3 /* Restore kernel SR */
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lis 3,_C_LABEL(astpending)@ha /* Test AST pending */
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