Properly print out 745x cache information.
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_subr.c,v 1.13 2002/03/13 00:38:18 eeh Exp $ */
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/* $NetBSD: cpu_subr.c,v 1.14 2002/04/03 00:09:52 matt Exp $ */
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/*-
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* Copyright (c) 2001 Matt Thomas.
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@ -216,6 +216,7 @@ cpu_attach_common(struct device *self, int id)
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break;
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default:
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bitmask = HID0_BITMASK;
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break;
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}
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bitmask_snprintf(hid0, bitmask, hidbuf, sizeof hidbuf);
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printf("%s: HID0 %s\n", self->dv_xname, hidbuf);
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@ -368,6 +369,18 @@ cpu_config_l2cr(int vers)
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}
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if (l2cr & L2CR_L2E) {
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if (vers == MPC7450 || vers == MPC7455) {
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u_int l3cr;
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printf(": 256KB L2 cache");
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__asm __volatile("mfspr %0,%1" :
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"=r"(l3cr) : "n"(SPR_L3CR) );
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if (l3cr & L3CR_L3E)
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printf(", %cMB L3 backside cache",
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l3cr & L3CR_L3SIZ ? '2' : '1');
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printf("\n");
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}
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switch (l2cr & L2CR_L2SIZ) {
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case L2SIZ_256K:
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printf(": 256KB");
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