Make sure that each va_start has one and only one matching va_end,
especially in error cases.
If the va_list is used multiple times, do multiple va_starts/va_ends.
If a function gets va_list as argument, don't let it use va_end (since
it's the callers responsibility).
Improved by comments from enami and christos -- thanks!
Heimdal/krb4/KAME changes already fed back, rest to follow.
Inspired by, but not not based on, OpenBSD.
(eca_init_rx_soft()) just sets up software state, and the other of
which (eca_init_rx_hard()) actually puts the interface into receive
mode and sets up the FIQ handler etc. Arrange that when we transmit a
frame, eca_init_rx_soft() has already been called, so we only need to
call eca_init_rx_hard() from the Tx downgrade handler.
The point of this is that I should be able to incorporate the
functionality of eca_init_rx_hard() into the Tx FIQ handler so that we
can switch from Tx to Rx with little enough delay that we don't drop
the first few bytes of the incoming frame.
to zero page, and it branches to either the rx or tx handler. My intention
is that the tx handler should switch to the rx one the moment it finishes,
without needing a downgrade, which I hope will get rid of the start-of-frame
rx overruns I'm seeing.
While I'm here, move the constants describing the shape of the FIQ state
structures out of if_ecavar.h and into genassym.cf where they belong.
kernels as also ELF ones. Also cleaned up the code a bit and removed a
bunch of errors in the ELF loading code... no wonder it didn't work ! ... I
tried to squeeze about 8000 bytes in one 4096 byte page resulting in a
corrupted bss.
format specific.
Struct emul has a e_setregs hook back, which points to emulation-specific
setregs function. es_setregs of struct execsw now only points to
optional executable-specific setup function (this is only used for
ECOFF).
complete for some reason, we defer it for a bit and then try again. This
gets ping down to 0% packet loss.
Of course, ping _should_ have been at 0% packet loss anyway, and that's the
next thing to deal with.
-remove the check for i810's internal graphics completely: we'll attach
AGP whether in GFX or AGP mode anyway, and the SMRAM register test
was of questionable value (should have masked with 0xc0, but even then
the builtin graphics appeared enabled although I used an external
PCI card)
worked out by observing RISC iX's behaviour, so it may be technically
wrong. The only implementations of IP-over-Econet for which I've got
sources don't support broadcasts.
Tested using broadcast ping from RISC iX to NetBSD, and using rwhod.
- remove special treatment of pager_map mappings in pmaps. this is
required now, since I've removed the globals that expose the address range.
pager_map now uses pmap_kenter_pa() instead of pmap_enter(), so there's
no longer any need to special-case it.
- eliminate struct uvm_vnode by moving its fields into struct vnode.
- rewrite the pageout path. the pager is now responsible for handling the
high-level requests instead of only getting control after a bunch of work
has already been done on its behalf. this will allow us to UBCify LFS,
which needs tighter control over its pages than other filesystems do.
writing a page to disk no longer requires making it read-only, which
allows us to write wired pages without causing all kinds of havoc.
- use a new PG_PAGEOUT flag to indicate that a page should be freed
on behalf of the pagedaemon when it's unlocked. this flag is very similar
to PG_RELEASED, but unlike PG_RELEASED, PG_PAGEOUT can be cleared if the
pageout fails due to eg. an indirect-block buffer being locked.
this allows us to remove the "version" field from struct vm_page,
and together with shrinking "loan_count" from 32 bits to 16,
struct vm_page is now 4 bytes smaller.
- no longer use PG_RELEASED for swap-backed pages. if the page is busy
because it's being paged out, we can't release the swap slot to be
reallocated until that write is complete, but unlike with vnodes we
don't keep a count of in-progress writes so there's no good way to
know when the write is done. instead, when we need to free a busy
swap-backed page, just sleep until we can get it busy ourselves.
- implement a fast-path for extending writes which allows us to avoid
zeroing new pages. this substantially reduces cpu usage.
- encapsulate the data used by the genfs code in a struct genfs_node,
which must be the first element of the filesystem-specific vnode data
for filesystems which use genfs_{get,put}pages().
- eliminate many of the UVM pagerops, since they aren't needed anymore
now that the pager "put" operation is a higher-level operation.
- enhance the genfs code to allow NFS to use the genfs_{get,put}pages
instead of a modified copy.
- clean up struct vnode by removing all the fields that used to be used by
the vfs_cluster.c code (which we don't use anymore with UBC).
- remove kmem_object and mb_object since they were useless.
instead of allocating pages to these objects, we now just allocate
pages with no object. such pages are mapped in the kernel until they
are freed, so we can use the mapping to find the page to free it.
this allows us to remove splvm() protection in several places.
The sum of all these changes improves write throughput on my
decstation 5000/200 to within 1% of the rate of NetBSD 1.5
and reduces the elapsed time for "make release" of a NetBSD 1.5
source tree on my 128MB pc to 10% less than a 1.5 kernel took.
occur if SPDB_CONF (and hence DEBUG). also convert the panic in
pci_conf_write() to a SPDB_CONF warning and a return.
this cleans up pcictl(8) support.
device (rather, the device that carries that attribute) also
carry one or more attributes indicating which type of controller
it might be.
This will allow systems that might have AGP, but would never have
e.g. an Intel PCI-Host bridge, to trim out code that won't be used.
This prevents attaching multiple [E]ISA buses, which we don't support
(Is there any such thing to support? I'm skeptical) and avoids the
"panic: isaattach: ISA bus already seen" that occurs on some laptops
with docking stations and EISA boxes. Since there is only one [E]ISA bus,
logically, the ISA device probe will still find devices on the
docking station.
This does not address the problem of inserting or removing the docking station
at runtime.
Relevant PRs: kern/6544, port-i386/10392, kern/11627, kern/13557,
install/13865.
Remove some overzealous locking of HEAD_TO_MAP
Remove a potential deadlock in pmap_copy_page
Change alloc and free l1pt to use kenter/kremove.
Update pmap_map to use kenter (only actually used by dumpsys, so no matching kremove)
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
this file; while I'm here, rework the GIO arbitrator parameter setup to
match more closely what is done by lunix on the same hardware... Finally,
on a tip from Wilbern Cobb, preserve the graphics-related bits of the
GIO arbitrator parameter register from the PROM-initialized settings so
ARCS console on the graphics display works (tested on both my Indy with
Newport and my Indigo2 with XL gfx).
be spread over several devices, and the phcb is usually the main one.
Add agp_machdep.c file which implements MD agp functions (currently
just agp_flush_cache).
APM_IOC_GETPOWER ioctl read/write. Setting the batteryid in the passed
structure returns the data for just that battery. The old ioctl
remains for binary compatibility but has been renamed.
Itojun already did the hard work -- I just added a couple of lines.
reviewed by: thorpej
Thorpe as an extension to the bus_space(9) API.
Only the mainbus has a working mmap... iomd, podulebus and isa dont have
one yet. Its trivial to add the iomd and isa's memory part but am a bit
hessistant to add it without knowing its implications by heart.
Podulebus might be implemented in 32 bits EASI but otherwise its not really
transparent since there is AFAIK no function to explicitly read one byte or
so .. or is this implemented in a higher level ?
ARM26 and arch/arm32/dnard (Shark) kernels compile and RiscPC and Shark
kernels are tested and function OK.
Implications of other ARM systems like hpcarm and ebarm are propably
minimal or solved trivially.
need to check for curproc being non-NULL since none of the pmap
interfaces which are legal to use in interrupt handlers use this macro.
- use the hit op when flushing the cache in pmap_kremove().
- avoid trusting the optimizer in pmap_clear_reference().
- fix pmap_clear_modify() to reset the mod-bit emulation so we can
detect further modifications to the page, also flushing the cache
for any mappings which might have dirty lines.
This also involved updating the in-kernel DES functions to correspond
to the versions in our in-tree OpenSSL, because the des_SPtrans table
has changed; the asm code will not work with the old permutation table!
C and i386 asm code for the DES, 3DES, and Blowfish CBC modes is also
included; it is not currently built as the ESP processing in esp_core.c
splits the CBC operation and the cipher transform apart. Hopefully that
will be fixed as there is a substantial performance improvement to be had
from doing so. It will remain necessary to use the C version of the
Blowfish CBC function on some i386 machines, however, as the asm version
uses bswapl, which ony 486 and later processors have. The DES CBC code
doesn't have this problem.
Finally, change esp_core.c to use the ecb3_encrypt function instead of
calling ecb_encrypt three times; this improves performance a bit, in
particular in the asm case.
diagnostic. It's not indicative of an error condition.
The code sequence in question calls fpusave_proc(), which ultimately
calls alpha_pal_wrfen(0), which clears the FEN bit in the current
PCB. However, the diagnostic message is based on reading that bit from
the PCB representation in memory, which is not guaranteed to be kept
up-to-date with respect to the real PCB contents. According to the
AARM, third edition, II-B 4.2:
"If the PCB is read while ownership resides with the processor, it is
UNPREDICTABLE whether the original or an updated value of a field is
read."
The Alpha architecture does not provide a way to read the true value
of the FEN bit of the current PCB, so the test is simply removed.