add VR4131 releated definisions and change.
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sato
parent
18b82a6732
commit
5e44e9de0e
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@ -28,7 +28,7 @@
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/*
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* definition for identify VR series cpu
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* $NetBSD: vrcpudef.h,v 1.2 2001/04/17 15:45:20 sato Exp $
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* $NetBSD: vrcpudef.h,v 1.3 2001/09/07 16:02:56 sato Exp $
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*
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* REQUIRE #include "opt_vr41xx.h" before using this header.
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*/
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@ -44,6 +44,7 @@
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#define VRID_4111 0x2 /* VR4111 */
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#define VRID_4121 0x3 /* VR4121 */
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#define VRID_4122 0x4 /* VR4122 */
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#define VRID_4131 0x5 /* VR4131 */
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/* conflict other cpu */
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#define VRID_4181 0x10 /* VR4181 conflict VR4101 */
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@ -57,13 +58,14 @@
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* or vr4102, vr4111, vr4121 (vrip address and registers are same)
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* vr4111 group: vr4111, vr4121, vr4122 (some registers are same)
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* or vr4111, vr4121 (vrip address and registers are same)
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* vr4121 group: vr4121, (vr4131?) (vrip address and registers are same)
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* vr4122 group: vr4122, vr4131 (vrip address and registers are same)
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*
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* REQUIRE #include "opt_vr41xx.h" before using this definition.
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*/
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#if defined VR4181
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#define VRGROUP_4181 VRID_4181
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#endif /* defined VR4181 */
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#if defined VR4101
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#define VRGROUP_4101 VRID_4101
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#endif /* defined VR4101 */
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@ -72,11 +74,13 @@
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#define VRGROUP_4102 VRID_4102
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#define VRGROUP_4102_4121 VRID_4102
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#define VRGROUP_4102_4122 VRID_4102
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#define VRGROUP_4102_4131 VRID_4102
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#endif /* defined VR4102 */
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#if defined VR4111
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#define VRGROUP_4111_4121 VRID_4111
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#define VRGROUP_4111_4122 VRID_4111
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#define VRGROUP_4111_4131 VRID_4111
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#ifndef VRGROUP_4102_4121
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#define VRGROUP_4102_4121 VRID_4111
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@ -86,9 +90,16 @@
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#define VRGROUP_4102_4122 VRID_4111
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#endif /* VRGROUP_4102_4122 */
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#ifndef VRGROUP_4102_4131
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#define VRGROUP_4102_4131 VRID_4111
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#endif /* VRGROUP_4102_4131 */
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#endif /* defined VR4111 */
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#if defined VR4121
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#define VRGROUP_4121_4122 VRID_4121
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#define VRGROUP_4121_4131 VRID_4131
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#ifndef VRGROUP_4111_4121
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#define VRGROUP_4111_4121 VRID_4121
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#endif /* VRGROUP_4111_4121 */
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@ -97,6 +108,10 @@
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#define VRGROUP_4111_4122 VRID_4121
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#endif /* VRGROUP_4111_4122 */
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#ifndef VRGROUP_4111_4131
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#define VRGROUP_4111_4131 VRID_4121
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#endif /* VRGROUP_4111_4131 */
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#ifndef VRGROUP_4102_4121
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#define VRGROUP_4102_4121 VRID_4121
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#endif /* VRGROUP_4102_4121 */
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@ -105,45 +120,88 @@
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#define VRGROUP_4102_4122 VRID_4121
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#endif /* VRGROUP_4102_4122 */
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#ifndef VRGROUP_4102_4131
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#define VRGROUP_4102_4131 VRID_4121
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#endif /* VRGROUP_4102_4131 */
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#endif /* VR4121 */
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#if defined VR4122
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#define VRGROUP_4122 VRID_4122
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#ifndef VRGROUP_4102_4122
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#define VRGROUP_4102_4122 VRID_4122
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#endif /* VRGROUP_4102_4122 */
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#ifndef VRGROUP_4122_4131
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#define VRGROUP_4122_4131 VRID_4122
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#endif /* VRGROUP_4122_4131 */
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#ifndef VRGROUP_4111_4122
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#define VRGROUP_4111_4122 VRID_4122
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#endif /* VRGROUP_4111_4122 */
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#ifndef VRGROUP_4111_4131
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#define VRGROUP_4111_4131 VRID_4122
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#endif /* VRGROUP_4111_4131 */
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#ifndef VRGROUP_4102_4122
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#define VRGROUP_4102_4122 VRID_4122
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#endif /* VRGROUP_4102_4122 */
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#ifndef VRGROUP_4102_4131
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#define VRGROUP_4102_4131 VRID_4122
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#endif /* VRGROUP_4102_4131 */
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#endif /* VR4122 */
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#if defined VR4131
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#define VRGROUP_4131 VRID_4131
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#ifndef VRGROUP_4122_4131
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#define VRGROUP_4122_4131 VRID_4131
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#endif /* VRGROUP_4122_4131 */
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#ifndef VRGROUP_4111_4131
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#define VRGROUP_4111_4131 VRID_4131
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#endif /* VRGROUP_4111_4131 */
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#ifndef VRGROUP_4102_4131
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#define VRGROUP_4102_4131 VRID_4131
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#endif /* VRGROUP_4102_4131 */
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#endif /* VR4131 */
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/*
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* identify one cpu only
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*/
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#if defined VR4181 && !defined VR4101 && !defined VRGROUP_4102_4122
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#if defined VR4181 && !defined VR4101 && !defined VRGROUP_4102_4131
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#define ONLY_VR4181 VRID_4181
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#endif /* ONLY_VR4181 */
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#if !defined VR4181 && defined VR4101 && !defined VRGROUP_4102_4122
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#if !defined VR4181 && defined VR4101 && !defined VRGROUP_4102_4131
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#define ONLY_VR4101 VRID_4101
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#endif /* ONLY_VR4101 */
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && defined VR4102 && !defined VRGROUP_4111_4122
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && defined VR4102 && !defined VRGROUP_4111_4131
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#define ONLY_VR4102 VRID_4102
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#endif /* ONLY_VR4102 */
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && !defined VR4102 && defined VRGROUP_4111_4121 && !defined VR4122
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && !defined VR4102 && defined VRGROUP_4111_4121 && !defined VRGROUP_4122_4131
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#define ONLY_VR4111_4121 VRGROUP_4111_4121
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#endif /* ONLY_VR4111_4121 */
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && !defined VRGROUP_4102_4121 && defined VR4122
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && !defined VRGROUP_4102_4121 && defined VR4122 && !defined VRGROUP_4131
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#define ONLY_VR4122 VRID4122
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#endif /* ONLY_VR4122 */
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && !defined VRGROUP_4102_4121 && !defined VRGROUP_4122 && defined VR4131
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#define ONLY_VR4131 VRID4131
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#endif /* ONLY_VR4131 */
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#if !defined VRGROUP_4181 && !defined VRGROUP_4101 && !defined VRGROUP_4102_4121 && defined VRGROUP_VR4122_4131
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#define ONLY_VR4122_4131 VRGROUP_4122_4131
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#endif /* ONLY_VR4131 */
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#if defined ONLY_VR4181
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#define ONLY_VR_SPECIFIED ONLY_VR4181
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#endif /* defined ONLY_VR4181 */
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@ -160,10 +218,18 @@
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#define ONLY_VR_SPECIFIED ONLY_VR4111_4121
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#endif /* defined ONLY_VR4111_4121 */
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#if !defined ONLY_VR_SPECIFIED && defined ONLY_VR4122_4131
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#define ONLY_VR_SPECIFIED ONLY_VR4122_4131
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#endif /* ONLY_VR4122 */
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#if !defined ONLY_VR_SPECIFIED && defined ONLY_VR4122
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#define ONLY_VR_SPECIFIED ONLY_VR4122
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#endif /* ONLY_VR4122 */
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#if !defined ONLY_VR_SPECIFIED && defined ONLY_VR4131
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#define ONLY_VR_SPECIFIED ONLY_VR4131
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#endif /* ONLY_VR4131 */
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/*
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* identify single vrip base address
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*/
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@ -171,12 +237,12 @@
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#define SINGLE_VRIP_BASE ONLY_VR4181
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#endif /* defined ONLY_VR4181 */
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#if defined ONLY_VR4122
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#define SINGLE_VRIP_BASE ONLY_VR4122
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#endif /* defined ONLY_VR4122 */
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#if !defined VR4181 && !defined VR4122 && defined VRGROUP_4102_4121
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#if !defined VR4181 && defined VRGROUP_4102_4121 && !defined VRGROUP_4122_4131
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#define SINGLE_VRIP_BASE VRGROUP_4102_4121
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#endif
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#if !defined VR4181 && !defined VRGROUP_4102_4121 && defined VRGROUP_4122_4131
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#define SINGLE_VRIP_BASE VRGROUP_4122_4131
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#endif
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/* end */
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