matt
425743428c
Fix some indentation problems. Turn off PSL_EE when calling OFW.
2003-10-24 05:10:02 +00:00
matt
7e1d1cca33
s/SSR/SRR
2003-10-22 17:29:18 +00:00
matt
3f37cf2db7
Rework ddblow so that if PSL_PR == 1, it dispatches directly to the
...
trap handler and bypasses the ddbtrap code.
2003-10-22 17:27:58 +00:00
simonb
d4b0d4911f
Remove some numeric asm labels that aren't used.
2003-10-20 05:52:55 +00:00
simonb
066683efa3
Need Data Relocate in the MSR for the dcbf in pmap_procwr().
...
From Matt Thomas.
2003-10-20 05:47:52 +00:00
matt
421dd6cc28
Reorganize the way powerpc port install machine specific headers.
...
Use <powerpc/oea/bat.h> exclusively and remove <machine/bat.h> and
<powerpc/bat.h>. Remove unneeded <machine/cpufunc.h>. To insure
1:1 correspondence of <powerpc/FOO.h> to <machine/FOO.h> include
"../../powerpc/include/Makefile" in "arch/FOO/include/Makefile".
Incororpate <byte_swap.h> into <bswap.h> and then byte_swap.h
2003-10-20 00:12:09 +00:00
matt
ba34947f80
Add powerpc-specific isa and isadma machdep code. (Merge common code from
...
prep and sandpoint and ...)
2003-10-19 03:19:32 +00:00
matt
3575370e0a
Remove worthless load.
...
Save curcpu before doing uniprocessor dispatch.
2003-10-17 22:21:38 +00:00
matt
12ecf72b47
Don't zero curlwp/curpcb in cpu_switchto.
...
Use correct register in the store conditional.
Add DIAGNOSTIC check for null curpcb on cpu_switch exit.
2003-10-17 21:08:57 +00:00
matt
67ab911529
Add a KASSERT() to verify the pcb is not NULL.
2003-10-17 19:56:18 +00:00
simonb
ef41f16231
Correct a test for setting IFF_OACTIVE on the interface.
2003-10-15 02:10:00 +00:00
matt
4b22ee736b
Add support for MPC74[45]7
2003-10-09 20:49:06 +00:00
matt
acf4563b13
Add code to drop into DDB if you get a DSI fault on the current stack page.
2003-10-09 07:12:24 +00:00
thorpej
901da40cf9
Add some accessor macros for the ucontext:
...
* _UC_MACHINE_PC() - access the program counter
* _UC_MACHINE_INTRV() - access the integer return value register
* _UC_MACHINE_SET_PC() - set the program counter (this requires
special handling on some platforms).
2003-10-08 22:43:01 +00:00
thorpej
9ed3b44b84
Use ksi_signo and ksi_code accessor macros.
2003-10-08 00:40:54 +00:00
thorpej
68723a995b
* Shuffle some data structures so, and add a flags word to ksiginfo_t.
...
Right now the only flag is used to indicate if a ksiginfo_t is a
result of a trap. Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap. Expands to 0 if the ksiginfo_t was
not the result of a trap. This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
the case of non-trap-generated signals that have a > 0 si_code.
This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.
As discussed on tech-kern. Reviewed and OK's by Christos.
2003-10-08 00:28:40 +00:00
scw
4eea84b735
Gah. Pick up the MI i2c headers from the right place.
...
Pointed out by Shigeyuki Fukushima on port-powerpc@.
2003-10-06 18:19:24 +00:00
shige
0af4acb526
Add Real time clock support code.
2003-10-06 18:15:08 +00:00
scw
2ba7642346
MD i2c glue for the 405GP's onboard IIC controller.
...
Bit-bang only for now.
2003-10-06 16:15:46 +00:00
manu
2522a3f784
Build PowerPC again with _HAS_SIGINFO. Remove the ifdef on _HAS_SIGINFO
...
in the header file since all platforms supported by COMPAT_DARWIN now have it.
2003-09-30 21:04:54 +00:00
simonb
953b5b465b
Add a dependancy on assym.h; helps "make -j N" kernel builds.
2003-09-29 05:14:23 +00:00
matt
a8a3bf5bed
ANSIfy.
2003-09-27 04:44:42 +00:00
matt
827263a8bc
Use ksi_signo instead of _signo.
2003-09-27 03:51:54 +00:00
matt
60ff688f72
Define SIGTRAMP_VALID properly.
2003-09-27 00:58:32 +00:00
nathanw
4d59420344
Move __cpu_simple_lock_t and __SIMPLELOCK_{UN,}LOCKED to machine/types.h
...
so that they can be used in a namespace-friendly way.
2003-09-26 22:45:41 +00:00
matt
6986092cfe
Add a machine-dependent SIGTRAMP_VALID macro which is used to test whether
...
a trampoline version is valid or not.
2003-09-26 22:14:19 +00:00
matt
fb54d529b8
Copy out the entire ksiginfo_t, not just the first word.
2003-09-26 18:00:47 +00:00
eeh
a6192488f7
Define ksi.
2003-09-26 00:00:17 +00:00
matt
2deb8b2e7b
Deal with the constification of ksiginfo_t and sigset_t in signalling.
2003-09-25 22:22:36 +00:00
christos
ecfb034cb3
constify siginfo/trapsignal
2003-09-25 22:04:17 +00:00
matt
9a305fca59
Use direct entry for siginfo trampoline. Deal with missing
...
legacy trampolines in a cleaner manner.
2003-09-25 21:59:55 +00:00
matt
83003b0798
Fill in ksi_code.
2003-09-25 21:58:46 +00:00
matt
85a5f3065d
Add siginfo support for PowerPC.
2003-09-25 18:42:18 +00:00
matt
49317aa149
Remove db_onpanic check.
2003-09-25 17:36:33 +00:00
shige
95fa35eb8e
Delete this file because filename includes uppercase letters.
2003-09-24 11:51:19 +00:00
shige
0a36d23137
Copy IBM4xxGPx specific autoconf code from evbppc/walnut/autoconf.c.
2003-09-24 11:47:02 +00:00
matt
9c8a5009b3
Define va_list as __builtin_va_list for GCC 3.x. Change stdarg macros
...
appropriately. (this is committed from a system run a kernel and userland
built with these changes).
2003-09-24 02:39:56 +00:00
shige
dc98452dce
Copy PCI codes for IBM405GPx from evbppc/walnut/pci/{pchb.c,pci_machdep.c}.
2003-09-23 15:30:22 +00:00
shige
03467d74b5
Add devices info for IBM405GPR.
2003-09-23 15:26:46 +00:00
shige
91be153592
Add global cpu_model variable.
2003-09-23 15:25:26 +00:00
shige
e20e959b37
Copy IBM4xxGPx specific autoconf code from evbppc/walnut/autoconf.c.
2003-09-23 15:24:15 +00:00
shige
a8dd07e005
Copy IBM4XX OpenBIOS locore.S from evbppc/walnut.
2003-09-23 15:21:58 +00:00
shige
fc29eb23bf
Add some PCI definitions listed in evbppc/include/walnut.h.
2003-09-23 15:19:05 +00:00
shige
2977d5a89a
Add IBM40x specific machdep functions.
2003-09-23 15:14:02 +00:00
shige
87f629a7b8
Add IBM405GPr PVR.
2003-09-23 15:10:05 +00:00
shige
94959351e8
Add IBM405GPx specific kernel configuration file.
2003-09-23 15:06:40 +00:00
shige
ee990c494d
Move todclock driver from evbppc/walnut/dev.
2003-09-23 15:01:50 +00:00
shige
ff6df75f63
Add on-chip IIC driver.
...
Add some definitions for IIC driver.
2003-09-23 14:56:08 +00:00
cl
b826d7b216
add MD part of SA/pthread pagefault handling on powerpc
2003-09-19 00:16:34 +00:00
kleink
8d633905ac
Bring /* LINTSTUBs */ closer to reality.
2003-09-08 22:37:01 +00:00
kleink
a4909cd01e
g/c byte-reversing bus_space_set_region_1() entries.
2003-09-07 22:12:05 +00:00
manu
d13828a7dd
forgotten commit for KERN_PROCARGS sysctl in COMPAT_DARWIN
2003-09-07 07:50:31 +00:00
matt
cec9cb32df
Move CLKF_BASEPRI to machine specific <intr.h> file since it depends on
...
the encoding of the spl for the port.
2003-09-03 21:33:31 +00:00
simonb
05c33c1c05
Need to set BUS_DMA_COHERENT to BUS_DMA_NOCACHE on IBM ppc4xx CPUs.
...
The "emac" interface now works properly again on my Walnut. Much
thanks to Steve Woodford for tracking this down.
2003-09-03 13:30:05 +00:00
matt
31cc6ab700
Move SFRAMELEN to frame.h and use it in vm_machdep.c. In setfunc, setup
...
callframe linkages correctly. Restore use of ldptr to locore_subr.S
[pthreads and gdb no longer crash/hang the system]
2003-08-27 20:20:07 +00:00
matt
56f115e896
Switch back to adjusting stack by addi instead of ldptr until I can locate
...
who's setting up the stack wrong.
2003-08-27 19:45:28 +00:00
chs
939df36e55
add support for non-executable mappings (where the hardware allows this)
...
and make the stack and heap non-executable by default. the changes
fall into two basic catagories:
- pmap and trap-handler changes. these are all MD:
= alpha: we already track per-page execute permission with the (software)
PG_EXEC bit, so just have the trap handler pay attention to it.
= i386: use a new GDT segment for %cs for processes that have no
executable mappings above a certain threshold (currently the
bottom of the stack). track per-page execute permission with
the last unused PTE bit.
= powerpc/ibm4xx: just use the hardware exec bit.
= powerpc/oea: we already track per-page exec bits, but the hardware only
implements non-exec mappings at the segment level. so track the
number of executable mappings in each segment and turn on the no-exec
segment bit iff the count is 0. adjust the trap handler to deal.
= sparc (sun4m): fix our use of the hardware protection bits.
fix the trap handler to recognize text faults.
= sparc64: split the existing unified TSB into data and instruction TSBs,
and only load TTEs into the appropriate TSB(s) for the permissions.
fix the trap handler to check for execute permission.
= not yet implemented: amd64, hppa, sh5
- changes in all the emulations that put a signal trampoline on the stack.
instead, we now put the trampoline into a uvm_aobj and map that into
the process separately.
originally from openbsd, adapted for netbsd by me.
2003-08-24 17:52:28 +00:00
chs
3cf764618d
remove bogus code that terminates stack trace too early on OEA.
2003-08-24 16:33:41 +00:00
matt
121c8942a6
Not all PPC ports (e.g. macppc) equate IPL_NONE with 0.
2003-08-18 22:10:33 +00:00
chs
e02e4ecc2b
lots-o-stuff:
...
- fix opcodes_base[10] to allow us to find "cmpli".
- fix "cmp" definition.
- add various missing SPRs.
- use the right bits for the "BI" operand.
- fix operand calculation for "rlwinm" and friends, and display
the operands in the same order as the manuals do.
- make the buffer bigger to avoid overflow.
2003-08-17 18:23:17 +00:00
chs
4ba6255f14
add some 745x-specific MSSCR0 bits.
2003-08-17 18:08:17 +00:00
chs
f19809f0fa
remove an unused proto.
2003-08-17 18:07:11 +00:00
matt
1d1029332d
Remove this. The architecture specific ones are now used.
2003-08-12 18:35:51 +00:00
matt
47483092bd
Cleanup/rework cpu_switch*, switch_exit, Idle routine. Remove pcb_psl
...
since it was write-only. When setting up a process, make sure the fake
callframes are properly linked together.
Only lower SPL when in Idle loop. Raise spl to previous level (which would
be IPL_SCHED) when exiting Idle loop. Never lower SPL anyplace else.
2003-08-12 18:34:47 +00:00
matt
b986a8c215
D'oh! The PCB can't be accessed with the MMU off. So get the pmap pointer
...
*before* disabling the MMU.
2003-08-12 15:40:02 +00:00
matt
a3a18840be
Remove SPILLSTK leftovers.
2003-08-12 05:15:41 +00:00
matt
c0d6cb285d
Nuke ci_curpm and curpm. Nuke pcb_pmreal. Those were use for spill stacks
...
and those no longer exist. for few uses that need CURPM, use CURPCB/PCB_PM
2003-08-12 05:06:53 +00:00
matt
3527dc3950
When getting the lwp to switch to, test to see if the scheduling queue is
...
empty, and if so panic. Change references to "proc/process" to lwp.
2003-08-11 15:39:24 +00:00
chs
b90614b54e
catch up with changes elsewhere.
2003-08-11 05:13:20 +00:00
matt
341742a7e9
Add PTEGCOUNT defparam for opt_pmap.h
2003-08-11 01:33:30 +00:00
matt
3d5b7190ad
Nuke ci_spillstk/CI_SPILLSTK. No longer needed.
2003-08-08 07:14:26 +00:00
matt
add426be7e
Add a type for trapstart so ddb will use it.
2003-08-08 06:11:48 +00:00
matt
938aca290c
Don't try to spill entries from the kernel's pmap. As of now, they can no
...
longer be evicted, only user-mappings can be evicted.
2003-08-08 06:10:43 +00:00
matt
330dc2e202
Allow only user-mappings to be evicted (spillage). This prevents the
...
dreaded eviction of a kernel stack page.
2003-08-08 06:06:48 +00:00
agc
aad01611e7
Move UCB-licensed code from 4-clause to 3-clause licence.
...
Patches provided by Joel Baker in PR 22364, verified by myself.
2003-08-07 16:26:28 +00:00
matt
c60f393ec5
Don't overwrite the value of DAR in r30. Use r31 instead.
2003-08-06 07:18:56 +00:00
simonb
20a37f9627
Note that the used interrupt bits are 405GP specific.
...
Fix a tyop.
2003-08-05 02:10:31 +00:00
matt
9254350d6a
Change bc x,y,z to their simplified mnemonics. During a kernel DSI fault,
...
if the exception address is < 1 page away from the KSP, switch to the that
CPU's spill stack to handle the trap. Otherwise you can get in a infinite
DSI fault loop.
2003-08-04 22:29:59 +00:00
matt
0e50e47bb9
Make that OEA based kernels can properly deal with kernel ISI faults. Now
...
that LKMs are supported, it is possible for a LKM page to be "outspilled"
resulting in a possible ISI fault. Try to spill the page back in.
2003-08-04 22:26:59 +00:00
matt
9b7d071bab
Eliminate stmw/lmw substituting the individual load/store instructions.
...
Use more symbolic constants. These are now safe for use on PPC64.
2003-08-04 00:32:49 +00:00
matt
a4a468e215
Add SFRAME_USER_SR (even though the 4XX doesn't have one).
2003-08-04 00:30:51 +00:00
eeh
f77f1feee5
Use %r<n> for register names.
2003-08-03 23:26:55 +00:00
matt
777589be9a
Add each register in trapframe, switchframe, and faultbuf.
2003-08-03 21:40:13 +00:00
matt
e3e80aa5d7
Add PPC_OEA64 and netbsd32_sigcode.S
2003-08-03 21:38:08 +00:00
matt
618c78b771
Don't use stmw. Do each store individually.
2003-08-03 21:27:49 +00:00
matt
42382e46c4
Add CPUSAVE_* and each register in the saveframe and faultbuf.
2003-08-03 21:26:27 +00:00
matt
dd1c661661
Nuke stmreg/ldmreg. PPC64 doesn't have a lmd/stmd so make sure lmw/stmw
...
don't invoke valid instructions on PPC64.
2003-08-02 19:40:39 +00:00
matt
c9d56ac39d
Add symbolic offsets for what's in cpu save locations.
...
Add a PPC64 variant of mftb
2003-08-02 19:35:26 +00:00
matt
d89b685a6e
Switch to regiser prefixes. Also change numeric constants to symbolic ones.
2003-07-31 15:30:41 +00:00
matt
f9c46681fd
Change switchframe to use register_t (anything that uses stmX/lmX needs
...
to be defined as register_t).
2003-07-31 15:29:29 +00:00
matt
18a1f8d4c7
Switch to m[tf]sprg[0-3]
2003-07-31 14:02:22 +00:00
matt
52bfbfda86
Use register prefixes and load/store pseudo-instructions.
2003-07-31 13:59:54 +00:00
matt
478364a5c5
Convert to the load/store pseudo-instructions.
2003-07-31 08:04:21 +00:00
matt
e51e13713a
Use symbolic register names (%rN and %crN) throughout. Change a few more
...
numeric constants to their symbolic counterparts.
2003-07-31 07:51:16 +00:00
matt
82ebd07f24
Convert most numeric constants to their symbolic equivalents. (step 2 of
...
cleaning up this file).
2003-07-31 06:49:32 +00:00
matt
f5444cea2f
Define SZREG {4,8} appropriately. Add pseudo-instructions (via #define)
...
to load/store int, long, pointer, register, multiple registers. This is so
assembly files can be support IPL32 and LP64 PowerPC implementations.
2003-07-31 06:23:55 +00:00
matt
0039d6a257
Replace 'm[tf]sprg x,y' with the appropriate 'm[tf]sprg[0-3] r' (this makes the
...
SPRG used unambiguous). This causes no change in the generated object.
2003-07-31 06:21:09 +00:00
matt
18eb53cd22
add PSL_TGPR (for MPC603)
2003-07-31 01:25:38 +00:00
simonb
14fc7f3334
Whitespace alignment nits.
2003-07-27 23:45:44 +00:00
scw
f0f724e255
Fix the default bus dma tag.
2003-07-25 10:50:13 +00:00