Use register prefixes and load/store pseudo-instructions.
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matt
parent
403ce9dc0c
commit
52bfbfda86
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@ -1,8 +1,11 @@
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/* $NetBSD: setjmp.S,v 1.1 1998/01/27 15:13:12 sakamoto Exp $ */
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/* $NetBSD: setjmp.S,v 1.2 2003/07/31 13:59:54 matt Exp $ */
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/* from: OpenBSD: setjmp.S,v 1.2 1996/12/28 06:22:18 rahnds Exp */
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/* kernel version of this file, does not have signal goop */
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/* int setjmp(jmp_buf env) */
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#define _NOREGNAMES
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#include <machine/asm.h>
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#define JMP_r1 0x04
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#define JMP_r14 0x08
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#define JMP_r15 0x0c
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@ -31,72 +34,72 @@
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.globl setjmp
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setjmp:
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stw 31, JMP_r31(3)
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streg %r31, JMP_r31(%r3)
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/* r1, r14-r30 */
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stw 1, JMP_r1 (3)
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stw 14, JMP_r14(3)
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stw 15, JMP_r15(3)
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stw 16, JMP_r16(3)
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stw 17, JMP_r17(3)
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stw 18, JMP_r18(3)
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stw 19, JMP_r19(3)
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stw 20, JMP_r20(3)
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stw 21, JMP_r21(3)
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stw 22, JMP_r22(3)
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stw 23, JMP_r23(3)
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stw 24, JMP_r24(3)
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stw 25, JMP_r25(3)
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stw 26, JMP_r26(3)
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stw 27, JMP_r27(3)
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stw 28, JMP_r28(3)
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stw 29, JMP_r29(3)
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stw 30, JMP_r30(3)
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streg %r1, JMP_r1 (%r3)
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streg %r14, JMP_r14(%r3)
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streg %r15, JMP_r15(%r3)
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streg %r16, JMP_r16(%r3)
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streg %r17, JMP_r17(%r3)
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streg %r18, JMP_r18(%r3)
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streg %r19, JMP_r19(%r3)
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streg %r20, JMP_r20(%r3)
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streg %r21, JMP_r21(%r3)
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streg %r22, JMP_r22(%r3)
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streg %r23, JMP_r23(%r3)
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streg %r24, JMP_r24(%r3)
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streg %r25, JMP_r25(%r3)
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streg %r26, JMP_r26(%r3)
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streg %r27, JMP_r27(%r3)
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streg %r28, JMP_r28(%r3)
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streg %r29, JMP_r29(%r3)
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streg %r30, JMP_r30(%r3)
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/* cr, lr, ctr, xer */
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mfcr 0
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stw 0, JMP_cr(3)
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mflr 0
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stw 0, JMP_lr(3)
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mfctr 0
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stw 0, JMP_ctr(3)
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mfxer 0
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stw 0, JMP_xer(3)
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mfcr %r0
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streg %r0, JMP_cr(%r3)
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mflr %r0
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streg %r0, JMP_lr(%r3)
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mfctr %r0
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streg %r0, JMP_ctr(%r3)
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mfxer %r0
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streg %r0, JMP_xer(%r3)
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/* f14-f31, fpscr */
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li 3, 0
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li %r3, 0
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blr
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.extern sigsetmask
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.globl longjmp
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longjmp:
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lwz 31, JMP_r31(3)
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ldreg %r31, JMP_r31(%r3)
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/* r1, r14-r30 */
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lwz 1, JMP_r1 (3)
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lwz 14, JMP_r14(3)
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lwz 15, JMP_r15(3)
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lwz 16, JMP_r16(3)
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lwz 17, JMP_r17(3)
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lwz 18, JMP_r18(3)
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lwz 19, JMP_r19(3)
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lwz 20, JMP_r20(3)
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lwz 21, JMP_r21(3)
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lwz 22, JMP_r22(3)
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lwz 23, JMP_r23(3)
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lwz 24, JMP_r24(3)
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lwz 25, JMP_r25(3)
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lwz 26, JMP_r26(3)
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lwz 27, JMP_r27(3)
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lwz 28, JMP_r28(3)
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lwz 29, JMP_r29(3)
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lwz 30, JMP_r30(3)
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ldreg %r1, JMP_r1 (%r3)
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ldreg %r14, JMP_r14(%r3)
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ldreg %r15, JMP_r15(%r3)
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ldreg %r16, JMP_r16(%r3)
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ldreg %r17, JMP_r17(%r3)
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ldreg %r18, JMP_r18(%r3)
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ldreg %r19, JMP_r19(%r3)
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ldreg %r20, JMP_r20(%r3)
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ldreg %r21, JMP_r21(%r3)
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ldreg %r22, JMP_r22(%r3)
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ldreg %r23, JMP_r23(%r3)
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ldreg %r24, JMP_r24(%r3)
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ldreg %r25, JMP_r25(%r3)
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ldreg %r26, JMP_r26(%r3)
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ldreg %r27, JMP_r27(%r3)
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ldreg %r28, JMP_r28(%r3)
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ldreg %r29, JMP_r29(%r3)
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ldreg %r30, JMP_r30(%r3)
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/* cr, lr, ctr, xer */
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lwz 0, JMP_cr(3)
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mtcr 0
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lwz 0, JMP_lr(3)
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mtlr 0
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lwz 0, JMP_ctr(3)
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mtctr 0
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lwz 0, JMP_xer(3)
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mtxer 0
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ldreg %r0, JMP_cr(%r3)
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mtcr %r0
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ldreg %r0, JMP_lr(%r3)
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mtlr %r0
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ldreg %r0, JMP_ctr(%r3)
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mtctr %r0
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ldreg %r0, JMP_xer(%r3)
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mtxer %r0
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/* f14-f31, fpscr */
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mr 3, 4
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mr %r3, %r4
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blr
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