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Add support for MPC74[45]7

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This commit is contained in:
matt 2003-10-09 20:49:06 +00:00
parent 0ea3fa883e
commit 4b22ee736b
2 changed files with 23 additions and 6 deletions
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4
sys/arch/powerpc/include/spr.h
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@ -1,4 +1,4 @@
/* $NetBSD: spr.h,v 1.31 2003/09/23 15:10:05 shige Exp $ */
/* $NetBSD: spr.h,v 1.32 2003/10/09 20:49:06 matt Exp $ */
#ifndef _POWERPC_SPR_H_
#define _POWERPC_SPR_H_
@ -89,6 +89,8 @@
#define IBM750FX 0x7000
#define MPC7450 0x8000
#define MPC7455 0x8001
#define MPC7457 0x8002
#define MPC745X_P(v) ((v & 0xFFFC) == 0x8000)
#define MPC7410 0x800c
#define MPC8245 0x8081

25
sys/arch/powerpc/oea/cpu_subr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cpu_subr.c,v 1.10 2003/08/04 22:26:59 matt Exp $ */
/* $NetBSD: cpu_subr.c,v 1.11 2003/10/09 20:49:06 matt Exp $ */
/*-
* Copyright (c) 2001 Matt Thomas.
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.10 2003/08/04 22:26:59 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.11 2003/10/09 20:49:06 matt Exp $");
#include "opt_ppcparam.h"
#include "opt_multiprocessor.h"
@ -84,6 +84,15 @@ static const struct fmttab cpu_7450_l2cr_formats[] = {
{ 0 }
};
static const struct fmttab cpu_7457_l2cr_formats[] = {
{ L2CR_L2E, 0, " disabled" },
{ L2CR_L2DO|L2CR_L2IO, L2CR_L2DO, " data-only" },
{ L2CR_L2DO|L2CR_L2IO, L2CR_L2IO, " instruction-only" },
{ L2CR_L2DO|L2CR_L2IO, L2CR_L2DO|L2CR_L2IO, " locked" },
{ L2CR_L2E, ~0, " 512KB L2 cache" },
{ 0 }
};
static const struct fmttab cpu_7450_l3cr_formats[] = {
{ L3CR_L3DO|L3CR_L3IO, L3CR_L3DO, " data-only" },
{ L3CR_L3DO|L3CR_L3IO, L3CR_L3IO, " instruction-only" },
@ -177,6 +186,7 @@ static const struct cputab models[] = {
{ "7410", MPC7410, REVFMT_MAJMIN },
{ "7450", MPC7450, REVFMT_MAJMIN },
{ "7455", MPC7455, REVFMT_MAJMIN },
{ "7457", MPC7457, REVFMT_MAJMIN },
{ "8240", MPC8240, REVFMT_MAJMIN },
{ "", 0, REVFMT_HEX }
};
@ -216,6 +226,7 @@ cpu_probe_cache(void)
case MPC750:
case MPC7450:
case MPC7455:
case MPC7457:
curcpu()->ci_ci.dcache_size = 32 K;
curcpu()->ci_ci.icache_size = 32 K;
assoc = 8;
@ -295,6 +306,7 @@ cpu_attach_common(struct device *self, int id)
case MPC7410:
case MPC7450:
case MPC7455:
case MPC7457:
mtspr(SPR_PIR, id);
}
cpu_setup(self, ci);
@ -351,6 +363,7 @@ cpu_setup(self, ci)
powersave = 1;
break;
case MPC7457:
case MPC7455:
case MPC7450:
/* Enable the 7450 branch caches */
@ -404,6 +417,7 @@ cpu_setup(self, ci)
break;
case MPC7450:
case MPC7455:
case MPC7457:
bitmask = HID0_7450_BITMASK;
break;
default:
@ -417,10 +431,10 @@ cpu_setup(self, ci)
* Display speed and cache configuration.
*/
if (vers == MPC750 || vers == MPC7400 || vers == IBM750FX ||
vers == MPC7410 || vers == MPC7450 || vers == MPC7455) {
vers == MPC7410 || MPC745X_P(vers)) {
aprint_normal("%s: ", self->dv_xname);
cpu_print_speed();
if (vers == MPC7450 || vers == MPC7455) {
if (MPC745X_P(vers)) {
cpu_config_l3cr(vers);
} else {
cpu_config_l2cr(pvr);
@ -699,7 +713,8 @@ cpu_config_l3cr(int vers)
}
aprint_normal(",");
cpu_fmttab_print(cpu_7450_l2cr_formats, l2cr);
cpu_fmttab_print(vers == MPC7457
? cpu_7457_l2cr_formats : cpu_7450_l2cr_formats, l2cr);
l3cr = mfspr(SPR_L3CR);