Commit Graph

466 Commits

Author SHA1 Message Date
joff d3eafb7e4f Dont try freeing bootstrap pages with pool_page_free. Fixes kern/28869 2005-01-14 02:28:54 +00:00
skrll 6a8415b9ef KNF 2005-01-07 08:02:16 +00:00
chris 80ba0e9617 Remove direct references to TAILQ internal structures.
No functional change, just tidying up code.
2005-01-02 22:47:26 +00:00
joff 33f8ad5c19 set L_SA_PAGEFAULT for prefetch aborts, too. Fixes kern/28828 2005-01-02 21:12:48 +00:00
thorpej 961245b8bf Sync with i386 bus_dma. 2004-11-28 17:36:27 +00:00
skrll ca5b73a7e3 Fix syntax error from 1.9. I guess IPKDB isn't used very much... 2004-11-19 07:59:53 +00:00
skrll e0658593c2 Fix the argument to KERNEL_PROC_LOCK/KERNEL_PROC_UNLOCK. 2004-10-24 06:58:14 +00:00
scw ca40f65ce1 Apply patch provided by Hiroki Nakano in PR kern/27159 to fix
compilation with DEBUG_DMA defined.
2004-10-06 08:59:40 +00:00
thorpej 6c08646cb8 Garbage-collect pagemove(); nothing use it anymore (YAY!!!) 2004-08-28 22:12:40 +00:00
rearnsha b88c8e79ee Add support for prefetch and data aborts in Thumb code. 2004-08-21 12:04:17 +00:00
rearnsha df8fa882b3 Add UVMHIST tracking for data and prefetch aborts. 2004-08-08 14:21:29 +00:00
rearnsha b0a3a4309a Don't overload the unknown instruction handling for the core onto CP0.
Instead, add a seventeenth 'co-processor' specifically for the core.
Add support for ARMv5 unknown instructions in the 'NV' space.
2004-08-07 11:45:41 +00:00
thorpej 6862b70e43 Merge x86/bus_dma.c 1.11 by yamt:
Simplify bus_dma internal "load" functions by eliminating the "first"
variable, using seg == -1 instead.
2004-06-19 18:06:00 +00:00
bsh 018ab5b974 distinguish PXA255/26x from PXA2[15]0 in CPU attach message 2004-04-14 04:01:49 +00:00
bsh 1a02d3b6e1 pmap_pte_init_arm9() is necessary only when defined(CPU_ARM9) and defined(ARM9_CACHE_WRITE_THROUGH) 2004-04-03 04:35:48 +00:00
atatat 19af35fd0d Tango on sysctl_createv() and flags. The flags have all been renamed,
and sysctl_createv() now uses more arguments.
2004-03-24 15:34:46 +00:00
cl ea5ec0212d add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
  * VP id
  * lock on VP data
  * LWP on VP
  * recently blocked LWP on VP
  * queue of LWPs woken which ran on this VP before sleep
  * faultaddr
  * LWP cache for upcalls
  * upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP
2004-03-14 01:08:47 +00:00
wiz d20841bb64 Uppercase CPU, plural is CPUs. 2004-02-13 11:36:08 +00:00
scw b9992109f0 Make it possible to call badaddr_read() from interrupt context, even
if curpcb is NULL, by borrowing lwp0's pcb if necessary (needed to
be able to set pcb_onfault).

Problem reported by Allen Briggs.
2004-01-26 10:45:24 +00:00
skrll 3dfd94284a Leave errno as zero when we SIGSEGV. This means my CATS now passes
regress/lib/libc/siginfo/sigsegv

OK'd by christos.
2004-01-21 15:39:21 +00:00
scw ee92d9d4d2 Fix ARM_VECTORS_LOW fallout caused by the recent reaper removal.
Just before removing the vector page mapping, switch to the kernel
pmap's L1/vector page mapping so as not to pull the rug out from
under ourselves.

To prevent the stale L1/vector page mapping from being restored by
cpu_switch, replace the relevant fields of the dying process' pcb
with those of lwp0's pcb.
2004-01-18 13:03:50 +00:00
jdolecek 089abdad44 Rearrange process exit path to avoid need to free resources from different
process context ('reaper').

From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
  as FPU state), and is the last potentially blocking operation;
  all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
  by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
  for both 'process' and 'lwp' exit

uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.

MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.

g/c now unneeded routines and variables, including the reaper kernel thread
2004-01-04 11:33:29 +00:00
pk 70f20a1217 Replace the traditional buffer memory management -- based on fixed per buffer
virtual memory reservation and a private pool of memory pages -- by a scheme
based on memory pools.

This allows better utilization of memory because buffers can now be allocated
with a granularity finer than the system's native page size (useful for
filesystems with e.g. 1k or 2k fragment sizes).  It also avoids fragmentation
of virtual to physical memory mappings (due to the former fixed virtual
address reservation) resulting in better utilization of MMU resources on some
platforms.  Finally, the scheme is more flexible by allowing run-time decisions
on the amount of memory to be used for buffers.

On the other hand, the effectiveness of the LRU queue for buffer recycling
may be somewhat reduced compared to the traditional method since, due to the
nature of the pool based memory allocation, the actual least recently used
buffer may release its memory to a pool different from the one needed by a
newly allocated buffer. However, this effect will kick in only if the
system is under memory pressure.
2003-12-30 12:33:13 +00:00
rearnsha 94c1474569 The machdep.debug sysctl variable uses code CPU_DEBUG
(not CPU_CONSDEV).
2003-12-13 12:07:41 +00:00
atatat 74b1767b3c The machdep.debug node is an int, not a struct 2003-12-12 03:52:56 +00:00
atatat 13f8d2ce5f Dynamic sysctl.
Gone are the old kern_sysctl(), cpu_sysctl(), hw_sysctl(),
vfs_sysctl(), etc, routines, along with sysctl_int() et al.  Now all
nodes are registered with the tree, and nodes can be added (or
removed) easily, and I/O to and from the tree is handled generically.

Since the nodes are registered with the tree, the mapping from name to
number (and back again) can now be discovered, instead of having to be
hard coded.  Adding new nodes to the tree is likewise much simpler --
the new infrastructure handles almost all the work for simple types,
and just about anything else can be done with a small helper function.

All existing nodes are where they were before (numerically speaking),
so all existing consumers of sysctl information should notice no
difference.

PS - I'm sorry, but there's a distinct lack of documentation at the
moment.  I'm working on sysctl(3/8/9) right now, and I promise to
watch out for buses.
2003-12-04 19:38:21 +00:00
rearnsha e3cb92a81b Avoid alignment faults in fusword and fuswintr. Also handle big-endian
systems in susword and suswintr.
2003-12-01 13:34:44 +00:00
scw d657bddd8c In data_abort_handler(), honour pcb_onfault even in the case where
current_intr_depth > 0.
2003-11-20 14:44:36 +00:00
scw 61aab8b582 On a fatal fault, dump the trapframe's contents to the console.
This is useful when DDB is not available, or practical.
2003-11-18 22:39:05 +00:00
scw 07acf64710 Re-instate the behaviour of sending SIGKILL to a process if uvm_fault()
returns ENOMEM. SIGSEGV just doesn't cut it. The original code looks to
have been lost in revision 1.34.
2003-11-15 20:18:34 +00:00
scw a7533e4cdc - Add LOCKDEBUG-protected calls to sched_lock_idle() to cpu_switchto and
the idle loop. They seem to have gone AWOL sometime in the past.
   Fixes port-arm/23390.
 - While here, tidy up the idle loop.
 - Add a cheap DIAGNOSTIC check for run queue sanity.
2003-11-15 08:44:18 +00:00
briggs dfa839f16b Make sure that L_SA_PAGEFAULT gets cleared from l_flag if pmap_fault_fixup
returns non-zero and we want to shortcut out.  This avoids a bogus pagefault
condition being detected in sa_switch().
Many thanks to Christian Limpach for finding this, obviating my band-aid
patch to kern_sa.c (posted on tech-kern).
2003-11-14 21:22:08 +00:00
scw a590a31135 - In data_abort_handler(), move the fault pc alignment check to before
the call to data_abort_fixup() as the fixup routines also try to
   de-reference the fault pc.

 - If a fault came from kernel mode, and the fault address looks to be in
   the kernel's address space, and pcb_onfault is *set*, check the
   instruction which caused the fault. If it's LDR{B,}T or STR{B,}T
   then one of the copy in/out routines is trying to read/write a
   kernel address with the wrong privilege. If that address is actually
   mapped, we could end up in an infinite loop because we failed to
   notice that it's really a 'user mode' access. Yay for "crashme".
   I suspect this also fixes PR port-arm/23052.

   Note: This *could* be fixed by adding sanity checks to copyin et al,
   but that would add extra overhead to the non-error path...

 - Fix a couple of __predict_false cases.
2003-11-14 19:00:03 +00:00
scw bb0221494d Since data_abort_handler() may have to decode the instruction at tf->tf_pc
to determine if a fault is read or write, make sure tf->tf_pc is 32-bit
aligned before dereferencing it.

Otherwise, deliver an illegal instruction signal to the process. We don't
support execution of Thumb code at this time.
2003-11-14 00:21:30 +00:00
scw 5d63abe1f1 Fix a braino introduced in r1.37. Thanks to Tom Spindler for spotting it. 2003-11-04 22:20:50 +00:00
dsl 2ffbd2ab99 Remove p_nras from struct proc - use LIST_EMPTY(&p->p_raslist) instead.
Remove p_raslock and rename p_lwplock p_lock (one lock is enough).
Simplify window test when adding a ras and correct test on VM_MAXUSER_ADDRESS.
Avoid unpredictable branch in i386 locore.S
(pad fields left in struct proc to avoid kernel bump)
2003-11-04 10:33:15 +00:00
jdolecek 3abecdb88d avoid stong words in comments 2003-11-01 17:35:42 +00:00
scw 336806eb55 Overhaul arm32's abort handlers:
- Assume a permission fault is always the result of an attempted
   write, so no need to disassemble the opcode.
   (as discussed with Richard Earnshaw/Jason Thorpe a week or two ago)

 - Split out non-MMU data aborts into separate functions, and deal
   correctly with XScale imprecise aborts. Specifically, the old code
   made no attempt to handle the double abort faults which can occur
   as a result of two consecutive external (imprecise) aborts. This
   was easy to provoke by read(2)ing from a /dev/mem offset which caused
   an external abort. With the old code, this would bring the system
   down instantly, with little clue as to why. (hint: tf_spsr held
   PSR_ABT32_MODE...)

 - Re-write badaddr_read() to use pcb_onfault instead of adding extra
   overhead to data_abort_handler(). A side effect of this is that it
   now benefits from the XScale double abort recovery.

 - Invoke the cpu-specific prefetch/data abort fixup routines only if
   the host cpu actually needs it. On other cpus, the code is optimised
   away.

 - Sprinkle __predict_{false,true} in all the right places.

 - G/C some excess debugging baggage.
2003-10-31 16:30:15 +00:00
scw 7a55b436b2 Move the alignment fault enable/disable code into macroes to avoid
needless duplication.

Additionally, merge AST handling into the same code.

exception.S and the generic irq_dispatch.S routines have been updated
to use the macroes.

XXX: I have patches for the non-generic IRQ dispatch routines, but they
need testing by someone with hardware.
2003-10-30 08:57:24 +00:00
scw 97e37b6030 In bus_dmamap_sync(), we can no longer rely on the data cache being
flushed on every context switch as an indicator that a mapping is
not resident in the cache.

Instead, used the per-pmap flag maintained by the cpu_switch/pmap code.
2003-10-30 08:44:13 +00:00
mycroft 1588a62950 Whitespace. 2003-10-29 05:48:19 +00:00
mycroft 2f3400cec7 The previous patch was wrong -- mcr does not output anything. Instead give a
junk input (it's not used when the last argument is 0).
2003-10-29 05:47:04 +00:00
mycroft 7a85552554 If something goes wrong, we want to return ENOMEM, not 0! 2003-10-29 05:03:41 +00:00
scw fe5371e8a9 Fix an uninitialised variable warning, reported by Shoichi Miyake
in port-arm/23293.
2003-10-28 08:22:55 +00:00
chris 25c741b8a6 Fix up some unitialised variables. 2003-10-26 23:11:15 +00:00
scw 4d7283b3ec Assume that if curpcb is NULL, we're already running with alignment
faults enabled.
2003-10-26 11:34:29 +00:00
scw 43be86e59c Skip the alignment fault enabling code if we came from SVC mode. It's
already enabled in this case.
2003-10-25 21:51:31 +00:00
scw 569efbf106 Oops, forgot to commit this along with the others...
Enable alignment faults on arm32 for both kernel and userland.

If COMPAT_15 and EXEC_AOUT are defined, support per-process
alignment checking where AFLTs are always enabled when running
kernel code and userland ELF binaries, and dynamically disabled/
enabled when switching to/from a.out binaries. This is necessary
in order to execute older a.out binaries, where gcc made
deliberate use of misaligned loads under certain circumstances.
2003-10-25 20:42:49 +00:00
scw 84c17a8163 Enable alignment faults on arm32 for both kernel and userland.
If COMPAT_15 and EXEC_AOUT are defined, support per-process
alignment checking where AFLTs are always enabled when running
kernel code and userland ELF binaries, and dynamically disabled/
enabled when switching to/from a.out binaries. This is necessary
in order to execute older a.out binaries, where gcc made
deliberate use of misaligned loads under certain circumstances.
2003-10-25 19:44:42 +00:00
scw 52c15bbd20 Don't drop to spl0 in cpu_switch/cpu_switchto. Do it in the idle loop
instead.

With this change, we no longer need to save the current interrupt level
in the switchframe. This is no great loss since both cpu_switch and
cpu_switchto are always called at splsched, so the process' spl is
effectively saved somewhere in the callstack.

This fixes an evbarm problem reported by Allen Briggs:

        lwp gets into sa_switch -> mi_switch with newl != NULL
            when it's the last element on the runqueue, so it
            hits the second bit of:
                if (newl == NULL) {
                        retval = cpu_switch(l, NULL);
                } else {
                        remrunqueue(newl);
                        cpu_switchto(l, newl);
                        retval = 0;
                }

        mi_switch calls remrunqueue() and cpu_switchto()

        cpu_switchto unlocks the sched lock
        cpu_switchto drops CPU priority
        softclock is received
        schedcpu is called from softclock
        schedcpu hits the first if () {} block here:
                if (l->l_priority >= PUSER) {
                        if (l->l_stat == LSRUN &&
                            (l->l_flag & L_INMEM) &&
                            (l->l_priority / PPQ) != (l->l_usrpri / PPQ)) {
                                remrunqueue(l);
                                l->l_priority = l->l_usrpri;
                                setrunqueue(l);
                        } else
                                l->l_priority = l->l_usrpri;
                }

        Since mi_switch has already run remrunqueue, the LWP has been
            removed, but it's not been put back on any queue, so the
            remrunqueue panics.
2003-10-23 08:59:10 +00:00