Oops, forgot to commit this along with the others...
Enable alignment faults on arm32 for both kernel and userland. If COMPAT_15 and EXEC_AOUT are defined, support per-process alignment checking where AFLTs are always enabled when running kernel code and userland ELF binaries, and dynamically disabled/ enabled when switching to/from a.out binaries. This is necessary in order to execute older a.out binaries, where gcc made deliberate use of misaligned loads under certain circumstances.
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@ -1,4 +1,4 @@
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/* $NetBSD: irq_dispatch.S,v 1.2 2003/01/03 00:38:16 thorpej Exp $ */
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/* $NetBSD: irq_dispatch.S,v 1.3 2003/10/25 20:42:49 scw Exp $ */
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/*
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* Copyright (c) 2002 Fujitsu Component Limited
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@ -73,6 +73,10 @@
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include "opt_compat_netbsd.h"
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#include "opt_execfmt.h"
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#include "opt_multiprocessor.h"
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#include "opt_arm_intr_impl.h"
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#ifdef ARM_INTR_IMPL
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#include ARM_INTR_IMPL
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@ -84,6 +88,43 @@
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#error ARM_IRQ_HANDLER not defined
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#endif
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#if defined(COMPAT_15) && defined(EXEC_AOUT)
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.Lcpufuncs:
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.word _C_LABEL(cpufuncs)
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#ifndef MULTIPROCESSOR
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.Lcurpcb:
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.word _C_LABEL(curpcb)
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.Lcpu_info_store:
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.word _C_LABEL(cpu_info_store)
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#define GET_CURPCB \
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ldr r1, .Lcurpcb ;\
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ldr r1, [r1]
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#define GET_CPUINFO \
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ldr r0, .Lcpu_info_store
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#else
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.Lcpu_info:
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.word _C_LABEL(cpu_info)
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#define GET_CURPCB \
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ldr r4, .Lcpu_info ;\
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bl _C_LABEL(cpu_number) ;\
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ldr r0, [r4, r0, lsl #2] ;\
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ldr r1, [r0, #CI_CURPCB]
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#define GET_CPUINFO /* nothing to do */
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#endif
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#define ENABLE_ALIGNMENT_FAULTS \
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GET_CURPCB ;\
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ldr r1, [r1, #PCB_FLAGS] /* Fetch curpcb->pcb_flags */ ;\
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tst r1, #PCB_NOALIGNFLT ;\
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beq 1f /* Alignment faults already enabled */ ;\
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GET_CPUINFO ;\
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ldr r2, .Lcpufuncs ;\
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ldr r1, [r0, #CI_CTRL] /* Fetch control register */ ;\
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mov r0, #-1 ;\
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mov lr, pc ;\
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ldr pc, [r2, #CF_CONTROL] /* Enable alignment faults */ ;\
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1:
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#endif /* COMPAT_15 && EXEC_AOUT */
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/*
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* irq_entry:
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* Main entry point for the IRQ vector. This is a generic version
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@ -101,6 +142,14 @@ ASENTRY_NP(irq_entry)
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PUSHFRAMEINSVC /* Push an interrupt frame */
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#if defined(COMPAT_15) && defined(EXEC_AOUT)
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and r0, r0, #(PSR_MODE) /* Test for USR32 mode (r0 = spsr_all)*/
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teq r0, #(PSR_USR32_MODE)
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bne 99f /* Not USR mode so skip AFLT check */
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ENABLE_ALIGNMENT_FAULTS
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99:
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#endif
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/*
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* Increment the interrupt nesting depth and call the interrupt
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* dispatch routine. We've pushed a frame, so we can safely use
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ldr r0, [sp] /* Get the SPSR from stack */
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and r0, r0, #(PSR_MODE) /* Test for USR32 mode before the IRQ */
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teq r0, #(PSR_USR32_MODE)
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bne 2f /* Nope, get out now */
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bne .Lirq_do_exit /* Nope, get out now */
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1:
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ldr r0, .Lastpending /* Do we have an AST pending? */
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ldr r1, [r0]
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ldr r5, .Lastpending
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#if defined(COMPAT_15) && defined(EXEC_AOUT) && !defined(MULTIPROCESSOR)
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ldr r6, .Lcurpcb
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ldr r7, .Lcpu_info_store
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#endif
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.Lirq_ast_loop:
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ldr r1, [r5] /* Do we have an AST pending? */
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teq r1, #0x00000000
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beq 2f /* Nope, get out now */
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bne .Lirq_do_ast /* Yup. Go deal with it */
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#if defined(COMPAT_15) && defined(EXEC_AOUT)
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/* Disable alignment faults for the process, if necessary. */
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#ifdef MULTIPROCESSOR
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ldr r7, .Lcpu_info
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bl _C_LABEL(cpu_number)
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ldr r7, [r7, r0, lsl #2]
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ldr r1, [r7, #CI_CURPCB]
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#else
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ldr r1, [r6]
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#endif
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ldr r1, [r1, #PCB_FLAGS] /* Fetch curpcb->pcb_flags */
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tst r1, #PCB_NOALIGNFLT
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beq 1f /* Keep alignment faults enabled */
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ldr r1, [r7, #CI_CTRL] /* Fetch control register */
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ldr r2, .Lcpufuncs
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mov r0, #-1
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bic r1, r1, #CPU_CONTROL_AFLT_ENABLE /* Disable alignment faults */
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mov lr, pc
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ldr pc, [r2, #CF_CONTROL] /* Set the new control register value */
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1:
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#endif
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.Lirq_do_exit:
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PULLFRAMEFROMSVCANDEXIT
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movs pc, lr /* Exit */
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.Lirq_do_ast:
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mov r1, #0x00000000
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str r1, [r0] /* Clear astpending */
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str r1, [r5] /* Clear astpending */
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mrs r4, cpsr /* save CPSR */
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bic r0, r4, #(I32_bit) /* Enable IRQs */
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bl _C_LABEL(ast) /* ast(frame) */
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msr cpsr_c, r4 /* Disable IRQs */
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b 1b /* Check for more ASTs */
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2:
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PULLFRAMEFROMSVCANDEXIT
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movs pc, lr /* Exit */
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b .Lirq_ast_loop /* Check for more ASTs */
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.bss
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.align 0
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