Add support for prefetch and data aborts in Thumb code.
This commit is contained in:
rearnsha
parent
c8bb6ba9a9
commit
b88c8e79ee
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@ -1,4 +1,4 @@
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/* $NetBSD: fault.c,v 1.50 2004/08/08 14:21:29 rearnsha Exp $ */
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/* $NetBSD: fault.c,v 1.51 2004/08/21 12:04:17 rearnsha Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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@ -81,7 +81,7 @@
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#include "opt_kgdb.h"
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#include <sys/types.h>
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__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.50 2004/08/08 14:21:29 rearnsha Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.51 2004/08/21 12:04:17 rearnsha Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -195,8 +195,18 @@ data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l)
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*/
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printf("data_abort_fixup: fixup for %s mode data abort failed.\n",
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TRAP_USERMODE(tf) ? "user" : "kernel");
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printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
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*((u_int *)tf->tf_pc));
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#ifdef THUMB_CODE
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if (tf->tf_spsr & PSR_T_bit) {
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printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
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tf->tf_pc, *((u_int16 *)(tf->tf_pc & ~1),
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*((u_int16 *)((tf->tf_pc + 2) & ~1));
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}
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else
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#endif
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{
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printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
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*((u_int *)tf->tf_pc));
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}
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disassemble(tf->tf_pc);
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/* Die now if this happened in kernel mode */
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@ -285,8 +295,18 @@ data_abort_handler(trapframe_t *tf)
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* someone executing Thumb code, in which case the PC might not
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* be word-aligned. This would cause a kernel alignment fault
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* further down if we have to decode the current instruction.
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* XXX: It would be nice to be able to support Thumb at some point.
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*/
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#ifdef THUMB_CODE
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/*
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* XXX: It would be nice to be able to support Thumb in the kernel
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* at some point.
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*/
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if (__predict_false(!user && (tf->tf_pc & 3) != 0)) {
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printf("\ndata_abort_fault: Misaligned Kernel-mode "
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"Program Counter\n");
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dab_fatal(tf, fsr, far, l, NULL);
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}
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#else
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if (__predict_false((tf->tf_pc & 3) != 0)) {
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if (user) {
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/*
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@ -308,6 +328,7 @@ data_abort_handler(trapframe_t *tf)
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"Program Counter\n");
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dab_fatal(tf, fsr, far, l, NULL);
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}
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#endif
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/* See if the CPU state needs to be fixed up */
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switch (data_abort_fixup(tf, fsr, far, l)) {
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@ -379,17 +400,39 @@ data_abort_handler(trapframe_t *tf)
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if (IS_PERMISSION_FAULT(fsr))
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ftype = VM_PROT_WRITE;
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else {
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u_int insn = ReadWord(tf->tf_pc);
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#ifdef THUMB_CODE
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/* Fast track the ARM case. */
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if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
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u_int insn = fusword((void *)(tf->tf_pc & ~1));
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u_int insn_f8 = insn & 0xf800;
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u_int insn_fe = insn & 0xfe00;
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if (((insn & 0x0c100000) == 0x04000000) || /* STR/STRB */
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((insn & 0x0e1000b0) == 0x000000b0) || /* STRH/STRD */
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((insn & 0x0a100000) == 0x08000000)) /* STM/CDT */
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ftype = VM_PROT_WRITE;
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if (insn_f8 == 0x6000 || /* STR(1) */
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insn_f8 == 0x7000 || /* STRB(1) */
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insn_f8 == 0x8000 || /* STRH(1) */
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insn_f8 == 0x9000 || /* STR(3) */
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insn_f8 == 0xc000 || /* STM */
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insn_fe == 0x5000 || /* STR(2) */
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insn_fe == 0x5200 || /* STRH(2) */
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insn_fe == 0x5400) /* STRB(2) */
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ftype = VM_PROT_WRITE;
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else
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ftype = VM_PROT_READ;
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}
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else
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if ((insn & 0x0fb00ff0) == 0x01000090) /* SWP */
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ftype = VM_PROT_READ | VM_PROT_WRITE;
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else
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ftype = VM_PROT_READ;
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#endif
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{
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u_int insn = ReadWord(tf->tf_pc);
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if (((insn & 0x0c100000) == 0x04000000) || /* STR[B] */
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((insn & 0x0e1000b0) == 0x000000b0) || /* STR[HD]*/
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((insn & 0x0a100000) == 0x08000000)) /* STM/CDT*/
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ftype = VM_PROT_WRITE;
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else if ((insn & 0x0fb00ff0) == 0x01000090)/* SWP */
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ftype = VM_PROT_READ | VM_PROT_WRITE;
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else
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ftype = VM_PROT_READ;
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}
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}
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/*
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@ -626,6 +669,11 @@ dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct lwp *l,
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*/
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tf->tf_spsr |= PSR_USR32_MODE;
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tf->tf_pc = tf->tf_usr_lr;
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#ifdef THUMB_CODE
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tf->tf_spsr &= ~PSR_T_bit;
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if (tf->tf_usr_lr & 1)
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tf->tf_spsr |= PSR_T_bit;
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#endif
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}
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}
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@ -679,8 +727,18 @@ prefetch_abort_fixup(trapframe_t *tf)
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printf(
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"prefetch_abort_fixup: fixup for %s mode prefetch abort failed.\n",
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TRAP_USERMODE(tf) ? "user" : "kernel");
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printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
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*((u_int *)tf->tf_pc));
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#ifdef THUMB_CODE
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if (tf->tf_spsr & PSR_T_bit) {
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printf("pc = 0x%08x, opcode 0x%04x, 0x%04x, insn = ",
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tf->tf_pc, *((u_int16 *)(tf->tf_pc & ~1),
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*((u_int16 *)((tf->tf_pc + 2) & ~1));
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}
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else
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#endif
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{
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printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
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*((u_int *)tf->tf_pc));
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}
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disassemble(tf->tf_pc);
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/* Die now if this happened in kernel mode */
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