2002-10-02 07:10:45 +04:00
|
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/* $NetBSD: uha_isa.c,v 1.26 2002/10/02 03:10:50 thorpej Exp $ */
|
1996-09-01 04:20:20 +04:00
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1998-08-15 14:10:47 +04:00
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum.
|
1996-09-01 04:20:20 +04:00
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
|
1998-08-15 14:10:47 +04:00
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
|
1996-09-01 04:20:20 +04:00
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*
|
1998-08-15 14:10:47 +04:00
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
|
1996-09-01 04:20:20 +04:00
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*/
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2001-11-13 11:01:09 +03:00
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#include <sys/cdefs.h>
|
2002-10-02 07:10:45 +04:00
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__KERNEL_RCSID(0, "$NetBSD: uha_isa.c,v 1.26 2002/10/02 03:10:50 thorpej Exp $");
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2001-11-13 11:01:09 +03:00
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|
1998-07-05 02:18:13 +04:00
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#include "opt_ddb.h"
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|
1996-09-01 00:26:48 +04:00
|
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#include <sys/param.h>
|
1996-10-11 01:23:28 +04:00
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#include <sys/systm.h>
|
1996-09-01 00:26:48 +04:00
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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|
1997-08-27 15:22:52 +04:00
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
|
1996-09-01 00:26:48 +04:00
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/ic/uhareg.h>
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#include <dev/ic/uhavar.h>
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#define UHA_ISA_IOSIZE 16
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|
1997-06-07 03:43:45 +04:00
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int uha_isa_probe __P((struct device *, struct cfdata *, void *));
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1996-09-01 00:26:48 +04:00
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void uha_isa_attach __P((struct device *, struct device *, void *));
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|
2002-10-02 07:10:45 +04:00
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CFATTACH_DECL(uha_isa, sizeof(struct uha_softc),
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uha_isa_probe, uha_isa_attach, NULL, NULL);
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1996-09-01 00:26:48 +04:00
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1996-11-16 01:53:36 +03:00
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#ifndef DDB
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#define Debugger() panic("should call debugger here (uha_isa.c)")
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#endif /* ! DDB */
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1996-09-01 00:26:48 +04:00
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1997-03-29 05:32:30 +03:00
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int u14_find __P((bus_space_tag_t, bus_space_handle_t,
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struct uha_probe_data *));
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void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *));
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1997-08-27 15:22:52 +04:00
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int u14_poll __P((struct uha_softc *, struct scsipi_xfer *, int));
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1997-03-29 05:32:30 +03:00
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int u14_intr __P((void *));
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void u14_init __P((struct uha_softc *));
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1996-09-01 00:26:48 +04:00
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/*
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* Check the slots looking for a board we recognise
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* If we find one, note it's address (slot) and call
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* the actual probe routine to check it out.
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*/
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int
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uha_isa_probe(parent, match, aux)
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struct device *parent;
|
1997-06-07 03:43:45 +04:00
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struct cfdata *match;
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void *aux;
|
1996-09-01 00:26:48 +04:00
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{
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struct isa_attach_args *ia = aux;
|
1996-10-22 02:34:38 +04:00
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bus_space_tag_t iot = ia->ia_iot;
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bus_space_handle_t ioh;
|
1997-03-29 05:32:30 +03:00
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struct uha_probe_data upd;
|
1996-09-01 00:26:48 +04:00
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int rv;
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2002-01-08 00:46:56 +03:00
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if (ia->ia_nio < 1)
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return (0);
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if (ia->ia_nirq < 1)
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return (0);
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if (ia->ia_ndrq < 1)
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return (0);
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if (ISA_DIRECT_CONFIG(ia))
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return (0);
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|
1997-10-19 22:56:39 +04:00
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/* Disallow wildcarded i/o address. */
|
2002-01-08 00:46:56 +03:00
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if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
|
1997-10-19 22:56:39 +04:00
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return (0);
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|
2002-01-08 00:46:56 +03:00
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if (bus_space_map(iot, ia->ia_io[0].ir_addr, UHA_ISA_IOSIZE, 0, &ioh))
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1996-09-01 00:26:48 +04:00
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return (0);
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|
1997-03-29 05:32:30 +03:00
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rv = u14_find(iot, ioh, &upd);
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1996-09-01 00:26:48 +04:00
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|
1996-10-22 02:34:38 +04:00
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bus_space_unmap(iot, ioh, UHA_ISA_IOSIZE);
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1996-09-01 00:26:48 +04:00
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if (rv) {
|
2002-01-08 00:46:56 +03:00
|
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if (ia->ia_irq[0].ir_irq != ISACF_IRQ_DEFAULT &&
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ia->ia_irq[0].ir_irq != upd.sc_irq)
|
1996-09-01 00:26:48 +04:00
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return (0);
|
2002-01-08 00:46:56 +03:00
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if (ia->ia_drq[0].ir_drq != ISACF_DRQ_DEFAULT &&
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ia->ia_drq[0].ir_drq != upd.sc_drq)
|
1996-09-01 00:26:48 +04:00
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return (0);
|
2002-01-08 00:46:56 +03:00
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ia->ia_nio = 1;
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ia->ia_io[0].ir_size = UHA_ISA_IOSIZE;
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ia->ia_nirq = 1;
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ia->ia_irq[0].ir_irq = upd.sc_irq;
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ia->ia_ndrq = 1;
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ia->ia_drq[0].ir_drq = upd.sc_drq;
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ia->ia_niomem = 0;
|
1996-09-01 00:26:48 +04:00
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}
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return (rv);
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}
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/*
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* Attach all the sub-devices we can find
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*/
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void
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uha_isa_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct isa_attach_args *ia = aux;
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struct uha_softc *sc = (void *)self;
|
1996-10-22 02:34:38 +04:00
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bus_space_tag_t iot = ia->ia_iot;
|
1997-06-07 03:43:45 +04:00
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bus_dma_tag_t dmat = ia->ia_dmat;
|
1996-10-22 02:34:38 +04:00
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bus_space_handle_t ioh;
|
1997-03-29 05:32:30 +03:00
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struct uha_probe_data upd;
|
1996-09-01 00:26:48 +04:00
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isa_chipset_tag_t ic = ia->ia_ic;
|
1998-06-25 23:18:05 +04:00
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int error;
|
1996-09-01 00:26:48 +04:00
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1996-10-13 05:37:04 +04:00
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printf("\n");
|
1996-09-01 00:26:48 +04:00
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2002-01-08 00:46:56 +03:00
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if (bus_space_map(iot, ia->ia_io[0].ir_addr, UHA_ISA_IOSIZE, 0, &ioh)) {
|
1997-10-20 22:43:03 +04:00
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printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
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return;
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}
|
1996-09-01 00:26:48 +04:00
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|
1996-10-22 02:34:38 +04:00
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sc->sc_iot = iot;
|
1996-09-01 00:26:48 +04:00
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sc->sc_ioh = ioh;
|
1997-06-07 03:43:45 +04:00
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sc->sc_dmat = dmat;
|
1997-10-20 22:43:03 +04:00
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|
if (!u14_find(iot, ioh, &upd)) {
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|
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printf("%s: u14_find failed\n", sc->sc_dev.dv_xname);
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return;
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}
|
1996-09-01 00:26:48 +04:00
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|
1997-06-07 03:43:45 +04:00
|
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|
if (upd.sc_drq != -1) {
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|
sc->sc_dmaflags = 0;
|
1998-06-25 23:18:05 +04:00
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|
if ((error = isa_dmacascade(ic, upd.sc_drq)) != 0) {
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|
printf("%s: unable to cascade DRQ, error = %d\n",
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|
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sc->sc_dev.dv_xname, error);
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return;
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|
}
|
1997-06-07 03:43:45 +04:00
|
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|
} else {
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|
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/*
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|
|
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* We have a VLB controller, and can do 32-bit DMA.
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|
*/
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sc->sc_dmaflags = ISABUS_DMA_32BIT;
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}
|
1996-09-01 00:26:48 +04:00
|
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|
1997-03-29 05:32:30 +03:00
|
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|
sc->sc_ih = isa_intr_establish(ic, upd.sc_irq, IST_EDGE, IPL_BIO,
|
1996-09-01 00:26:48 +04:00
|
|
|
u14_intr, sc);
|
|
|
|
if (sc->sc_ih == NULL) {
|
1996-10-13 05:37:04 +04:00
|
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|
printf("%s: couldn't establish interrupt\n",
|
1996-09-01 00:26:48 +04:00
|
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|
sc->sc_dev.dv_xname);
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|
return;
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|
|
|
}
|
|
|
|
|
|
|
|
/* Save function pointers for later use. */
|
|
|
|
sc->start_mbox = u14_start_mbox;
|
|
|
|
sc->poll = u14_poll;
|
|
|
|
sc->init = u14_init;
|
|
|
|
|
1997-03-29 05:32:30 +03:00
|
|
|
uha_attach(sc, &upd);
|
1996-09-01 00:26:48 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start the board, ready for normal operation
|
|
|
|
*/
|
|
|
|
int
|
1996-10-22 02:34:38 +04:00
|
|
|
u14_find(iot, ioh, sc)
|
|
|
|
bus_space_tag_t iot;
|
|
|
|
bus_space_handle_t ioh;
|
1997-03-29 05:32:30 +03:00
|
|
|
struct uha_probe_data *sc;
|
1996-09-01 00:26:48 +04:00
|
|
|
{
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|
|
|
u_int16_t model, config;
|
|
|
|
int irq, drq;
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|
|
|
int resetcount = 4000; /* 4 secs? */
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
model = (bus_space_read_1(iot, ioh, U14_ID + 0) << 8) |
|
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|
|
(bus_space_read_1(iot, ioh, U14_ID + 1) << 0);
|
1996-09-01 00:26:48 +04:00
|
|
|
if ((model & 0xfff0) != 0x5640)
|
|
|
|
return (0);
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
config = (bus_space_read_1(iot, ioh, U14_CONFIG + 0) << 8) |
|
|
|
|
(bus_space_read_1(iot, ioh, U14_CONFIG + 1) << 0);
|
1996-09-01 00:26:48 +04:00
|
|
|
|
|
|
|
switch (model & 0x000f) {
|
|
|
|
case 0x0000:
|
|
|
|
switch (config & U14_DMA_MASK) {
|
|
|
|
case U14_DMA_CH5:
|
|
|
|
drq = 5;
|
|
|
|
break;
|
|
|
|
case U14_DMA_CH6:
|
|
|
|
drq = 6;
|
|
|
|
break;
|
|
|
|
case U14_DMA_CH7:
|
|
|
|
drq = 7;
|
|
|
|
break;
|
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("u14_find: illegal drq setting %x\n",
|
1996-09-01 00:26:48 +04:00
|
|
|
config & U14_DMA_MASK);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x0001:
|
|
|
|
/* This is a 34f, and doesn't need an ISA DMA channel. */
|
|
|
|
drq = -1;
|
|
|
|
break;
|
1996-10-11 01:23:28 +04:00
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("u14_find: unknown model %x\n", model);
|
1996-10-11 01:23:28 +04:00
|
|
|
return (0);
|
1996-09-01 00:26:48 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
switch (config & U14_IRQ_MASK) {
|
|
|
|
case U14_IRQ10:
|
|
|
|
irq = 10;
|
|
|
|
break;
|
|
|
|
case U14_IRQ11:
|
|
|
|
irq = 11;
|
|
|
|
break;
|
|
|
|
case U14_IRQ14:
|
|
|
|
irq = 14;
|
|
|
|
break;
|
|
|
|
case U14_IRQ15:
|
|
|
|
irq = 15;
|
|
|
|
break;
|
|
|
|
default:
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("u14_find: illegal irq setting %x\n",
|
1996-09-01 00:26:48 +04:00
|
|
|
config & U14_IRQ_MASK);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, U14_LINT, UHA_ASRST);
|
1996-09-01 00:26:48 +04:00
|
|
|
|
|
|
|
while (--resetcount) {
|
1996-10-22 02:34:38 +04:00
|
|
|
if (bus_space_read_1(iot, ioh, U14_LINT))
|
1996-09-01 00:26:48 +04:00
|
|
|
break;
|
|
|
|
delay(1000); /* 1 mSec per loop */
|
|
|
|
}
|
|
|
|
if (!resetcount) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("u14_find: board timed out during reset\n");
|
1996-09-01 00:26:48 +04:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* if we want to fill in softc, do so now */
|
1997-03-29 05:32:30 +03:00
|
|
|
if (sc) {
|
1996-09-01 00:26:48 +04:00
|
|
|
sc->sc_irq = irq;
|
|
|
|
sc->sc_drq = drq;
|
|
|
|
sc->sc_scsi_dev = config & U14_HOSTID_MASK;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Function to send a command out through a mailbox
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
u14_start_mbox(sc, mscp)
|
|
|
|
struct uha_softc *sc;
|
|
|
|
struct uha_mscp *mscp;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-09-01 00:26:48 +04:00
|
|
|
int spincount = 100000; /* 1s should be enough */
|
|
|
|
|
|
|
|
while (--spincount) {
|
1996-10-22 02:34:38 +04:00
|
|
|
if ((bus_space_read_1(iot, ioh, U14_LINT) & U14_LDIP) == 0)
|
1996-09-01 00:26:48 +04:00
|
|
|
break;
|
|
|
|
delay(100);
|
|
|
|
}
|
|
|
|
if (!spincount) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: uha_start_mbox, board not responding\n",
|
1996-09-01 00:26:48 +04:00
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
Debugger();
|
|
|
|
}
|
|
|
|
|
1997-06-07 03:43:45 +04:00
|
|
|
bus_space_write_4(iot, ioh, U14_OGMPTR,
|
1998-02-17 06:02:30 +03:00
|
|
|
sc->sc_dmamap_mscp->dm_segs[0].ds_addr + UHA_MSCP_OFF(mscp));
|
1996-09-01 00:26:48 +04:00
|
|
|
if (mscp->flags & MSCP_ABORT)
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, U14_LINT, U14_ABORT);
|
1996-09-01 00:26:48 +04:00
|
|
|
else
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, U14_LINT, U14_OGMFULL);
|
1996-09-01 00:26:48 +04:00
|
|
|
|
1999-10-01 03:04:39 +04:00
|
|
|
if ((mscp->xs->xs_control & XS_CTL_POLL) == 0)
|
2000-03-23 10:01:25 +03:00
|
|
|
callout_reset(&mscp->xs->xs_callout,
|
2002-04-05 22:27:45 +04:00
|
|
|
mstohz(mscp->timeout), uha_timeout, mscp);
|
1996-09-01 00:26:48 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Function to poll for command completion when in poll mode.
|
|
|
|
*
|
|
|
|
* wait = timeout in msec
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
u14_poll(sc, xs, count)
|
|
|
|
struct uha_softc *sc;
|
1997-08-27 15:22:52 +04:00
|
|
|
struct scsipi_xfer *xs;
|
1996-09-01 00:26:48 +04:00
|
|
|
int count;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-09-01 00:26:48 +04:00
|
|
|
|
|
|
|
while (count) {
|
|
|
|
/*
|
|
|
|
* If we had interrupts enabled, would we
|
|
|
|
* have got an interrupt?
|
|
|
|
*/
|
1996-10-22 02:34:38 +04:00
|
|
|
if (bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP)
|
1996-09-01 00:26:48 +04:00
|
|
|
u14_intr(sc);
|
1999-10-01 03:04:39 +04:00
|
|
|
if (xs->xs_status & XS_STS_DONE)
|
1996-09-01 00:26:48 +04:00
|
|
|
return (0);
|
|
|
|
delay(1000);
|
|
|
|
count--;
|
|
|
|
}
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Catch an interrupt from the adaptor
|
|
|
|
*/
|
|
|
|
int
|
|
|
|
u14_intr(arg)
|
|
|
|
void *arg;
|
|
|
|
{
|
|
|
|
struct uha_softc *sc = arg;
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-09-01 00:26:48 +04:00
|
|
|
struct uha_mscp *mscp;
|
|
|
|
u_char uhastat;
|
|
|
|
u_long mboxval;
|
|
|
|
|
|
|
|
#ifdef UHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: uhaintr ", sc->sc_dev.dv_xname);
|
1996-09-01 00:26:48 +04:00
|
|
|
#endif /*UHADEBUG */
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
if ((bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP) == 0)
|
1996-09-01 00:26:48 +04:00
|
|
|
return (0);
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
/*
|
|
|
|
* First get all the information and then
|
|
|
|
* acknowledge the interrupt
|
|
|
|
*/
|
1996-10-22 02:34:38 +04:00
|
|
|
uhastat = bus_space_read_1(iot, ioh, U14_SINT);
|
|
|
|
mboxval = bus_space_read_4(iot, ioh, U14_ICMPTR);
|
1996-09-01 00:26:48 +04:00
|
|
|
/* XXX Send an ABORT_ACK instead? */
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, U14_SINT, U14_ICM_ACK);
|
1996-09-01 00:26:48 +04:00
|
|
|
|
|
|
|
#ifdef UHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("status = 0x%x ", uhastat);
|
1996-09-01 00:26:48 +04:00
|
|
|
#endif /*UHADEBUG*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Process the completed operation
|
|
|
|
*/
|
|
|
|
mscp = uha_mscp_phys_kv(sc, mboxval);
|
|
|
|
if (!mscp) {
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("%s: BAD MSCP RETURNED!\n",
|
1996-09-01 00:26:48 +04:00
|
|
|
sc->sc_dev.dv_xname);
|
|
|
|
continue; /* whatever it was, it'll timeout */
|
|
|
|
}
|
|
|
|
|
2000-03-23 10:01:25 +03:00
|
|
|
callout_stop(&mscp->xs->xs_callout);
|
1996-09-01 00:26:48 +04:00
|
|
|
uha_done(sc, mscp);
|
|
|
|
|
1996-10-22 02:34:38 +04:00
|
|
|
if ((bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP) == 0)
|
1996-09-01 00:26:48 +04:00
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
u14_init(sc)
|
|
|
|
struct uha_softc *sc;
|
|
|
|
{
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_tag_t iot = sc->sc_iot;
|
|
|
|
bus_space_handle_t ioh = sc->sc_ioh;
|
1996-09-01 00:26:48 +04:00
|
|
|
|
|
|
|
/* make sure interrupts are enabled */
|
|
|
|
#ifdef UHADEBUG
|
1996-10-13 05:37:04 +04:00
|
|
|
printf("u14_init: lmask=%02x, smask=%02x\n",
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_read_1(iot, ioh, U14_LMASK),
|
|
|
|
bus_space_read_1(iot, ioh, U14_SMASK));
|
1996-09-01 00:26:48 +04:00
|
|
|
#endif
|
1996-10-22 02:34:38 +04:00
|
|
|
bus_space_write_1(iot, ioh, U14_LMASK, 0xd1); /* XXX */
|
|
|
|
bus_space_write_1(iot, ioh, U14_SMASK, 0x91); /* XXX */
|
1996-09-01 00:26:48 +04:00
|
|
|
}
|