Pull thorpej-bus-dma branch into mainline.

This commit is contained in:
thorpej 1997-06-06 23:43:45 +00:00
parent 029d774d1a
commit 11e78a6b0d
37 changed files with 1341 additions and 378 deletions

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@ -1,4 +1,4 @@
# $NetBSD: ALPHA,v 1.53 1997/06/05 02:29:56 thorpej Exp $
# $NetBSD: ALPHA,v 1.54 1997/06/06 23:49:36 thorpej Exp $
#
# Alpha kernel with all the options you'd want, and more.
@ -183,24 +183,36 @@ pms* at pcppi? # PS/2-style mouse (aux port)
com* at isa? port 0x3f8 irq 4 # standard serial ports
com* at isa? port 0x2f8 irq 3
ep* at isa? port ? irq ? # 3COM 3c509 Ethernet
#le* at isa? port 0x320 irq 10 drq 7 # IsoLan, NE2100, DEPCA (unt.)
lpt* at isa? port 0x3bc irq 7 # standard parallel port
vga* at isa? # ISA (EISA: XXX) VGA
awdc0 at isa? port 0x1f0 irq 14 # ST506/ESDI/IDE controllers
awdc1 at isa? port 0x170 irq 15
#wss* at isa? port 0x530 irq 9 drq 0 # Windows Sound System
aha* at isa? port 0x330 irq ? drq ? # Adaptec 154[02] SCSI
aha* at isa? port 0x334 irq ? drq ? # Adaptec 154[02] SCSI
bha* at isa? port 0x330 irq ? drq ? # BusLogic [57]4X SCSI (unt.)
bha* at isa? port 0x334 irq ? drq ? # BusLogic [57]4X SCSI (unt.)
uha* at isa? port 0x330 irq ? drq ? # UltraStor [13]4f SCSI (unt.)
uha* at isa? port 0x334 irq ? drq ? # UltraStor [13]4f SCSI (unt.)
# EISA devices
ahb* at eisa? slot ? # Adaptec 174[024] SCSI (unt.)
ahc* at eisa? slot ? # Adaptec 274x, aic7770 SCSI
bha* at eisa? slot ? # BusLogic 7xx SCSI
ep* at eisa? slot ? # 3COM 3c579 Ethernet (untested)
fea* at eisa? slot ? # DEC DEFEA FDDI
uha* at eisa? slot ? # UltraStor 24f SCSI (unt.)
# SCSI bus support
scsibus* at aha?
scsibus* at ahb?
scsibus* at ahc?
scsibus* at asc?
scsibus* at bha?
scsibus* at isp?
scsibus* at ncr?
scsibus* at uha?
# SCSI devices
cd* at scsibus? target ? lun ? # SCSI CD-ROM drives

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@ -1,4 +1,4 @@
# $NetBSD: GENERIC,v 1.55 1997/06/05 02:29:58 thorpej Exp $
# $NetBSD: GENERIC,v 1.56 1997/06/06 23:49:37 thorpej Exp $
#
# Generic Alpha kernel. Enough to get booted, etc., but not much more.
@ -147,24 +147,36 @@ pms* at pcppi? # PS/2-style mouse (aux port)
com* at isa? port 0x3f8 irq 4 # standard serial ports
com* at isa? port 0x2f8 irq 3
ep* at isa? port ? irq ? # 3COM 3c509 Ethernet
#le* at isa? port 0x320 irq 10 drq 7 # IsoLan, NE2100, DEPCA (unt.)
lpt* at isa? port 0x3bc irq 7 # standard parallel port
vga* at isa? # ISA (EISA: XXX) VGA
awdc0 at isa? port 0x1f0 irq 14 # ST506/ESDI/IDE controllers
awdc1 at isa? port 0x170 irq 15
#wss* at isa? port 0x530 irq 9 drq 0 # Windows Sound System
aha* at isa? port 0x330 irq ? drq ? # Adaptec 154[02] SCSI
aha* at isa? port 0x334 irq ? drq ? # Adaptec 154[02] SCSI
bha* at isa? port 0x330 irq ? drq ? # BusLogic [57]4X SCSI (unt.)
bha* at isa? port 0x334 irq ? drq ? # BusLogic [57]4X SCSI (unt.)
uha* at isa? port 0x330 irq ? drq ? # UltraStor [13]4f SCSI (unt.)
uha* at isa? port 0x334 irq ? drq ? # UltraStor [13]4f SCSI (unt.)
# EISA devices
ahb* at eisa? slot ? # Adaptec 174[024] SCSI (unt.)
ahc* at eisa? slot ? # Adaptec 274x, aic7770 SCSI
bha* at eisa? slot ? # BusLogic 7xx SCSI
ep* at eisa? slot ? # 3COM 3c579 Ethernet (untested)
fea* at eisa? slot ? # DEC DEFEA FDDI
uha* at eisa? slot ? # UltraStor 24f SCSI (unt.)
# SCSI bus support
scsibus* at aha?
scsibus* at ahb?
scsibus* at ahc?
scsibus* at asc?
scsibus* at bha?
scsibus* at isp?
scsibus* at ncr?
scsibus* at uha?
# SCSI devices
cd* at scsibus? target ? lun ? # SCSI CD-ROM drives

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@ -1,4 +1,4 @@
# $NetBSD: files.alpha,v 1.46 1997/04/21 14:47:37 cgd Exp $
# $NetBSD: files.alpha,v 1.47 1997/06/06 23:49:38 thorpej Exp $
#
# alpha-specific configuration info
@ -29,6 +29,8 @@ define wsconsdev {[console = -1]}
define alpha_shared_intr
file arch/alpha/common/shared_intr.c alpha_shared_intr | dec_eb164 |
dec_eb64plus | dec_kn20aa | dec_kn8ae
define alpha_sgmap
file arch/alpha/common/sgmap_common.c alpha_sgmap | dec_3000_500
device vga: wsconsdev
file arch/alpha/common/vga.c vga
@ -112,6 +114,10 @@ device tcasic: tcbus
attach tcasic at mainbus
file arch/alpha/tc/tcasic.c tcasic
file arch/alpha/tc/tc_bus_mem.c tcasic
file arch/alpha/tc/tc_dma.c tcasic
file arch/alpha/tc/tc_dma_3000_300.c tcasic & dec_3000_300
file arch/alpha/tc/tc_dma_3000_500.c tcasic & dec_3000_500
file arch/alpha/tc/tc_sgmap.c tcasic & dec_3000_500
file arch/alpha/tc/tc_3000_500.c tcasic & dec_3000_500
file arch/alpha/tc/tc_3000_300.c tcasic & dec_3000_300
@ -219,36 +225,42 @@ include "dev/eisa/files.eisa"
# include "dev/pci/files.pci" XXX SEE ABOVE
device apecs: pcibus
device apecs: pcibus, alpha_sgmap
attach apecs at mainbus
file arch/alpha/pci/apecs.c apecs
file arch/alpha/pci/apecs_bus_io.c apecs
file arch/alpha/pci/apecs_bus_mem.c apecs
file arch/alpha/pci/apecs_dma.c apecs
file arch/alpha/pci/apecs_pci.c apecs
device lca: pcibus
device lca: pcibus, alpha_sgmap
attach lca at mainbus
file arch/alpha/pci/lca.c lca
file arch/alpha/pci/lca_bus_io.c lca
file arch/alpha/pci/lca_bus_mem.c lca
file arch/alpha/pci/lca_dma.c lca
file arch/alpha/pci/lca_pci.c lca
device cia: pcibus
device cia: pcibus, alpha_sgmap
attach cia at mainbus
file arch/alpha/pci/cia.c cia
file arch/alpha/pci/cia_bus_io.c cia
file arch/alpha/pci/cia_bus_mem.c cia
file arch/alpha/pci/cia_dma.c cia
file arch/alpha/pci/cia_pci.c cia
device dwlpx: pcibus
device dwlpx: pcibus, alpha_sgmap
attach dwlpx at kft
file arch/alpha/pci/dwlpx.c dwlpx
file arch/alpha/pci/dwlpx_dma.c dwlpx
file arch/alpha/pci/dwlpx_pci.c dwlpx
file arch/alpha/pci/pci_kn8ae.c dwlpx
file arch/alpha/pci/dwlpx_bus_mem.c dwlpx
file arch/alpha/pci/dwlpx_bus_io.c dwlpx
# common support files
file arch/alpha/pci/pci_sgmap_pte32.c dwlpx
file arch/alpha/pci/pci_sgmap_pte64.c apecs | cia | lca
file arch/alpha/pci/pci_swiz_io_common.c apecs | cia | dwlpx | lca
file arch/alpha/pci/pci_swiz_mem_common.c apecs | cia | dwlpx | lca
@ -319,6 +331,7 @@ file arch/alpha/alpha/sys_machdep.c
file arch/alpha/alpha/trap.c
file arch/alpha/alpha/vm_machdep.c
file arch/alpha/alpha/disksubr.c
file arch/alpha/common/bus_dma.c
file dev/cons.c
# Network protocol checksum routines

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@ -1,4 +1,41 @@
/* $NetBSD: bus.h,v 1.11 1997/04/06 08:47:18 cgd Exp $ */
/* $NetBSD: bus.h,v 1.12 1997/06/06 23:51:49 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1996 Carnegie-Mellon University.
@ -324,4 +361,200 @@ struct alpha_bus_space {
#define bus_space_copy_8(t, h1, o1, h2, o2, c) \
__abs_copy(8, t, h1, o1, h2, o2, c)
/*
* Bus DMA methods.
*/
/*
* Flags used in various bus DMA methods.
*/
#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */
#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */
#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */
#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */
#define BUS_DMA_BUS1 0x10 /* placeholders for bus functions... */
#define BUS_DMA_BUS2 0x20
#define BUS_DMA_BUS3 0x40
#define BUS_DMA_BUS4 0x80
/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;
/*
* bus_dmasync_op_t
*
* Operations performed by bus_dmamap_sync().
*/
typedef enum {
BUS_DMASYNC_PREREAD,
BUS_DMASYNC_POSTREAD,
BUS_DMASYNC_PREWRITE,
BUS_DMASYNC_POSTWRITE,
} bus_dmasync_op_t;
/*
* alpha_bus_t
*
* Busses supported by NetBSD/alpha, used by internal
* utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT
* CODE!
*/
typedef enum {
ALPHA_BUS_TURBOCHANNEL,
ALPHA_BUS_PCI,
ALPHA_BUS_EISA,
ALPHA_BUS_ISA,
ALPHA_BUS_TLSB,
} alpha_bus_t;
typedef struct alpha_bus_dma_tag *bus_dma_tag_t;
typedef struct alpha_bus_dmamap *bus_dmamap_t;
/*
* bus_dma_segment_t
*
* Describes a single contiguous DMA transaction. Values
* are suitable for programming into DMA registers.
*/
struct alpha_bus_dma_segment {
bus_addr_t ds_addr; /* DMA address */
bus_size_t ds_len; /* length of transfer */
};
typedef struct alpha_bus_dma_segment bus_dma_segment_t;
/*
* bus_dma_tag_t
*
* A machine-dependent opaque type describing the implementation of
* DMA for a given bus.
*/
struct alpha_bus_dma_tag {
void *_cookie; /* cookie used in the guts */
/*
* Internal-use only utility methods. NOT TO BE USED BY
* MACHINE-INDEPENDENT CODE!
*/
bus_dma_tag_t (*_get_tag) __P((bus_dma_tag_t, alpha_bus_t));
/*
* DMA mapping methods.
*/
int (*_dmamap_create) __P((bus_dma_tag_t, bus_size_t, int,
bus_size_t, bus_size_t, int, bus_dmamap_t *));
void (*_dmamap_destroy) __P((bus_dma_tag_t, bus_dmamap_t));
int (*_dmamap_load) __P((bus_dma_tag_t, bus_dmamap_t, void *,
bus_size_t, struct proc *, int));
int (*_dmamap_load_mbuf) __P((bus_dma_tag_t, bus_dmamap_t,
struct mbuf *, int));
int (*_dmamap_load_uio) __P((bus_dma_tag_t, bus_dmamap_t,
struct uio *, int));
int (*_dmamap_load_raw) __P((bus_dma_tag_t, bus_dmamap_t,
bus_dma_segment_t *, int, bus_size_t, int));
void (*_dmamap_unload) __P((bus_dma_tag_t, bus_dmamap_t));
void (*_dmamap_sync) __P((bus_dma_tag_t, bus_dmamap_t,
bus_dmasync_op_t));
/*
* DMA memory utility functions.
*/
int (*_dmamem_alloc) __P((bus_dma_tag_t, bus_size_t, bus_size_t,
bus_size_t, bus_dma_segment_t *, int, int *, int));
void (*_dmamem_free) __P((bus_dma_tag_t,
bus_dma_segment_t *, int));
int (*_dmamem_map) __P((bus_dma_tag_t, bus_dma_segment_t *,
int, size_t, caddr_t *, int));
void (*_dmamem_unmap) __P((bus_dma_tag_t, caddr_t, size_t));
int (*_dmamem_mmap) __P((bus_dma_tag_t, bus_dma_segment_t *,
int, int, int, int));
};
#define alphabus_dma_get_tag(t, b) \
(*(t)->_get_tag)(t, b)
#define bus_dmamap_create(t, s, n, m, b, f, p) \
(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
#define bus_dmamap_destroy(t, p) \
(*(t)->_dmamap_destroy)((t), (p))
#define bus_dmamap_load(t, m, b, s, p, f) \
(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
#define bus_dmamap_load_mbuf(t, m, b, f) \
(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
#define bus_dmamap_load_uio(t, m, u, f) \
(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
#define bus_dmamap_unload(t, p) \
(*(t)->_dmamap_unload)((t), (p))
#define bus_dmamap_sync(t, p, o) \
(void)((t)->_dmamap_sync ? \
(*(t)->_dmamap_sync)((t), (p), (o)) : (void)0)
#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
#define bus_dmamem_free(t, sg, n) \
(*(t)->_dmamem_free)((t), (sg), (n))
#define bus_dmamem_map(t, sg, n, s, k, f) \
(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
#define bus_dmamem_unmap(t, k, s) \
(*(t)->_dmamem_unmap)((t), (k), (s))
#define bus_dmamem_mmap(t, sg, n, o, p, f) \
(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
/*
* bus_dmamap_t
*
* Describes a DMA mapping.
*/
struct alpha_bus_dmamap {
/*
* PRIVATE MEMBERS: not for use my machine-independent code.
*/
bus_size_t _dm_size; /* largest DMA transfer mappable */
int _dm_segcnt; /* number of segs this map can map */
bus_size_t _dm_maxsegsz; /* largest possible segment */
bus_size_t _dm_boundary; /* don't cross this */
int _dm_flags; /* misc. flags */
void *_dm_cookie; /* cookie for bus-specific functions */
/*
* PUBLIC MEMBERS: these are used by machine-independent code.
*/
int dm_nsegs; /* # valid segments in mapping */
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
};
#ifdef _ALPHA_BUS_DMA_PRIVATE
int _bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int, bus_size_t,
bus_size_t, int, bus_dmamap_t *));
void _bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
int _bus_dmamap_load_direct_common __P((bus_dma_tag_t, bus_dmamap_t,
void *, bus_size_t, struct proc *, int, bus_addr_t));
int _bus_dmamap_load_mbuf_direct_common __P((bus_dma_tag_t,
bus_dmamap_t, struct mbuf *, int, bus_addr_t));
int _bus_dmamap_load_uio_direct_common __P((bus_dma_tag_t,
bus_dmamap_t, struct uio *, int, bus_addr_t));
int _bus_dmamap_load_raw_direct_common __P((bus_dma_tag_t,
bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t,
int, bus_addr_t));
void _bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
void _bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t));
int _bus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size,
bus_size_t alignment, bus_size_t boundary,
bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags));
void _bus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs));
int _bus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, size_t size, caddr_t *kvap, int flags));
void _bus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva,
size_t size));
int _bus_dmamem_mmap __P((bus_dma_tag_t tag, bus_dma_segment_t *segs,
int nsegs, int off, int prot, int flags));
#endif /* _ALPHA_BUS_DMA_PRIVATE */
#endif /* _ALPHA_BUS_H_ */

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@ -1,4 +1,4 @@
/* $NetBSD: wd.c,v 1.156 1997/01/17 20:45:29 perry Exp $ */
/* $NetBSD: wd.c,v 1.157 1997/06/06 23:44:06 thorpej Exp $ */
/*
* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
@ -52,6 +52,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <dev/isa/isavar.h>
@ -267,6 +268,15 @@ wdcattach(parent, self, aux)
printf("\n");
if (wdc->sc_drq != -1) {
if (isa_dmamap_create(parent, wdc->sc_drq, MAXPHYS,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("%s: can't create map for drq %d\n",
wdc->sc_dev.dv_xname, wdc->sc_drq);
wdc->sc_drq = -1;
}
}
wdc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
IPL_BIO, wdcintr, wdc);
@ -681,12 +691,12 @@ loop:
case WDM_DMA:
command = (bp->b_flags & B_READ) ?
WDCC_READDMA : WDCC_WRITEDMA;
/* Start the DMA channel and bounce the buffer if
necessary. */
isa_dmastart(
/* Start the DMA channel. */
isa_dmastart(wdc->sc_dev.dv_parent, wdc->sc_drq,
bp->b_data + wd->sc_skip, wd->sc_nbytes,
NULL,
bp->b_flags & B_READ ? DMAMODE_READ : DMAMODE_WRITE,
bp->b_data + wd->sc_skip,
wd->sc_nbytes, wdc->sc_drq);
BUS_DMA_NOWAIT);
break;
case WDM_PIOMULTI:
command = (bp->b_flags & B_READ) ?
@ -792,10 +802,9 @@ wdcintr(arg)
return 1;
}
/* Turn off the DMA channel and unbounce the buffer. */
/* Turn off the DMA channel. */
if (wd->sc_mode == WDM_DMA)
isa_dmadone(bp->b_flags & B_READ ? DMAMODE_READ : DMAMODE_WRITE,
bp->b_data + wd->sc_skip, wd->sc_nbytes, wdc->sc_drq);
isa_dmadone(wdc->sc_dev.dv_parent, wdc->sc_drq);
/* Have we an error? */
if (wdc->sc_status & WDCS_ERR) {

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@ -1,4 +1,4 @@
/* $NetBSD: ad1848.c,v 1.30 1997/05/31 15:30:22 jtk Exp $ */
/* $NetBSD: ad1848.c,v 1.31 1997/06/06 23:43:45 thorpej Exp $ */
/*
* Copyright (c) 1994 John Brezak
@ -81,6 +81,7 @@
#include <sys/buf.h>
#include <machine/cpu.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <sys/audioio.h>
@ -287,7 +288,8 @@ ad1848_forceintr(sc)
* it is needed (and you pay the latency). Also, you might
* never need the buffer anyway.)
*/
isa_dmastart(DMAMODE_READ, &dmabuf, 1, sc->sc_drq);
isa_dmastart(sc->sc_isa, sc->sc_drq, &dmabuf, 1, NULL,
DMAMODE_READ, BUS_DMA_NOWAIT);
ad_write(sc, SP_LOWER_BASE_COUNT, 0);
ad_write(sc, SP_UPPER_BASE_COUNT, 0);
@ -495,6 +497,23 @@ ad1848_attach(sc)
sc->sc_locked = 0;
if (sc->sc_drq != -1) {
if (isa_dmamap_create(sc->sc_isa, sc->sc_drq, MAXPHYS /* XXX */,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("ad1848_attach: can't create map for drq %d\n",
sc->sc_drq);
return;
}
}
if (sc->sc_recdrq != -1 && sc->sc_recdrq != sc->sc_drq) {
if (isa_dmamap_create(sc->sc_isa, sc->sc_recdrq, MAXPHYS /* XXX */,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("ad1848_attach: can't creape map for drq %d\n",
sc->sc_recdrq);
return;
}
}
/* Initialize the ad1848... */
for (i = 0; i < 16; i++)
ad_write(sc, i, ad1848_init_values[i]);
@ -1470,7 +1489,8 @@ ad1848_dma_input(addr, p, cc, intr, arg)
sc->sc_dma_flags = DMAMODE_READ;
sc->sc_dma_bp = p;
sc->sc_dma_cnt = cc;
isa_dmastart(DMAMODE_READ, p, cc, sc->sc_recdrq);
isa_dmastart(sc->sc_isa, sc->sc_recdrq, p, cc, NULL,
DMAMODE_READ, BUS_DMA_NOWAIT);
if (sc->precision == 16)
cc >>= 1;
@ -1524,7 +1544,8 @@ ad1848_dma_output(addr, p, cc, intr, arg)
sc->sc_dma_flags = DMAMODE_WRITE;
sc->sc_dma_bp = p;
sc->sc_dma_cnt = cc;
isa_dmastart(DMAMODE_WRITE, p, cc, sc->sc_drq);
isa_dmastart(sc->sc_isa, sc->sc_drq, p, cc, NULL,
DMAMODE_WRITE, BUS_DMA_NOWAIT);
if (sc->precision == 16)
cc >>= 1;
@ -1568,7 +1589,7 @@ ad1848_intr(arg)
/* ACK DMA read because it may be in a bounce buffer */
/* XXX Do write to mask DMA ? */
if (sc->sc_dma_flags & DMAMODE_READ)
isa_dmadone(sc->sc_dma_flags, sc->sc_dma_bp, sc->sc_dma_cnt - 1, sc->sc_recdrq);
isa_dmadone(sc->sc_isa, sc->sc_recdrq);
(*sc->sc_intr)(sc->sc_arg);
retval = 1;
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: ad1848var.h,v 1.14 1997/05/09 22:16:35 augustss Exp $ */
/* $NetBSD: ad1848var.h,v 1.15 1997/06/06 23:43:46 thorpej Exp $ */
/*
* Copyright (c) 1994 John Brezak
@ -50,7 +50,8 @@ struct ad1848_softc {
bus_space_handle_t sc_ioh; /* handle */
void *parent;
struct device *sc_isa; /* ISA bus's device */
u_short sc_locked; /* true when doing HS DMA */
u_int sc_lastcc; /* size of last DMA xfer */
int sc_mode; /* half-duplex record/play */

View File

@ -1,4 +1,4 @@
/* $NetBSD: aha_isa.c,v 1.3 1997/03/28 23:47:12 mycroft Exp $ */
/* $NetBSD: aha_isa.c,v 1.4 1997/06/06 23:43:47 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved.
@ -48,7 +48,11 @@
#define AHA_ISA_IOSIZE 4
#ifdef __BROKEN_INDIRECT_CONFIG
int aha_isa_probe __P((struct device *, void *, void *));
#else
int aha_isa_probe __P((struct device *, struct cfdata *, void *));
#endif
void aha_isa_attach __P((struct device *, struct device *, void *));
struct cfattach aha_isa_ca = {
@ -63,7 +67,12 @@ struct cfattach aha_isa_ca = {
int
aha_isa_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
#ifdef __BROKEN_INDIRECT_CONFIG
void *match;
#else
struct cfdata *match;
#endif
void *aux;
{
struct isa_attach_args *ia = aux;
bus_space_tag_t iot = ia->ia_iot;
@ -113,11 +122,12 @@ aha_isa_attach(parent, self, aux)
sc->sc_iot = iot;
sc->sc_ioh = ioh;
sc->sc_dmat = ia->ia_dmat;
if (!aha_find(iot, ioh, &apd))
panic("aha_isa_attach: aha_find failed");
if (apd.sc_drq != -1)
isa_dmacascade(apd.sc_drq);
isa_dmacascade(parent, apd.sc_drq);
sc->sc_ih = isa_intr_establish(ic, apd.sc_irq, IST_EDGE, IPL_BIO,
aha_intr, sc);

View File

@ -1,4 +1,4 @@
/* $NetBSD: bha_isa.c,v 1.6 1997/03/28 23:47:13 mycroft Exp $ */
/* $NetBSD: bha_isa.c,v 1.7 1997/06/06 23:43:48 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved.
@ -48,7 +48,11 @@
#define BHA_ISA_IOSIZE 4
#ifdef __BROKEN_INDIRECT_CONFIG
int bha_isa_probe __P((struct device *, void *, void *));
#else
int bha_isa_probe __P((struct device *, struct cfdata *, void *));
#endif
void bha_isa_attach __P((struct device *, struct device *, void *));
struct cfattach bha_isa_ca = {
@ -63,7 +67,12 @@ struct cfattach bha_isa_ca = {
int
bha_isa_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
#ifdef __BROKEN_INDIRECT_CONFIG
void *match;
#else
struct cfdata *match;
#endif
void *aux;
{
struct isa_attach_args *ia = aux;
bus_space_tag_t iot = ia->ia_iot;
@ -113,11 +122,27 @@ bha_isa_attach(parent, self, aux)
sc->sc_iot = iot;
sc->sc_ioh = ioh;
sc->sc_dmat = ia->ia_dmat;
if (!bha_find(iot, ioh, &bpd))
panic("bha_isa_attach: bha_find failed");
sc->sc_dmaflags = 0;
if (bpd.sc_drq != -1)
isa_dmacascade(bpd.sc_drq);
isa_dmacascade(parent, bpd.sc_drq);
else {
/*
* We have a VLB controller. If we're at least both
* hardware revision E and firmware revision 3.37,
* we can do 32-bit DMA (earlier revisions are buggy
* in this regard).
*/
bha_inquire_setup_information(sc);
if (strcmp(sc->sc_firmware, "3.37") < 0)
printf("%s: buggy VLB controller, disabling 32-bit DMA\n",
sc->sc_dev.dv_xname);
else
sc->sc_dmaflags = ISABUS_DMA_32BIT;
}
sc->sc_ih = isa_intr_establish(ic, bpd.sc_irq, IST_EDGE, IPL_BIO,
bha_intr, sc);

View File

@ -1,4 +1,4 @@
/* $NetBSD: esp_isa.c,v 1.2 1997/05/18 06:08:02 thorpej Exp $ */
/* $NetBSD: esp_isa.c,v 1.3 1997/06/06 23:43:48 thorpej Exp $ */
/*
* Copyright (c) 1997 Jason R. Thorpe.
@ -430,7 +430,7 @@ esp_isa_attach(parent, self, aux)
panic("espattach: esp_find failed");
if (ia->ia_drq != DRQUNK)
isa_dmacascade(ia->ia_drq);
isa_dmacascade(parent, ia->ia_drq);
esc->sc_ih = isa_intr_establish(ic, ia->ia_irq, IST_EDGE, IPL_BIO,
(int (*)(void *))ncr53c9x_intr, esc);

View File

@ -1,4 +1,4 @@
/* $NetBSD: gus.c,v 1.29 1997/05/29 05:33:15 jtk Exp $ */
/* $NetBSD: gus.c,v 1.30 1997/06/06 23:43:50 thorpej Exp $ */
/*-
* Copyright (c) 1996 The NetBSD Foundation, Inc.
@ -111,6 +111,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <machine/cpufunc.h>
#include <sys/audioio.h>
@ -841,6 +842,8 @@ gusattach(parent, self, aux)
sc->sc_mixcontrol =
(m | GUSMASK_LATCHES) & ~(GUSMASK_LINE_OUT|GUSMASK_LINE_IN);
/* XXX WILL THIS ALWAYS WORK THE WAY THEY'RE OVERLAYED?! */
sc->sc_codec.sc_isa = sc->sc_dev.dv_parent;
if (sc->sc_revision >= 5 && sc->sc_revision <= 9) {
sc->sc_flags |= GUS_MIXER_INSTALLED;
@ -1320,7 +1323,8 @@ gus_dmaout_timeout(arg)
outb(sc->sc_iobase+GUS_DATA_HIGH, 0);
#if 0
isa_dmaabort(sc->sc_drq); /* XXX we will dmadone below? */
/* XXX we will dmadone below? */
isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_drq);
#endif
gus_dmaout_dointr(sc);
@ -1360,10 +1364,7 @@ gus_dmaout_dointr(sc)
register int port = sc->sc_iobase;
/* sc->sc_dmaoutcnt - 1 because DMA controller counts from zero?. */
isa_dmadone(DMAMODE_WRITE,
sc->sc_dmaoutaddr,
sc->sc_dmaoutcnt - 1,
sc->sc_drq);
isa_dmadone(sc->sc_dev.dv_parent, sc->sc_drq);
sc->sc_flags &= ~GUS_DMAOUT_ACTIVE; /* pending DMA is done */
DMAPRINTF(("gus_dmaout_dointr %d @ %x\n", sc->sc_dmaoutcnt,
sc->sc_dmaoutaddr));
@ -1878,7 +1879,8 @@ gusdmaout(sc, flags, gusaddr, buffaddr, length)
sc->sc_dmaoutaddr = (u_char *) buffaddr;
sc->sc_dmaoutcnt = length;
isa_dmastart(DMAMODE_WRITE, buffaddr, length, sc->sc_drq);
isa_dmastart(sc->sc_dev.dv_parent, sc->sc_drq, buffaddr, length,
NULL, DMAMODE_WRITE, BUS_DMA_NOWAIT);
/*
* Set up DMA address - use the upper 16 bits ONLY
@ -3011,7 +3013,8 @@ gus_dma_input(addr, buf, size, callback, arg)
dmac |= GUSMASK_SAMPLE_INVBIT;
if (sc->sc_channels == 2)
dmac |= GUSMASK_SAMPLE_STEREO;
isa_dmastart(DMAMODE_READ, (caddr_t) buf, size, sc->sc_recdrq);
isa_dmastart(sc->sc_dev.dv_parent, sc->sc_recdrq, buf, size,
NULL, DMAMODE_READ, BUS_DMA_NOWAIT);
DMAPRINTF(("gus_dma_input isa_dmastarted\n"));
sc->sc_flags |= GUS_DMAIN_ACTIVE;
@ -3038,8 +3041,7 @@ gus_dmain_intr(sc)
DMAPRINTF(("gus_dmain_intr called\n"));
if (sc->sc_dmainintr) {
isa_dmadone(DMAMODE_READ, sc->sc_dmainaddr, sc->sc_dmaincnt - 1,
sc->sc_recdrq);
isa_dmadone(sc->sc_dev.dv_parent, sc->sc_recdrq);
callback = sc->sc_dmainintr;
arg = sc->sc_inarg;
@ -3110,7 +3112,7 @@ gus_halt_out_dma(addr)
outb(sc->sc_iobase+GUS_DATA_HIGH, 0);
untimeout(gus_dmaout_timeout, sc);
isa_dmaabort(sc->sc_drq);
isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_drq);
sc->sc_flags &= ~(GUS_DMAOUT_ACTIVE|GUS_LOCKED);
sc->sc_dmaoutintr = 0;
sc->sc_outarg = 0;
@ -3145,7 +3147,7 @@ gus_halt_in_dma(addr)
outb(port+GUS_DATA_HIGH,
inb(port+GUS_DATA_HIGH) & ~(GUSMASK_SAMPLE_START|GUSMASK_SAMPLE_IRQ));
isa_dmaabort(sc->sc_recdrq);
isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_recdrq);
sc->sc_flags &= ~GUS_DMAIN_ACTIVE;
sc->sc_dmainintr = 0;
sc->sc_inarg = 0;

View File

@ -1,4 +1,41 @@
/* $NetBSD: if_le_isa.c,v 1.10 1997/03/17 03:19:09 thorpej Exp $ */
/* $NetBSD: if_le_isa.c,v 1.11 1997/06/06 23:43:52 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1995 Charles M. Hannum. All rights reserved.
@ -96,6 +133,8 @@ void depca_copytobuf __P((struct am7990_softc *, void *, int, int));
void depca_copyfrombuf __P((struct am7990_softc *, void *, int, int));
void depca_zerobuf __P((struct am7990_softc *, int, int));
#define LE_ISA_MEMSIZE 16384
hide void
le_isa_wrcsr(sc, port, val)
struct am7990_softc *sc;
@ -374,12 +413,16 @@ le_isa_attach(parent, self, aux)
struct isa_attach_args *ia = aux;
bus_space_tag_t iot = ia->ia_iot;
bus_space_tag_t memt = ia->ia_memt;
bus_dma_tag_t dmat = ia->ia_dmat;
bus_space_handle_t memh;
bus_dma_segment_t seg;
int rseg;
printf(": %s Ethernet\n", card_type[lesc->sc_card]);
lesc->sc_iot = iot;
lesc->sc_memt = memt;
lesc->sc_dmat = dmat;
/* XXX SHOULD RE-MAP I/O SPACE HERE. */
@ -396,12 +439,8 @@ le_isa_attach(parent, self, aux)
val = 0xff;
for (;;) {
#if 0 /* XXX !! */
bus_space_set_region_1(memt, memh, 0, val);
#else
for (i = 0; i < ia->ia_msize; i++)
bus_space_write_1(memt, memh, i, val);
#endif
bus_space_set_region_1(memt, memh, 0, val,
ia->ia_msize);
for (i = 0; i < ia->ia_msize; i++)
if (bus_space_read_1(memt, memh, 1) != val) {
printf("%s: failed to clear memory\n",
@ -418,16 +457,44 @@ le_isa_attach(parent, self, aux)
sc->sc_addr = 0;
sc->sc_memsize = ia->ia_msize;
} else {
sc->sc_mem = malloc(16384, M_DEVBUF, M_NOWAIT);
if (sc->sc_mem == 0) {
/*
* Allocate a DMA area for the card.
*/
if (bus_dmamem_alloc(dmat, LE_ISA_MEMSIZE, NBPG, 0, &seg, 1,
&rseg, BUS_DMA_NOWAIT)) {
printf("%s: couldn't allocate memory for card\n",
sc->sc_dev.dv_xname);
return;
}
if (bus_dmamem_map(dmat, &seg, rseg, LE_ISA_MEMSIZE,
(caddr_t *)&sc->sc_mem,
BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC)) {
printf("%s: couldn't map memory for card\n",
sc->sc_dev.dv_xname);
return;
}
/*
* Create and load the DMA map for the DMA area.
*/
if (bus_dmamap_create(dmat, LE_ISA_MEMSIZE, 1,
LE_ISA_MEMSIZE, 0, BUS_DMA_NOWAIT, &lesc->sc_dmam)) {
printf("%s: couldn't create DMA map\n",
sc->sc_dev.dv_xname);
bus_dmamem_free(dmat, &seg, rseg);
return;
}
if (bus_dmamap_load(dmat, lesc->sc_dmam,
sc->sc_mem, LE_ISA_MEMSIZE, NULL, BUS_DMA_NOWAIT)) {
printf("%s: coundn't load DMA map\n",
sc->sc_dev.dv_xname);
bus_dmamem_free(dmat, &seg, rseg);
return;
}
sc->sc_conf3 = 0;
sc->sc_addr = kvtop(sc->sc_mem); /* XXX !! */
sc->sc_memsize = 16384;
sc->sc_addr = lesc->sc_dmam->dm_segs[0].ds_addr;
sc->sc_memsize = LE_ISA_MEMSIZE;
}
if (lesc->sc_card == DEPCA) {
@ -452,7 +519,7 @@ le_isa_attach(parent, self, aux)
am7990_config(sc);
if (ia->ia_drq != DRQUNK)
isa_dmacascade(ia->ia_drq);
isa_dmacascade(parent, ia->ia_drq);
lesc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
IPL_NET, le_isa_intredge, sc);

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_levar.h,v 1.8 1997/03/15 18:11:49 is Exp $ */
/* $NetBSD: if_levar.h,v 1.9 1997/06/06 23:43:53 thorpej Exp $ */
/*
* LANCE Ethernet driver header file
@ -51,6 +51,8 @@ struct le_softc {
bus_space_tag_t sc_memt;
bus_space_handle_t sc_ioh;
bus_space_handle_t sc_memh;
bus_dma_tag_t sc_dmat; /* DMA glue for non-DEPCA */
bus_dmamap_t sc_dmam;
int sc_card;
int sc_rap, sc_rdp; /* offsets to LANCE registers */
};

View File

@ -1,4 +1,4 @@
/* $NetBSD: isa.c,v 1.94 1997/01/26 03:49:28 cgd Exp $ */
/* $NetBSD: isa.c,v 1.95 1997/06/06 23:43:54 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994 Charles Hannum. All rights reserved.
@ -40,6 +40,7 @@
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#include <dev/isa/isadmareg.h>
#ifdef __BROKEN_INDIRECT_CONFIG
int isamatch __P((struct device *, void *, void *));
@ -107,13 +108,25 @@ isaattach(parent, self, aux)
sc->sc_iot = iba->iba_iot;
sc->sc_memt = iba->iba_memt;
sc->sc_dmat = iba->iba_dmat;
sc->sc_ic = iba->iba_ic;
/*
* Map the registers used by the ISA DMA controller.
*/
if (bus_space_map(sc->sc_iot, IO_DMA1, DMA1_IOSIZE, 0, &sc->sc_dma1h))
panic("isaattach: can't map DMA controller #1");
if (bus_space_map(sc->sc_iot, IO_DMA2, DMA2_IOSIZE, 0, &sc->sc_dma2h))
panic("isaattach: can't map DMA controller #2");
if (bus_space_map(sc->sc_iot, IO_DMAPG, 0xf, 0, &sc->sc_dmapgh))
panic("isaattach: can't map DMA page registers");
/*
* Map port 0x84, which causes a 1.25us delay when read.
* We do this now, since several drivers need it.
*/
if (bus_space_map(sc->sc_iot, 0x84, 1, 0, &sc->sc_delaybah))
if (bus_space_subregion(sc->sc_iot, sc->sc_dmapgh, 0x04, 1,
&sc->sc_delaybah))
panic("isaattach: can't map `delay port'"); /* XXX */
TAILQ_INIT(&sc->sc_subdevs);
@ -164,6 +177,7 @@ isascan(parent, match)
ia.ia_iot = sc->sc_iot;
ia.ia_memt = sc->sc_memt;
ia.ia_dmat = sc->sc_dmat;
ia.ia_ic = sc->sc_ic;
ia.ia_iobase = cf->cf_loc[0];
ia.ia_iosize = 0x666;
@ -192,6 +206,7 @@ isasearch(parent, cf, aux)
do {
ia.ia_iot = sc->sc_iot;
ia.ia_memt = sc->sc_memt;
ia.ia_dmat = sc->sc_dmat;
ia.ia_ic = sc->sc_ic;
ia.ia_iobase = cf->cf_loc[0];
ia.ia_iosize = 0x666;

View File

@ -1,34 +1,67 @@
/* $NetBSD: isadma.c,v 1.25 1997/05/29 21:46:07 mycroft Exp $ */
/* $NetBSD: isadma.c,v 1.26 1997/06/06 23:43:55 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Device driver for the ISA on-board DMA controller.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/file.h>
#include <sys/buf.h>
#include <sys/syslog.h>
#include <sys/malloc.h>
#include <sys/proc.h>
#include <sys/uio.h>
#include <sys/device.h>
#include <vm/vm.h>
#include <machine/pio.h>
#include <machine/bus.h>
#include <dev/isa/isareg.h>
#include <dev/isa/isavar.h>
#include <dev/isa/isadmavar.h>
#include <dev/isa/isadmareg.h>
/* region of physical memory known to be contiguous */
vm_offset_t isaphysmem;
static caddr_t dma_bounce[8]; /* XXX */
static char dma_bounced[8]; /* XXX */
#define MAXDMASZ 512 /* XXX */
static u_int8_t dma_finished;
static vm_size_t dma_length[8];
/* high byte of address is stored in this port for i-th dma channel */
/*
* High byte of DMA address is stored in this DMAPG register for
* the Nth DMA channel.
*/
static int dmapageport[2][4] = {
{0x87, 0x83, 0x81, 0x82},
{0x8f, 0x8b, 0x89, 0x8a}
{0x7, 0x3, 0x1, 0x2},
{0xf, 0xb, 0x9, 0xa}
};
static u_int8_t dmamode[4] = {
@ -38,46 +71,43 @@ static u_int8_t dmamode[4] = {
DMA37MD_WRITE | DMA37MD_SINGLE | DMA37MD_LOOP
};
int isa_dmarangecheck __P((vm_offset_t, u_long, int));
caddr_t isa_allocphysmem __P((caddr_t, unsigned, void (*)(void)));
void isa_freephysmem __P((caddr_t, unsigned));
static inline void isa_dmaunmask __P((struct isa_softc *, int));
static inline void isa_dmamask __P((struct isa_softc *, int));
inline void
isa_dmaunmask(chan)
static inline void
isa_dmaunmask(sc, chan)
struct isa_softc *sc;
int chan;
{
int ochan = chan & 3;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmacascade: impossible request");
#endif
/* set dma channel mode, and set dma channel mode */
if ((chan & 4) == 0)
outb(DMA1_SMSK, ochan | DMA37SM_CLEAR);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
DMA1_SMSK, ochan | DMA37SM_CLEAR);
else
outb(DMA2_SMSK, ochan | DMA37SM_CLEAR);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
DMA2_SMSK, ochan | DMA37SM_CLEAR);
}
inline void
isa_dmamask(chan)
static inline void
isa_dmamask(sc, chan)
struct isa_softc *sc;
int chan;
{
int ochan = chan & 3;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmacascade: impossible request");
#endif
/* set dma channel mode, and set dma channel mode */
if ((chan & 4) == 0) {
outb(DMA1_SMSK, ochan | DMA37SM_SET);
outb(DMA1_FFC, 0);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
DMA1_SMSK, ochan | DMA37SM_SET);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
DMA1_FFC, 0);
} else {
outb(DMA2_SMSK, ochan | DMA37SM_SET);
outb(DMA2_FFC, 0);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
DMA2_SMSK, ochan | DMA37SM_SET);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
DMA2_FFC, 0);
}
}
@ -86,132 +116,264 @@ isa_dmamask(chan)
* external dma control by a board.
*/
void
isa_dmacascade(chan)
isa_dmacascade(isadev, chan)
struct device *isadev;
int chan;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
int ochan = chan & 3;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmacascade: impossible request");
#endif
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
goto lose;
}
if (ISA_DRQ_ISFREE(sc, chan) == 0) {
printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan);
goto lose;
}
ISA_DRQ_ALLOC(sc, chan);
/* set dma channel mode, and set dma channel mode */
if ((chan & 4) == 0)
outb(DMA1_MODE, ochan | DMA37MD_CASCADE);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
DMA1_MODE, ochan | DMA37MD_CASCADE);
else
outb(DMA2_MODE, ochan | DMA37MD_CASCADE);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
DMA2_MODE, ochan | DMA37MD_CASCADE);
isa_dmaunmask(chan);
isa_dmaunmask(sc, chan);
return;
lose:
panic("isa_dmacascade");
}
int
isa_dmamap_create(isadev, chan, size, flags)
struct device *isadev;
int chan;
bus_size_t size;
int flags;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_size_t maxsize;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
goto lose;
}
if (chan & 4)
maxsize = (1 << 17);
else
maxsize = (1 << 16);
if (size > maxsize)
return (EINVAL);
if (ISA_DRQ_ISFREE(sc, chan) == 0) {
printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan);
goto lose;
}
ISA_DRQ_ALLOC(sc, chan);
return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize,
flags, &sc->sc_dmamaps[chan]));
lose:
panic("isa_dmamap_create");
}
void
isa_dmamap_destroy(isadev, chan)
struct device *isadev;
int chan;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
goto lose;
}
if (ISA_DRQ_ISFREE(sc, chan)) {
printf("%s: drq %d is already free\n",
sc->sc_dev.dv_xname, chan);
goto lose;
}
ISA_DRQ_FREE(sc, chan);
bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]);
return;
lose:
panic("isa_dmamap_destroy");
}
/*
* isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
* problems by using a bounce buffer.
* isa_dmastart(): program 8237 DMA controller channel and set it
* in motion.
*/
void
isa_dmastart(flags, addr, nbytes, chan)
int flags;
caddr_t addr;
vm_size_t nbytes;
int
isa_dmastart(isadev, chan, addr, nbytes, p, flags, busdmaflags)
struct device *isadev;
int chan;
void *addr;
bus_size_t nbytes;
struct proc *p;
int flags;
int busdmaflags;
{
vm_offset_t phys;
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_dmamap_t dmam;
bus_addr_t dmaaddr;
int waport;
caddr_t newaddr;
int ochan = chan & 3;
int error;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7 ||
((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
(nbytes >= (1<<16))))
panic("isa_dmastart: impossible request");
#endif
if (isa_dmarangecheck((vm_offset_t) addr, nbytes, chan)) {
if (dma_bounce[chan] == 0)
dma_bounce[chan] =
/*(caddr_t)malloc(MAXDMASZ, M_TEMP, M_WAITOK);*/
(caddr_t) isaphysmem + NBPG*chan;
dma_bounced[chan] = 1;
newaddr = dma_bounce[chan];
*(int *) newaddr = 0; /* XXX */
/* copy bounce buffer on write */
if ((flags & DMAMODE_READ) == 0)
bcopy(addr, newaddr, nbytes);
addr = newaddr;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
goto lose;
}
dma_length[chan] = nbytes;
#ifdef ISADMA_DEBUG
printf("isa_dmastart: drq %d, addr %p, nbytes 0x%lx, p %p, "
"flags 0x%x, dmaflags 0x%x\n",
chan, addr, nbytes, p, flags, busdmaflags);
#endif
/* translate to physical */
phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
if (chan & 4) {
if (nbytes > (1 << 17) || nbytes & 1 || (u_long)addr & 1) {
printf("%s: drq %d, nbytes 0x%lx, addr %p\n",
sc->sc_dev.dv_xname, chan, nbytes, addr);
goto lose;
}
} else {
if (nbytes > (1 << 16)) {
printf("%s: drq %d, nbytes 0x%lx\n",
sc->sc_dev.dv_xname, chan, nbytes);
goto lose;
}
}
isa_dmamask(chan);
dma_finished &= ~(1 << chan);
dmam = sc->sc_dmamaps[chan];
error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes,
p, busdmaflags);
if (error)
return (error);
#ifdef ISADMA_DEBUG
__asm(".globl isa_dmastart_afterload ; isa_dmastart_afterload:");
#endif
if (flags & DMAMODE_READ) {
bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREREAD);
sc->sc_dmareads |= (1 << chan);
} else {
bus_dmamap_sync(sc->sc_dmat, dmam, BUS_DMASYNC_PREWRITE);
sc->sc_dmareads &= ~(1 << chan);
}
dmaaddr = dmam->dm_segs[0].ds_addr;
#ifdef ISADMA_DEBUG
printf(" dmaaddr 0x%lx\n", dmaaddr);
__asm(".globl isa_dmastart_aftersync ; isa_dmastart_aftersync:");
#endif
sc->sc_dmalength[chan] = nbytes;
isa_dmamask(sc, chan);
sc->sc_dmafinished &= ~(1 << chan);
if ((chan & 4) == 0) {
/* set dma channel mode */
outb(DMA1_MODE, ochan | dmamode[flags]);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE,
ochan | dmamode[flags]);
/* send start address */
waport = DMA1_CHN(ochan);
outb(dmapageport[0][ochan], phys>>16);
outb(waport, phys);
outb(waport, phys>>8);
bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
dmapageport[0][ochan], (dmaaddr >> 16) & 0xff);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
dmaaddr & 0xff);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
(dmaaddr >> 8) & 0xff);
/* send count */
outb(waport + 1, --nbytes);
outb(waport + 1, nbytes>>8);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
(--nbytes) & 0xff);
bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
(nbytes >> 8) & 0xff);
} else {
/* set dma channel mode */
outb(DMA2_MODE, ochan | dmamode[flags]);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE,
ochan | dmamode[flags]);
/* send start address */
waport = DMA2_CHN(ochan);
outb(dmapageport[1][ochan], phys>>16);
phys >>= 1;
outb(waport, phys);
outb(waport, phys>>8);
bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
dmapageport[1][ochan], (dmaaddr >> 16) & 0xff);
dmaaddr >>= 1;
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
dmaaddr & 0xff);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
(dmaaddr >> 8) & 0xff);
/* send count */
nbytes >>= 1;
outb(waport + 2, --nbytes);
outb(waport + 2, nbytes>>8);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
(--nbytes) & 0xff);
bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
(nbytes >> 8) & 0xff);
}
isa_dmaunmask(chan);
isa_dmaunmask(sc, chan);
return (0);
lose:
panic("isa_dmastart");
}
void
isa_dmaabort(chan)
isa_dmaabort(isadev, chan)
struct device *isadev;
int chan;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmaabort: impossible request");
#endif
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmaabort");
}
isa_dmamask(chan);
dma_bounced[chan] = 0;
isa_dmamask(sc, chan);
bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]);
sc->sc_dmareads &= ~(1 << chan);
}
vm_size_t
isa_dmacount(chan)
bus_size_t
isa_dmacount(isadev, chan)
struct device *isadev;
int chan;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
int waport;
vm_size_t nbytes;
bus_size_t nbytes;
int ochan = chan & 3;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmacount: impossible request");
#endif
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmacount");
}
isa_dmamask(chan);
isa_dmamask(sc, chan);
/*
* We have to shift the byte count by 1. If we're in auto-initialize
@ -223,147 +385,189 @@ isa_dmacount(chan)
*/
if ((chan & 4) == 0) {
waport = DMA1_CHN(ochan);
nbytes = inb(waport + 1) + 1;
nbytes += inb(waport + 1) << 8;
nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
waport + 1) + 1;
nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
waport + 1) << 8;
nbytes &= 0xffff;
} else {
waport = DMA2_CHN(ochan);
nbytes = inb(waport + 2) + 1;
nbytes += inb(waport + 2) << 8;
nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
waport + 2) + 1;
nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
waport + 2) << 8;
nbytes <<= 1;
nbytes &= 0x1ffff;
}
if (nbytes == dma_length[chan])
if (nbytes == sc->sc_dmalength[chan])
nbytes = 0;
isa_dmaunmask(chan);
isa_dmaunmask(sc, chan);
return (nbytes);
}
int
isa_dmafinished(chan)
isa_dmafinished(isadev, chan)
struct device *isadev;
int chan;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmafinished: impossible request");
#endif
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmafinished");
}
/* check that the terminal count was reached */
if ((chan & 4) == 0)
dma_finished |= inb(DMA1_SR) & 0x0f;
sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot,
sc->sc_dma1h, DMA1_SR) & 0x0f;
else
dma_finished |= (inb(DMA2_SR) & 0x0f) << 4;
sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot,
sc->sc_dma2h, DMA2_SR) & 0x0f) << 4;
return ((dma_finished & (1 << chan)) != 0);
return ((sc->sc_dmafinished & (1 << chan)) != 0);
}
void
isa_dmadone(flags, addr, nbytes, chan)
int flags;
caddr_t addr;
vm_size_t nbytes;
isa_dmadone(isadev, chan)
struct device *isadev;
int chan;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_dmamap_t dmam;
#ifdef ISADMA_DEBUG
if (chan < 0 || chan > 7)
panic("isa_dmadone: impossible request");
#endif
isa_dmamask(chan);
if (!isa_dmafinished(chan))
printf("isa_dmadone: channel %d not finished\n", chan);
/* copy bounce buffer on read */
if (dma_bounced[chan]) {
bcopy(dma_bounce[chan], addr, nbytes);
dma_bounced[chan] = 0;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmadone");
}
dmam = sc->sc_dmamaps[chan];
isa_dmamask(sc, chan);
if (isa_dmafinished(isadev, chan) == 0)
printf("%s: isa_dmadone: channel %d not finished\n",
sc->sc_dev.dv_xname, chan);
bus_dmamap_sync(sc->sc_dmat, dmam,
(sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD :
BUS_DMASYNC_POSTWRITE);
bus_dmamap_unload(sc->sc_dmat, dmam);
sc->sc_dmareads &= ~(1 << chan);
}
/*
* Check for problems with the address range of a DMA transfer
* (non-contiguous physical pages, outside of bus address space,
* crossing DMA page boundaries).
* Return true if special handling needed.
*/
int
isa_dmarangecheck(va, length, chan)
vm_offset_t va;
u_long length;
isa_dmamem_alloc(isadev, chan, size, addrp, flags)
struct device *isadev;
int chan;
bus_size_t size;
bus_addr_t *addrp;
int flags;
{
vm_offset_t phys, priorpage = 0, endva;
u_int dma_pgmsk = (chan & 4) ? ~(128*1024-1) : ~(64*1024-1);
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_dma_segment_t seg;
int error, boundary, rsegs;
endva = round_page(va + length);
for (; va < endva ; va += NBPG) {
phys = trunc_page(pmap_extract(pmap_kernel(), va));
if (phys == 0)
panic("isa_dmacheck: no physical page present");
if (phys >= (1<<24))
return 1;
if (priorpage) {
if (priorpage + NBPG != phys)
return 1;
/* check if crossing a DMA page boundary */
if ((priorpage ^ phys) & dma_pgmsk)
return 1;
}
priorpage = phys;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmamem_alloc");
}
return 0;
boundary = (chan & 4) ? (1 << 17) : (1 << 16);
size = round_page(size);
error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary,
&seg, 1, &rsegs, flags);
if (error)
return (error);
*addrp = seg.ds_addr;
return (0);
}
/* head of queue waiting for physmem to become available */
struct buf isa_physmemq;
/* blocked waiting for resource to become free for exclusive use */
static isaphysmemflag;
/* if waited for and call requested when free (B_CALL) */
static void (*isaphysmemunblock) __P((void)); /* needs to be a list */
/*
* Allocate contiguous physical memory for transfer, returning
* a *virtual* address to region. May block waiting for resource.
* (assumed to be called at splbio())
*/
caddr_t
isa_allocphysmem(ca, length, func)
caddr_t ca;
unsigned length;
void (*func) __P((void));
{
isaphysmemunblock = func;
while (isaphysmemflag & B_BUSY) {
isaphysmemflag |= B_WANTED;
sleep((caddr_t)&isaphysmemflag, PRIBIO);
}
isaphysmemflag |= B_BUSY;
return((caddr_t)isaphysmem);
}
/*
* Free contiguous physical memory used for transfer.
* (assumed to be called at splbio())
*/
void
isa_freephysmem(va, length)
caddr_t va;
unsigned length;
isa_dmamem_free(isadev, chan, addr, size)
struct device *isadev;
int chan;
bus_addr_t addr;
bus_size_t size;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_dma_segment_t seg;
isaphysmemflag &= ~B_BUSY;
if (isaphysmemflag & B_WANTED) {
isaphysmemflag &= B_WANTED;
wakeup((caddr_t)&isaphysmemflag);
if (isaphysmemunblock)
(*isaphysmemunblock)();
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmamem_free");
}
seg.ds_addr = addr;
seg.ds_len = size;
bus_dmamem_free(sc->sc_dmat, &seg, 1);
}
int
isa_dmamem_map(isadev, chan, addr, size, kvap, flags)
struct device *isadev;
int chan;
bus_addr_t addr;
bus_size_t size;
caddr_t *kvap;
int flags;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_dma_segment_t seg;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmamem_map");
}
seg.ds_addr = addr;
seg.ds_len = size;
return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags));
}
void
isa_dmamem_unmap(isadev, chan, kva, size)
struct device *isadev;
int chan;
caddr_t kva;
size_t size;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmamem_unmap");
}
bus_dmamem_unmap(sc->sc_dmat, kva, size);
}
int
isa_dmamem_mmap(isadev, chan, addr, size, off, prot, flags)
struct device *isadev;
int chan;
bus_addr_t addr;
bus_size_t size;
int off, prot, flags;
{
struct isa_softc *sc = (struct isa_softc *)isadev;
bus_dma_segment_t seg;
if (chan < 0 || chan > 7) {
printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
panic("isa_dmamem_mmap");
}
seg.ds_addr = addr;
seg.ds_len = size;
return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags));
}

View File

@ -1,21 +1,25 @@
/* $NetBSD: isadmareg.h,v 1.4 1995/06/28 04:31:48 cgd Exp $ */
/* $NetBSD: isadmareg.h,v 1.5 1997/06/06 23:43:56 thorpej Exp $ */
#include <dev/ic/i8237reg.h>
/*
* Register definitions for DMA controller 1 (channels 0..3):
*/
#define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
#define DMA1_SR (IO_DMA1 + 1*8) /* status register */
#define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
#define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
#define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
#define DMA1_CHN(c) (1*(2*(c))) /* addr reg for channel c */
#define DMA1_SR (1*8) /* status register */
#define DMA1_SMSK (1*10) /* single mask register */
#define DMA1_MODE (1*11) /* mode register */
#define DMA1_FFC (1*12) /* clear first/last FF */
#define DMA1_IOSIZE (1*12)
/*
* Register definitions for DMA controller 2 (channels 4..7):
*/
#define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
#define DMA2_SR (IO_DMA2 + 2*8) /* status register */
#define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
#define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
#define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
#define DMA2_CHN(c) (2*(2*(c))) /* addr reg for channel c */
#define DMA2_SR (2*8) /* status register */
#define DMA2_SMSK (2*10) /* single mask register */
#define DMA2_MODE (2*11) /* mode register */
#define DMA2_FFC (2*12) /* clear first/last FF */
#define DMA2_IOSIZE (2*12)

View File

@ -1,14 +1,65 @@
/* $NetBSD: isadmavar.h,v 1.6 1997/03/21 02:17:13 mycroft Exp $ */
/* $NetBSD: isadmavar.h,v 1.7 1997/06/06 23:43:56 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#define DMAMODE_WRITE 0
#define DMAMODE_READ 1
#define DMAMODE_LOOP 2
void isa_dmaunmask __P((int));
void isa_dmamask __P((int));
void isa_dmacascade __P((int));
void isa_dmastart __P((int, caddr_t, vm_size_t, int));
void isa_dmaabort __P((int));
vm_size_t isa_dmacount __P((int));
int isa_dmafinished __P((int));
void isa_dmadone __P((int, caddr_t, vm_size_t, int));
struct proc;
void isa_dmacascade __P((struct device *, int));
int isa_dmamap_create __P((struct device *, int, bus_size_t, int));
void isa_dmamap_destroy __P((struct device *, int));
int isa_dmastart __P((struct device *, int, void *, bus_size_t,
struct proc *, int, int));
void isa_dmaabort __P((struct device *, int));
bus_size_t isa_dmacount __P((struct device *, int));
int isa_dmafinished __P((struct device *, int));
void isa_dmadone __P((struct device *, int));
int isa_dmamem_alloc __P((struct device *, int, bus_size_t,
bus_addr_t *, int));
void isa_dmamem_free __P((struct device *, int, bus_addr_t, bus_size_t));
int isa_dmamem_map __P((struct device *, int, bus_addr_t, bus_size_t,
caddr_t *, int));
void isa_dmamem_unmap __P((struct device *, int, caddr_t, size_t));
int isa_dmamem_mmap __P((struct device *, int, bus_addr_t, bus_size_t,
int, int, int));

View File

@ -1,4 +1,41 @@
/* $NetBSD: isavar.h,v 1.25 1996/12/05 01:25:41 cgd Exp $ */
/* $NetBSD: isavar.h,v 1.26 1997/06/06 23:43:57 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1995 Chris G. Demetriou
@ -68,6 +105,7 @@ struct isabus_attach_args {
char *iba_busname; /* XXX should be common */
bus_space_tag_t iba_iot; /* isa i/o space tag */
bus_space_tag_t iba_memt; /* isa mem space tag */
bus_dma_tag_t iba_dmat; /* isa DMA tag */
isa_chipset_tag_t iba_ic;
};
@ -77,6 +115,7 @@ struct isabus_attach_args {
struct isa_attach_args {
bus_space_tag_t ia_iot; /* isa i/o space tag */
bus_space_tag_t ia_memt; /* isa mem space tag */
bus_dma_tag_t ia_dmat; /* DMA tag */
isa_chipset_tag_t ia_ic;
@ -115,9 +154,29 @@ struct isa_softc {
bus_space_tag_t sc_iot; /* isa io space tag */
bus_space_tag_t sc_memt; /* isa mem space tag */
bus_dma_tag_t sc_dmat; /* isa DMA tag */
isa_chipset_tag_t sc_ic;
/*
* Bitmap representing the DRQ channels available
* for ISA.
*/
int sc_drqmap;
bus_space_handle_t sc_dma1h; /* i/o handle for DMA controller #1 */
bus_space_handle_t sc_dma2h; /* i/o handle for DMA controller #2 */
bus_space_handle_t sc_dmapgh; /* i/o handle for DMA page registers */
/*
* DMA maps used for the 8 DMA channels.
*/
bus_dmamap_t sc_dmamaps[8];
vm_size_t sc_dmalength[8];
int sc_dmareads; /* state for isa_dmadone() */
int sc_dmafinished; /* DMA completion state */
/*
* This i/o handle is used to map port 0x84, which is
* read to provide a 1.25us delay. This access handle
@ -127,6 +186,15 @@ struct isa_softc {
bus_space_handle_t sc_delaybah;
};
#define ISA_DRQ_ISFREE(isadev, drq) \
((((struct isa_softc *)(isadev))->sc_drqmap & (1 << (drq))) == 0)
#define ISA_DRQ_ALLOC(isadev, drq) \
((struct isa_softc *)(isadev))->sc_drqmap |= (1 << (drq))
#define ISA_DRQ_FREE(isadev, drq) \
((struct isa_softc *)(isadev))->sc_drqmap &= ~(1 << (drq))
#define cf_iobase cf_loc[0]
#define cf_iosize cf_loc[1]
#define cf_maddr cf_loc[2]
@ -160,4 +228,10 @@ char *isa_intr_typename __P((int type));
void isa_establish __P((struct isadev *, struct device *));
#endif
/*
* Some ISA devices (e.g. on a VLB) can perform 32-bit DMA. This
* flag is passed to bus_dmamap_create() to indicate that fact.
*/
#define ISABUS_DMA_32BIT BUS_DMA_BUS1
#endif /* _DEV_ISA_ISAVAR_H_ */

View File

@ -1,4 +1,4 @@
/* $NetBSD: pas.c,v 1.26 1997/05/09 22:16:38 augustss Exp $ */
/* $NetBSD: pas.c,v 1.27 1997/06/06 23:43:58 thorpej Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
@ -49,6 +49,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <sys/audioio.h>
@ -420,6 +421,8 @@ pasattach(parent, self, aux)
sc->sc_sbdsp.sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq,
IST_EDGE, IPL_AUDIO, sbdsp_intr, &sc->sc_sbdsp);
sc->sc_sbdsp.sc_isa = parent;
printf(" ProAudio Spectrum %s [rev %d] ", pasnames[sc->model],
sc->rev);

View File

@ -1,4 +1,4 @@
/* $NetBSD: pss.c,v 1.27 1997/05/09 22:16:39 augustss Exp $ */
/* $NetBSD: pss.c,v 1.28 1997/06/06 23:43:59 thorpej Exp $ */
/*
* Copyright (c) 1994 John Brezak
@ -61,6 +61,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <sys/audioio.h>
@ -1083,6 +1084,8 @@ spattach(parent, self, aux)
sc->sc_ih = isa_intr_establish(ic, cf->cf_irq, IST_EDGE, IPL_AUDIO,
ad1848_intr, sc);
sc->sc_isa = parent->dv_parent;
ad1848_attach(sc);
printf("\n");

View File

@ -1,4 +1,4 @@
/* $NetBSD: sb.c,v 1.48 1997/05/23 21:20:06 augustss Exp $ */
/* $NetBSD: sb.c,v 1.49 1997/06/06 23:44:01 thorpej Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
@ -44,6 +44,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <sys/audioio.h>
@ -56,14 +57,6 @@
#include <dev/isa/sbvar.h>
#include <dev/isa/sbdspvar.h>
struct sb_softc {
struct device sc_dev; /* base device */
struct isadev sc_id; /* ISA device */
void *sc_ih; /* interrupt vectoring */
struct sbdsp_softc sc_sbdsp;
};
struct cfdriver sb_cd = {
NULL, "sb", DV_DULL
};
@ -145,7 +138,12 @@ sbmatch(sc)
return 0;
}
}
/*
* XXX THIS IS WRONG! My ViBRA16S PnP
* XXX has 1 drqs, but this resets it to use drq8 everywhere!
* XXX --thorpej@netbsd.org
*/
if (ISSB16CLASS(sc)) {
if (sc->sc_drq16 == -1)
sc->sc_drq16 = sc->sc_drq8;

View File

@ -1,4 +1,4 @@
/* $NetBSD: sb_isa.c,v 1.6 1997/05/23 21:20:09 augustss Exp $ */
/* $NetBSD: sb_isa.c,v 1.7 1997/06/06 23:44:01 thorpej Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
@ -42,6 +42,8 @@
#include <sys/device.h>
#include <sys/proc.h>
#include <machine/bus.h>
#include <sys/audioio.h>
#include <dev/audio_if.h>
#include <dev/mulaw.h>
@ -128,5 +130,9 @@ sb_isa_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
sbattach((struct sbdsp_softc *) self);
struct sbdsp_softc *sc = (struct sbdsp_softc *)self;
sc->sc_isa = parent;
sbattach(sc);
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: sbdsp.c,v 1.56 1997/05/29 04:57:02 jtk Exp $ */
/* $NetBSD: sbdsp.c,v 1.57 1997/06/06 23:44:02 thorpej Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
@ -56,7 +56,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/pio.h>
#include <machine/bus.h>
#include <sys/audioio.h>
#include <dev/audio_if.h>
@ -317,6 +317,26 @@ sbdsp_attach(sc)
int i;
u_int v;
/*
* Create our DMA maps.
*/
if (sc->sc_drq8 != -1) {
if (isa_dmamap_create(sc->sc_isa, sc->sc_drq8,
MAXPHYS /* XXX */, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("%s: can't create map for drq %d\n",
sc->sc_dev.dv_xname, sc->sc_drq8);
return;
}
}
if (sc->sc_drq16 != -1 && sc->sc_drq16 != sc->sc_drq8) {
if (isa_dmamap_create(sc->sc_isa, sc->sc_drq16,
MAXPHYS /* XXX */, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("%s: can't create map for drq %d\n",
sc->sc_dev.dv_xname, sc->sc_drq16);
return;
}
}
sbdsp_set_params(sc, AUMODE_RECORD, &audio_default, &xparams);
sbdsp_set_params(sc, AUMODE_PLAY, &audio_default, &xparams);
@ -860,7 +880,7 @@ sbdsp_reset(sc)
sc->sc_intr = 0;
if (sc->sc_dmadir != SB_DMA_NONE) {
isa_dmaabort(sc->dmachan);
isa_dmaabort(sc->sc_isa, sc->dmachan);
sc->sc_dmadir = SB_DMA_NONE;
}
@ -1170,7 +1190,8 @@ sbdsp_dma_input(addr, p, cc, intr, arg)
Dprintf("sbdsp_dma_input: dmastart %x %p %d %d\n",
sc->dmaflags, sc->dmaaddr, sc->dmacnt, sc->dmachan);
#endif
isa_dmastart(sc->dmaflags, sc->dmaaddr, sc->dmacnt, sc->dmachan);
isa_dmastart(sc->sc_isa, sc->dmachan, sc->dmaaddr,
sc->dmacnt, NULL, sc->dmaflags, BUS_DMA_NOWAIT);
sc->sc_intr = intr;
sc->sc_arg = arg;
@ -1283,7 +1304,8 @@ sbdsp_dma_output(addr, p, cc, intr, arg)
Dprintf("sbdsp_dma_output: dmastart %x %p %d %d\n",
sc->dmaflags, sc->dmaaddr, sc->dmacnt, sc->dmachan);
#endif
isa_dmastart(sc->dmaflags, sc->dmaaddr, sc->dmacnt, sc->dmachan);
isa_dmastart(sc->sc_isa, sc->dmachan, sc->dmaaddr,
sc->dmacnt, NULL, sc->dmaflags, BUS_DMA_NOWAIT);
sc->sc_intr = intr;
sc->sc_arg = arg;
@ -1357,7 +1379,7 @@ sbdsp_intr(arg)
if ((irq & (SBP_IRQ_DMA8 | SBP_IRQ_DMA16)) == 0)
return 0;
} else {
if (!loop && !isa_dmafinished(sc->dmachan))
if (!loop && !isa_dmafinished(sc->sc_isa, sc->dmachan))
return 0;
irq = SBP_IRQ_DMA8;
}
@ -1376,8 +1398,7 @@ sbdsp_intr(arg)
if (irq & SBP_IRQ_DMA16)
bus_space_read_1(sc->sc_iot, sc->sc_ioh, SBP_DSP_IRQACK16);
if (!loop)
isa_dmadone(sc->dmaflags, sc->dmaaddr, sc->dmacnt,
sc->dmachan);
isa_dmadone(sc->sc_isa, sc->dmachan);
(*sc->sc_intr)(sc->sc_arg);
} else {
return 0;

View File

@ -1,4 +1,4 @@
/* $NetBSD: sbdspvar.h,v 1.22 1997/05/23 21:20:15 augustss Exp $ */
/* $NetBSD: sbdspvar.h,v 1.23 1997/06/06 23:44:04 thorpej Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
@ -83,6 +83,8 @@ struct sbdsp_softc {
int sc_drq8; /* DMA (8-bit) */
int sc_drq16; /* DMA (16-bit) */
struct device *sc_isa; /* pointer to ISA parent */
u_short sc_open; /* reference count of open calls */
u_char gain[SB_NDEVS][2]; /* kept in input levels */

View File

@ -1,4 +1,4 @@
/* $NetBSD: uha_isa.c,v 1.7 1997/03/29 02:32:33 mycroft Exp $ */
/* $NetBSD: uha_isa.c,v 1.8 1997/06/06 23:44:05 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996, 1997 Charles M. Hannum. All rights reserved.
@ -51,7 +51,11 @@
#define UHA_ISA_IOSIZE 16
#ifdef __BROKEN_INDIRECT_CONFIG
int uha_isa_probe __P((struct device *, void *, void *));
#else
int uha_isa_probe __P((struct device *, struct cfdata *, void *));
#endif
void uha_isa_attach __P((struct device *, struct device *, void *));
struct cfattach uha_isa_ca = {
@ -61,7 +65,6 @@ struct cfattach uha_isa_ca = {
#ifndef DDB
#define Debugger() panic("should call debugger here (uha_isa.c)")
#endif /* ! DDB */
#define KVTOPHYS(x) vtophys(x)
int u14_find __P((bus_space_tag_t, bus_space_handle_t,
struct uha_probe_data *));
@ -78,7 +81,12 @@ void u14_init __P((struct uha_softc *));
int
uha_isa_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
#ifdef __BROKEN_INDIRECT_CONFIG
void *match;
#else
struct cfdata *match;
#endif
void *aux;
{
struct isa_attach_args *ia = aux;
bus_space_tag_t iot = ia->ia_iot;
@ -117,6 +125,7 @@ uha_isa_attach(parent, self, aux)
struct isa_attach_args *ia = aux;
struct uha_softc *sc = (void *)self;
bus_space_tag_t iot = ia->ia_iot;
bus_dma_tag_t dmat = ia->ia_dmat;
bus_space_handle_t ioh;
struct uha_probe_data upd;
isa_chipset_tag_t ic = ia->ia_ic;
@ -128,11 +137,19 @@ uha_isa_attach(parent, self, aux)
sc->sc_iot = iot;
sc->sc_ioh = ioh;
sc->sc_dmat = dmat;
if (!u14_find(iot, ioh, &upd))
panic("uha_isa_attach: u14_find failed!");
if (upd.sc_drq != -1)
isa_dmacascade(upd.sc_drq);
if (upd.sc_drq != -1) {
sc->sc_dmaflags = 0;
isa_dmacascade(parent, upd.sc_drq);
} else {
/*
* We have a VLB controller, and can do 32-bit DMA.
*/
sc->sc_dmaflags = ISABUS_DMA_32BIT;
}
sc->sc_ih = isa_intr_establish(ic, upd.sc_irq, IST_EDGE, IPL_BIO,
u14_intr, sc);
@ -262,7 +279,8 @@ u14_start_mbox(sc, mscp)
Debugger();
}
bus_space_write_4(iot, ioh, U14_OGMPTR, KVTOPHYS(mscp));
bus_space_write_4(iot, ioh, U14_OGMPTR,
mscp->dmamap_self->dm_segs[0].ds_addr);
if (mscp->flags & MSCP_ABORT)
bus_space_write_1(iot, ioh, U14_LINT, U14_ABORT);
else

View File

@ -1,4 +1,4 @@
/* $NetBSD: wd.c,v 1.156 1997/01/17 20:45:29 perry Exp $ */
/* $NetBSD: wd.c,v 1.157 1997/06/06 23:44:06 thorpej Exp $ */
/*
* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
@ -52,6 +52,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <dev/isa/isavar.h>
@ -267,6 +268,15 @@ wdcattach(parent, self, aux)
printf("\n");
if (wdc->sc_drq != -1) {
if (isa_dmamap_create(parent, wdc->sc_drq, MAXPHYS,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("%s: can't create map for drq %d\n",
wdc->sc_dev.dv_xname, wdc->sc_drq);
wdc->sc_drq = -1;
}
}
wdc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
IPL_BIO, wdcintr, wdc);
@ -681,12 +691,12 @@ loop:
case WDM_DMA:
command = (bp->b_flags & B_READ) ?
WDCC_READDMA : WDCC_WRITEDMA;
/* Start the DMA channel and bounce the buffer if
necessary. */
isa_dmastart(
/* Start the DMA channel. */
isa_dmastart(wdc->sc_dev.dv_parent, wdc->sc_drq,
bp->b_data + wd->sc_skip, wd->sc_nbytes,
NULL,
bp->b_flags & B_READ ? DMAMODE_READ : DMAMODE_WRITE,
bp->b_data + wd->sc_skip,
wd->sc_nbytes, wdc->sc_drq);
BUS_DMA_NOWAIT);
break;
case WDM_PIOMULTI:
command = (bp->b_flags & B_READ) ?
@ -792,10 +802,9 @@ wdcintr(arg)
return 1;
}
/* Turn off the DMA channel and unbounce the buffer. */
/* Turn off the DMA channel. */
if (wd->sc_mode == WDM_DMA)
isa_dmadone(bp->b_flags & B_READ ? DMAMODE_READ : DMAMODE_WRITE,
bp->b_data + wd->sc_skip, wd->sc_nbytes, wdc->sc_drq);
isa_dmadone(wdc->sc_dev.dv_parent, wdc->sc_drq);
/* Have we an error? */
if (wdc->sc_status & WDCS_ERR) {

View File

@ -1,4 +1,4 @@
/* $NetBSD: wds.c,v 1.16 1997/05/01 20:10:57 marc Exp $ */
/* $NetBSD: wds.c,v 1.17 1997/06/06 23:44:08 thorpej Exp $ */
#undef WDSDIAG
#ifdef DDB
@ -308,13 +308,13 @@ wdsattach(parent, self, aux)
bus_space_write_1(iot, ioh, WDS_HCR, WDSH_DRQEN);
#ifdef notyet
if (wpd.sc_drq != -1)
isa_dmacascade(wpd.sc_drq);
isa_dmacascade(parent, wpd.sc_drq);
sc->sc_ih = isa_intr_establish(ic, wpd.sc_irq, IST_EDGE, IPL_BIO,
wdsintr, sc);
#else
if (ia->ia_drq != -1)
isa_dmacascade(ia->ia_drq);
isa_dmacascade(parent, ia->ia_drq);
sc->sc_ih = isa_intr_establish(ic, ia->ia_irq, IST_EDGE, IPL_BIO,
wdsintr, sc);

View File

@ -1,4 +1,4 @@
/* $NetBSD: wss.c,v 1.25 1997/05/09 22:16:43 augustss Exp $ */
/* $NetBSD: wss.c,v 1.26 1997/06/06 23:44:09 thorpej Exp $ */
/*
* Copyright (c) 1994 John Brezak
@ -75,6 +75,7 @@
#include <machine/cpu.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <sys/audioio.h>
@ -293,6 +294,7 @@ wssattach(parent, self, aux)
int err;
sc->sc_ad1848.sc_recdrq = ia->ia_drq;
sc->sc_ad1848.sc_isa = parent;
#ifdef NEWCONFIG
isa_establish(&sc->sc_id, &sc->sc_dev);

View File

@ -1,4 +1,4 @@
/* $NetBSD: wt.c,v 1.36 1996/10/13 01:38:08 christos Exp $ */
/* $NetBSD: wt.c,v 1.37 1997/06/06 23:44:10 thorpej Exp $ */
/*
* Streamer tape driver.
@ -65,6 +65,7 @@
#include <vm/vm_param.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <machine/pio.h>
#include <dev/isa/isavar.h>
@ -260,6 +261,13 @@ wtattach(parent, self, aux)
sc->flags = TPSTART; /* tape is rewound */
sc->dens = -1; /* unknown density */
if (isa_dmamap_create(parent, sc->chan, MAXPHYS,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
printf("%s: can't set up ISA DMA map\n",
sc->sc_dev.dv_xname);
return;
}
sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
IPL_BIO, wtintr, sc);
}
@ -691,10 +699,10 @@ wtintr(arg)
(sc->dmatotal - sc->dmacount) < sc->bsize) {
/* If reading short block, copy the internal buffer
* to the user memory. */
isa_dmadone(sc->dmaflags, sc->buf, sc->bsize, sc->chan);
isa_dmadone(sc->sc_dev.dv_parent, sc->chan);
bcopy(sc->buf, sc->dmavaddr, sc->dmatotal - sc->dmacount);
} else
isa_dmadone(sc->dmaflags, sc->dmavaddr, sc->bsize, sc->chan);
isa_dmadone(sc->sc_dev.dv_parent, sc->chan);
/*
* On exception, check for end of file and end of volume.
@ -879,9 +887,11 @@ wtdma(sc)
if ((sc->dmaflags & DMAMODE_READ) &&
(sc->dmatotal - sc->dmacount) < sc->bsize) {
/* Reading short block; do it through the internal buffer. */
isa_dmastart(sc->dmaflags, sc->buf, sc->bsize, sc->chan);
isa_dmastart(sc->sc_dev.dv_parent, sc->chan, sc->buf,
sc->bsize, NULL, sc->dmaflags, BUS_DMA_NOWAIT);
} else
isa_dmastart(sc->dmaflags, sc->dmavaddr, sc->bsize, sc->chan);
isa_dmastart(sc->sc_dev.dv_parent, sc->chan, sc->dmavaddr,
sc->bsize, NULL, sc->dmaflags, BUS_DMA_NOWAIT);
}
/* start i/o operation */

View File

@ -1,4 +1,41 @@
/* $NetBSD: if_le_isapnp.c,v 1.4 1997/04/09 02:10:48 jonathan Exp $ */
/* $NetBSD: if_le_isapnp.c,v 1.5 1997/06/06 23:46:39 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Copyright (c) 1997 Jonathan Stone <jonathan@NetBSD.org> and
@ -78,14 +115,6 @@
#include <dev/ic/am7990var.h>
#include <dev/isapnp/if_levar.h>
#ifdef __alpha__ /* XXX */
/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
#undef vtophys
#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
#endif
#ifdef __BROKEN_INDIRECT_CONFIG
int le_isapnp_match __P((struct device *, void *, void *));
#else
@ -110,6 +139,7 @@ static char *if_le_isapnp_devnames[] = {
0
};
#define LE_ISAPNP_MEMSIZE 16384
static void
le_isapnp_wrcsr(sc, port, val)
@ -169,11 +199,13 @@ le_isapnp_attach(parent, self, aux)
struct isapnp_attach_args *ipa = aux;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int i;
bus_dma_tag_t dmat;
bus_dma_segment_t seg;
int i, rseg;
lesc->sc_iot = iot = ipa->ipa_iot;
lesc->sc_ioh = ioh = ipa->ipa_io[0].h;
lesc->sc_dmat = dmat = ipa->ipa_dmat;
lesc->sc_rap = PCNET_RAP;
lesc->sc_rdp = PCNET_RDP;
@ -190,17 +222,43 @@ le_isapnp_attach(parent, self, aux)
for (i = 0; i < sizeof(sc->sc_enaddr); i++)
sc->sc_enaddr[i] = bus_space_read_1(iot, ioh, PCNET_SAPROM+i);
/* XXX SHOULD GET DMA-CAPABLE BUFFER SPACE */
sc->sc_mem = malloc(16384, M_DEVBUF, M_NOWAIT);
if (sc->sc_mem == 0) {
/*
* Allocate a DMA area for the card.
*/
if (bus_dmamem_alloc(dmat, LE_ISAPNP_MEMSIZE, NBPG, 0, &seg, 1,
&rseg, BUS_DMA_NOWAIT)) {
printf("%s: couldn't allocate memory for card\n",
sc->sc_dev.dv_xname);
return;
}
if (bus_dmamem_map(dmat, &seg, rseg, LE_ISAPNP_MEMSIZE,
(caddr_t *)&sc->sc_mem, BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC)) {
printf("%s: couldn't map memory for card\n",
sc->sc_dev.dv_xname);
return;
}
/*
* Create and load the DMA map for the DMA area.
*/
if (bus_dmamap_create(dmat, LE_ISAPNP_MEMSIZE, 1,
LE_ISAPNP_MEMSIZE, 0, BUS_DMA_NOWAIT, &lesc->sc_dmam)) {
printf("%s: couldn't create DMA map\n",
sc->sc_dev.dv_xname);
bus_dmamem_free(dmat, &seg, rseg);
return;
}
if (bus_dmamap_load(dmat, lesc->sc_dmam,
sc->sc_mem, LE_ISAPNP_MEMSIZE, NULL, BUS_DMA_NOWAIT)) {
printf("%s: coundn't load DMA map\n",
sc->sc_dev.dv_xname);
bus_dmamem_free(dmat, &seg, rseg);
return;
}
sc->sc_conf3 = 0;
sc->sc_addr = kvtop(sc->sc_mem); /* XXX XXX XXX !! */
sc->sc_memsize = 16384;
sc->sc_addr = lesc->sc_dmam->dm_segs[0].ds_addr;
sc->sc_memsize = LE_ISAPNP_MEMSIZE;
sc->sc_copytodesc = am7990_copytobuf_contig;
sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
@ -217,7 +275,7 @@ le_isapnp_attach(parent, self, aux)
am7990_config(sc);
if (ipa->ipa_ndrq > 0)
isa_dmacascade(ipa->ipa_drq[0].num);
isa_dmacascade(parent->dv_parent, ipa->ipa_drq[0].num);
lesc->sc_ih = isa_intr_establish(ipa->ipa_ic, ipa->ipa_irq[0].num,
IST_EDGE, IPL_NET, le_isapnp_intredge, sc);

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_levar.h,v 1.1 1997/03/31 20:22:19 jonathan Exp $ */
/* $NetBSD: if_levar.h,v 1.2 1997/06/06 23:46:40 thorpej Exp $ */
/*
* LANCE Ethernet driver header file
@ -31,5 +31,7 @@ struct le_softc {
void *sc_ih;
bus_space_tag_t sc_iot; /* space cookie */
bus_space_handle_t sc_ioh; /* bus space handle */
bus_dma_tag_t sc_dmat; /* bus dma tag */
bus_dmamap_t sc_dmam; /* bus dma map */
int sc_rap, sc_rdp; /* offsets to LANCE registers */
};

View File

@ -1,4 +1,4 @@
/* $NetBSD: isapnp.c,v 1.4 1997/02/24 22:08:25 christos Exp $ */
/* $NetBSD: isapnp.c,v 1.5 1997/06/06 23:46:41 thorpej Exp $ */
/*
* Copyright (c) 1996 Christos Zoulas. All rights reserved.
@ -804,6 +804,7 @@ isapnp_attach(parent, self, aux)
lpa->ipa_ic = ia->ia_ic;
lpa->ipa_iot = ia->ia_iot;
lpa->ipa_memt = ia->ia_memt;
ipa->ipa_dmat = ia->ia_dmat;
isapnp_write_reg(sc, ISAPNP_ACTIVATE, 1);
#ifdef _KERNEL

View File

@ -1,4 +1,4 @@
/* $NetBSD: isapnpvar.h,v 1.2 1997/01/24 21:58:38 christos Exp $ */
/* $NetBSD: isapnpvar.h,v 1.3 1997/06/06 23:46:42 thorpej Exp $ */
/*
* Copyright (c) 1996 Christos Zoulas. All rights reserved.
@ -124,6 +124,7 @@ struct isapnp_pin {
struct isapnp_attach_args {
bus_space_tag_t ipa_iot; /* isa i/o space tag */
bus_space_tag_t ipa_memt; /* isa mem space tag */
bus_dma_tag_t ipa_dmat; /* isa dma tag */
isa_chipset_tag_t ipa_ic;

View File

@ -1,4 +1,4 @@
/* $NetBSD: sb_isapnp.c,v 1.6 1997/04/10 06:33:16 mikel Exp $ */
/* $NetBSD: sb_isapnp.c,v 1.7 1997/06/06 23:46:43 thorpej Exp $ */
/*
* Copyright (c) 1991-1993 Regents of the University of California.
@ -115,6 +115,12 @@ sb_isapnp_attach(parent, self, aux)
sc->sc_drq8 = ipa->ipa_drq[0].num;
sc->sc_drq16 = ipa->ipa_drq[1].num;
/*
* isapnp is a child if isa, and we needs isa for the dma
* routines
*/
sc->sc_isa = parent->dv_parent;
printf("\n");
if (isapnp_config(ipa->ipa_iot, ipa->ipa_memt, ipa)) {

View File

@ -1,4 +1,41 @@
/* $NetBSD: if_le_pci.c,v 1.18 1997/04/13 20:14:31 cgd Exp $ */
/* $NetBSD: if_le_pci.c,v 1.19 1997/06/06 23:48:02 thorpej Exp $ */
/*-
* Copyright (c) 1997 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*-
* Copyright (c) 1995 Charles M. Hannum. All rights reserved.
@ -76,12 +113,6 @@
#include <dev/pci/if_levar.h>
#ifdef __alpha__ /* XXX */
/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
#undef vtophys
#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
#endif
#ifdef __BROKEN_INDIRECT_CONFIG
int le_pci_match __P((struct device *, void *, void *));
#else
@ -102,6 +133,8 @@ hide u_int16_t le_pci_rdcsr __P((struct am7990_softc *, u_int16_t));
*/
#define PCI_CBIO 0x10 /* Configuration Base IO Address */
#define LE_PCI_MEMSIZE 16384
hide void
le_pci_wrcsr(sc, port, val)
struct am7990_softc *sc;
@ -164,9 +197,11 @@ le_pci_attach(parent, self, aux)
pci_intr_handle_t ih;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_dma_tag_t dmat = pa->pa_dmat;
bus_dma_segment_t seg;
pci_chipset_tag_t pc = pa->pa_pc;
pcireg_t csr;
int i;
int i, rseg;
const char *model, *intrstr;
switch (PCI_PRODUCT(pa->pa_id)) {
@ -194,19 +229,48 @@ le_pci_attach(parent, self, aux)
for (i = 0; i < sizeof(sc->sc_enaddr); i++)
sc->sc_enaddr[i] = bus_space_read_1(iot, ioh, i);
sc->sc_mem = malloc(16384, M_DEVBUF, M_NOWAIT);
if (sc->sc_mem == 0) {
lesc->sc_iot = iot;
lesc->sc_ioh = ioh;
lesc->sc_dmat = dmat;
/*
* Allocate a DMA area for the card.
*/
if (bus_dmamem_alloc(dmat, LE_PCI_MEMSIZE, NBPG, 0, &seg, 1,
&rseg, BUS_DMA_NOWAIT)) {
printf("%s: couldn't allocate memory for card\n",
sc->sc_dev.dv_xname);
return;
}
if (bus_dmamem_map(dmat, &seg, rseg, LE_PCI_MEMSIZE,
(caddr_t *)&sc->sc_mem,
BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC)) {
printf("%s: couldn't map memory for card\n",
sc->sc_dev.dv_xname);
return;
}
lesc->sc_iot = iot;
lesc->sc_ioh = ioh;
/*
* Create and load the DMA map for the DMA area.
*/
if (bus_dmamap_create(dmat, LE_PCI_MEMSIZE, 1,
LE_PCI_MEMSIZE, 0, BUS_DMA_NOWAIT, &lesc->sc_dmam)) {
printf("%s: couldn't create DMA map\n",
sc->sc_dev.dv_xname);
bus_dmamem_free(dmat, &seg, rseg);
return;
}
if (bus_dmamap_load(dmat, lesc->sc_dmam,
sc->sc_mem, LE_PCI_MEMSIZE, NULL, BUS_DMA_NOWAIT)) {
printf("%s: coundn't load DMA map\n",
sc->sc_dev.dv_xname);
bus_dmamem_free(dmat, &seg, rseg);
return;
}
sc->sc_conf3 = 0;
sc->sc_addr = vtophys(sc->sc_mem); /* XXX XXX XXX */
sc->sc_memsize = 16384;
sc->sc_addr = lesc->sc_dmam->dm_segs[0].ds_addr;
sc->sc_memsize = LE_PCI_MEMSIZE;
sc->sc_copytodesc = am7990_copytobuf_contig;
sc->sc_copyfromdesc = am7990_copyfrombuf_contig;

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_levar.h,v 1.4 1997/03/15 18:12:01 is Exp $ */
/* $NetBSD: if_levar.h,v 1.5 1997/06/06 23:48:03 thorpej Exp $ */
/*
* LANCE Ethernet driver header file
@ -29,5 +29,7 @@ struct le_softc {
void *sc_ih;
bus_space_tag_t sc_iot; /* space cookie */
bus_space_handle_t sc_ioh; /* bus space handle */
bus_dma_tag_t sc_dmat; /* bus dma tag */
bus_dmamap_t sc_dmam; /* bus dma map */
int sc_rap, sc_rdp; /* offsets to LANCE registers */
};

View File

@ -1,4 +1,4 @@
/* $NetBSD: pcivar.h,v 1.22 1997/04/13 22:05:10 cgd Exp $ */
/* $NetBSD: pcivar.h,v 1.23 1997/06/06 23:48:05 thorpej Exp $ */
/*
* Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
@ -73,6 +73,7 @@ struct pcibus_attach_args {
char *pba_busname; /* XXX should be common */
bus_space_tag_t pba_iot; /* pci i/o space tag */
bus_space_tag_t pba_memt; /* pci mem space tag */
bus_dma_tag_t pba_dmat; /* DMA tag */
pci_chipset_tag_t pba_pc;
int pba_flags; /* flags; see below */
@ -92,6 +93,7 @@ struct pcibus_attach_args {
struct pci_attach_args {
bus_space_tag_t pa_iot; /* pci i/o space tag */
bus_space_tag_t pa_memt; /* pci mem space tag */
bus_dma_tag_t pa_dmat; /* DMA tag */
pci_chipset_tag_t pa_pc;
int pa_flags; /* flags; see below */