Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

New bus.h implementation/interface: 

- No more distinction between i/o-mapped and memory-mapped
	  devices.  It's all "bus space" now, and space tags
	  differentiate the space with finer grain than the
	  bus chipset tag.
	- Add memory barrier methods.
	- Implement space alloc/free methods.
	- Implement region read/write methods (like memcpy to/from
	  bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.
This commit is contained in:
thorpej 1996-10-21 22:34:38 +00:00
parent 16c4c5af26
commit 769a499800
30 changed files with 1360 additions and 1339 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

296
sys/dev/ic/com.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: com.c,v 1.90 1996/10/13 01:37:38 christos Exp $ */
/* $NetBSD: com.c,v 1.91 1996/10/21 22:40:30 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995, 1996
@ -91,9 +91,9 @@ struct com_softc {
int sc_hayespbase;
#endif
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_io_handle_t sc_hayespioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
bus_space_handle_t sc_hayespioh;
u_char sc_hwflags;
#define COM_HW_NOIEN 0x01
@ -113,7 +113,7 @@ struct com_softc {
};
#ifdef COM_HAYESP
int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc));
int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
#endif
void comdiag __P((void *));
int comspeed __P((long));
@ -157,7 +157,7 @@ struct cfdriver com_cd = {
NULL, "com", DV_TTY
};
void cominit __P((bus_chipset_tag_t, bus_io_handle_t, int));
void cominit __P((bus_space_tag_t, bus_space_handle_t, int));
#ifdef COMCONSOLE
int comdefaultrate = CONSPEED; /* XXX why set default? */
@ -167,8 +167,8 @@ int comdefaultrate = TTYDEF_SPEED;
int comconsaddr;
int comconsinit;
int comconsattached;
bus_chipset_tag_t comconsbc;
bus_io_handle_t comconsioh;
bus_space_tag_t comconstag;
bus_space_handle_t comconsbah;
tcflag_t comconscflag = TTYDEF_CFLAG;
int commajor;
@ -215,16 +215,16 @@ comspeed(speed)
}
int
comprobe1(bc, ioh, iobase)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
comprobe1(iot, ioh, iobase)
bus_space_tag_t iot;
bus_space_handle_t ioh;
int iobase;
{
/* force access to id reg */
bus_io_write_1(bc, ioh, com_lcr, 0);
bus_io_write_1(bc, ioh, com_iir, 0);
if (bus_io_read_1(bc, ioh, com_iir) & 0x38)
bus_space_write_1(iot, ioh, com_lcr, 0);
bus_space_write_1(iot, ioh, com_iir, 0);
if (bus_space_read_1(iot, ioh, com_iir) & 0x38)
return 0;
return 1;
@ -233,12 +233,12 @@ comprobe1(bc, ioh, iobase)
#ifdef COM_HAYESP
int
comprobeHAYESP(hayespioh, sc)
bus_io_handle_t hayespioh;
bus_space_handle_t hayespioh;
struct com_softc *sc;
{
char val, dips;
int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
bus_chipset_tag_t bc = sc->sc_bc;
bus_space_tag_t iot = sc->sc_iot;
/*
* Hayes ESP cards have two iobases. One is for compatibility with
@ -248,7 +248,7 @@ comprobeHAYESP(hayespioh, sc)
*/
/* Test for ESP signature */
if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0)
if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0)
return 0;
/*
@ -256,8 +256,8 @@ comprobeHAYESP(hayespioh, sc)
*/
/* Get the dip-switch configurations */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1);
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1);
/* Determine which com port this ESP card services: bits 0,1 of */
/* dips is the port # (0-3); combaselist[val] is the com_iobase */
@ -268,9 +268,9 @@ comprobeHAYESP(hayespioh, sc)
/* Check ESP Self Test bits. */
/* Check for ESP version 2.0: bits 4,5,6 == 010 */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */
val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2);
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */
val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);
if ((val & 0x70) < 0x20) {
printf("-old (%o)", val & 0x70);
/* we do not support the necessary features */
@ -300,8 +300,8 @@ comprobe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int iobase, needioh;
int rv = 1;
@ -314,7 +314,7 @@ comprobe(parent, match, aux)
if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) {
struct isa_attach_args *ia = aux;
bc = ia->ia_bc;
iot = ia->ia_iot;
iobase = ia->ia_iobase;
needioh = 1;
} else
@ -327,7 +327,7 @@ comprobe(parent, match, aux)
if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave)
return (0);
bc = ca->ca_bc;
iot = ca->ca_iot;
iobase = ca->ca_iobase;
ioh = ca->ca_ioh;
needioh = 0;
@ -339,13 +339,13 @@ comprobe(parent, match, aux)
if (iobase == comconsaddr && !comconsattached)
goto out;
if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (needioh && bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
rv = comprobe1(bc, ioh, iobase);
rv = comprobe1(iot, ioh, iobase);
if (needioh)
bus_io_unmap(bc, ioh, COM_NPORTS);
bus_space_unmap(iot, ioh, COM_NPORTS);
out:
#if NCOM_ISA
@ -366,8 +366,8 @@ comattach(parent, self, aux)
{
struct com_softc *sc = (void *)self;
int iobase, irq;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
#ifdef COM_HAYESP
int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
int *hayespp;
@ -388,12 +388,12 @@ comattach(parent, self, aux)
* We're living on an isa.
*/
iobase = ia->ia_iobase;
bc = ia->ia_bc;
iot = ia->ia_iot;
if (iobase != comconsaddr) {
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh))
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh))
panic("comattach: io mapping failed");
} else
ioh = comconsioh;
ioh = comconsbah;
irq = ia->ia_irq;
} else
#endif
@ -405,7 +405,7 @@ comattach(parent, self, aux)
* We're living on a commulti.
*/
iobase = ca->ca_iobase;
bc = ca->ca_bc;
iot = ca->ca_iot;
ioh = ca->ca_ioh;
irq = IRQUNK;
@ -415,7 +415,7 @@ comattach(parent, self, aux)
#endif
panic("comattach: impossible");
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
sc->sc_iobase = iobase;
@ -435,42 +435,42 @@ comattach(parent, self, aux)
#ifdef COM_HAYESP
/* Look for a Hayes ESP board. */
for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) {
bus_io_handle_t hayespioh;
bus_space_handle_t hayespioh;
#define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */
if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh))
if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, &hayespioh))
continue;
if (comprobeHAYESP(hayespioh, sc)) {
sc->sc_hayespbase = *hayespp;
sc->sc_hayespioh = hayespioh;
break;
}
bus_io_unmap(bc, hayespioh, HAYESP_NPORTS);
bus_space_unmap(iot, hayespioh, HAYESP_NPORTS);
}
/* No ESP; look for other things. */
if (*hayespp == 0) {
#endif
/* look for a NS 16550AF UART with FIFOs */
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
delay(100);
if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
SET(sc->sc_hwflags, COM_HW_FIFO);
printf(": ns16550a, working fifo\n");
} else
printf(": ns16550, broken fifo\n");
else
printf(": ns8250 or ns16450, no fifo\n");
bus_io_write_1(bc, ioh, com_fifo, 0);
bus_space_write_1(iot, ioh, com_fifo, 0);
#ifdef COM_HAYESP
}
#endif
/* disable interrupts */
bus_io_write_1(bc, ioh, com_ier, 0);
bus_io_write_1(bc, ioh, com_mcr, 0);
bus_space_write_1(iot, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_mcr, 0);
if (irq != IRQUNK) {
#if NCOM_ISA
@ -489,7 +489,7 @@ comattach(parent, self, aux)
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
kgdb_dev = -1; /* can't debug over console port */
else {
cominit(bc, ioh, kgdb_rate);
cominit(iot, ioh, kgdb_rate);
if (kgdb_debug_init) {
/*
* Print prefix of device name,
@ -517,8 +517,8 @@ comopen(dev, flag, mode, p)
{
int unit = COMUNIT(dev);
struct com_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct tty *tp;
int s;
int error = 0;
@ -568,57 +568,57 @@ comopen(dev, flag, mode, p)
sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
#ifdef COM_HAYESP
/* Setup the ESP board */
if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
bus_io_handle_t hayespioh = sc->sc_hayespioh;
bus_space_handle_t hayespioh = sc->sc_hayespioh;
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_DMA_MODE|FIFO_ENABLE|
FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8);
/* Set 16550 compatibility mode */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
HAYESP_MODE_SCALE);
/* Set RTS/CTS flow control */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS);
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS);
/* Set flow control levels */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_HIBYTE(HAYESP_RXHIWMARK));
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_LOBYTE(HAYESP_RXHIWMARK));
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_HIBYTE(HAYESP_RXLOWMARK));
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_LOBYTE(HAYESP_RXLOWMARK));
} else
#endif
if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
/* Set the FIFO threshold based on the receive speed. */
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
(tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
/* flush any pending I/O */
while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY))
(void) bus_io_read_1(bc, ioh, com_data);
while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
(void) bus_space_read_1(iot, ioh, com_data);
/* you turn me on, baby */
sc->sc_mcr = MCR_DTR | MCR_RTS;
if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
SET(sc->sc_mcr, MCR_IENABLE);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc->sc_msr = bus_io_read_1(bc, ioh, com_msr);
sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) ||
ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
SET(tp->t_state, TS_CARR_ON);
@ -657,8 +657,8 @@ comclose(dev, flag, mode, p)
int unit = COMUNIT(dev);
struct com_softc *sc = com_cd.cd_devs[unit];
struct tty *tp = sc->sc_tty;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int s;
/* XXX This is for cons.c. */
@ -668,13 +668,14 @@ comclose(dev, flag, mode, p)
(*linesw[tp->t_line].l_close)(tp, flag);
s = spltty();
CLR(sc->sc_lcr, LCR_SBREAK);
bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr);
bus_io_write_1(bc, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_ier, 0);
if (ISSET(tp->t_cflag, HUPCL) &&
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
/* XXX perhaps only clear DTR */
bus_io_write_1(bc, ioh, com_mcr, 0);
bus_io_write_1(bc, ioh, com_fifo, FIFO_RCV_RST | FIFO_XMT_RST);
bus_space_write_1(iot, ioh, com_mcr, 0);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_RCV_RST | FIFO_XMT_RST);
}
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
if (--comsopen == 0)
@ -748,8 +749,8 @@ comioctl(dev, cmd, data, flag, p)
int unit = COMUNIT(dev);
struct com_softc *sc = com_cd.cd_devs[unit];
struct tty *tp = sc->sc_tty;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
@ -762,29 +763,29 @@ comioctl(dev, cmd, data, flag, p)
switch (cmd) {
case TIOCSBRK:
SET(sc->sc_lcr, LCR_SBREAK);
bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
break;
case TIOCCBRK:
CLR(sc->sc_lcr, LCR_SBREAK);
bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
break;
case TIOCSDTR:
SET(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCCDTR:
CLR(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCMSET:
CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
case TIOCMBIS:
SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCMBIC:
CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCMGET: {
u_char m;
@ -804,7 +805,7 @@ comioctl(dev, cmd, data, flag, p)
SET(bits, TIOCM_DSR);
if (ISSET(m, MSR_RI | MSR_TERI))
SET(bits, TIOCM_RI);
if (bus_io_read_1(bc, ioh, com_ier))
if (bus_space_read_1(iot, ioh, com_ier))
SET(bits, TIOCM_LE);
*(int *)data = bits;
break;
@ -859,8 +860,8 @@ comparam(tp, t)
struct termios *t;
{
struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int ospeed = comspeed(t->c_ospeed);
u_char lcr;
tcflag_t oldcflag;
@ -900,7 +901,7 @@ comparam(tp, t)
if (ospeed == 0) {
CLR(sc->sc_mcr, MCR_DTR);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
/*
@ -935,34 +936,34 @@ comparam(tp, t)
}
}
bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB);
bus_io_write_1(bc, ioh, com_dlbl, ospeed);
bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8);
bus_io_write_1(bc, ioh, com_lcr, lcr);
bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
bus_space_write_1(iot, ioh, com_dlbl, ospeed);
bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8);
bus_space_write_1(iot, ioh, com_lcr, lcr);
SET(sc->sc_mcr, MCR_DTR);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
} else
bus_io_write_1(bc, ioh, com_lcr, lcr);
bus_space_write_1(iot, ioh, com_lcr, lcr);
if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) &&
ISSET(sc->sc_hwflags, COM_HW_FIFO))
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE |
(t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
} else
bus_io_write_1(bc, ioh, com_lcr, lcr);
bus_space_write_1(iot, ioh, com_lcr, lcr);
/* When not using CRTSCTS, RTS follows DTR. */
if (!ISSET(t->c_cflag, CRTSCTS)) {
if (ISSET(sc->sc_mcr, MCR_DTR)) {
if (!ISSET(sc->sc_mcr, MCR_RTS)) {
SET(sc->sc_mcr, MCR_RTS);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
} else {
if (ISSET(sc->sc_mcr, MCR_RTS)) {
CLR(sc->sc_mcr, MCR_RTS);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
}
sc->sc_dtr = MCR_DTR | MCR_RTS;
@ -984,7 +985,7 @@ comparam(tp, t)
ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) &&
(*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
CLR(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
/* Just to be sure... */
@ -998,8 +999,8 @@ comstart(tp)
struct tty *tp;
{
struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int s;
s = spltty();
@ -1023,14 +1024,14 @@ comstart(tp)
if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
SET(sc->sc_ier, IER_ETXRDY);
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
}
#ifdef COM_HAYESP
if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
u_char buffer[1024], *cp = buffer;
int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
do
bus_io_write_1(bc, ioh, com_data, *cp++);
bus_space_write_1(iot, ioh, com_data, *cp++);
while (--n);
}
else
@ -1039,17 +1040,17 @@ comstart(tp)
u_char buffer[16], *cp = buffer;
int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
do {
bus_io_write_1(bc, ioh, com_data, *cp++);
bus_space_write_1(iot, ioh, com_data, *cp++);
} while (--n);
} else
bus_io_write_1(bc, ioh, com_data, getc(&tp->t_outq));
bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq));
out:
splx(s);
return;
stopped:
if (ISSET(sc->sc_ier, IER_ETXRDY)) {
CLR(sc->sc_ier, IER_ETXRDY);
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
}
splx(s);
}
@ -1153,7 +1154,7 @@ comsoft(arg)
!ISSET(sc->sc_mcr, MCR_RTS)) {
/* XXX */
SET(sc->sc_mcr, MCR_RTS);
bus_io_write_1(sc->sc_bc, sc->sc_ioh, com_mcr,
bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr,
sc->sc_mcr);
}
@ -1181,8 +1182,8 @@ comintr(arg)
void *arg;
{
struct com_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct tty *tp;
u_char iir, lsr, data, msr, delta;
#ifdef COM_DEBUG
@ -1196,7 +1197,7 @@ comintr(arg)
n = 0;
iter[n].iir =
#endif
iir = bus_io_read_1(bc, ioh, com_iir);
iir = bus_space_read_1(iot, ioh, com_iir);
if (ISSET(iir, IIR_NOPEND))
return (0);
@ -1206,14 +1207,14 @@ comintr(arg)
#ifdef COM_DEBUG
iter[n].lsr =
#endif
lsr = bus_io_read_1(bc, ioh, com_lsr);
lsr = bus_space_read_1(iot, ioh, com_lsr);
if (ISSET(lsr, LSR_RXRDY)) {
register u_char *p = sc->sc_ibufp;
comevents = 1;
do {
data = bus_io_read_1(bc, ioh, com_data);
data = bus_space_read_1(iot, ioh, com_data);
if (ISSET(lsr, LSR_BI)) {
#ifdef notdef
printf("break %02x %02x %02x %02x\n",
@ -1239,7 +1240,7 @@ comintr(arg)
ISSET(tp->t_cflag, CRTSCTS)) {
/* XXX */
CLR(sc->sc_mcr, MCR_RTS);
bus_io_write_1(bc, ioh,
bus_space_write_1(iot, ioh,
com_mcr, sc->sc_mcr);
}
}
@ -1251,7 +1252,7 @@ comintr(arg)
goto ohfudge;
iter[n].lsr =
#endif
lsr = bus_io_read_1(bc, ioh, com_lsr);
lsr = bus_space_read_1(iot, ioh, com_lsr);
} while (ISSET(lsr, LSR_RXRDY));
sc->sc_ibufp = p;
@ -1264,9 +1265,10 @@ comintr(arg)
sc->sc_failures++;
if (sc->sc_errors++ == 0)
timeout(comdiag, sc, 60 * hz);
bus_io_write_1(bc, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_ier, 0);
delay(10);
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier,
sc->sc_ier);
iir = IIR_NOPEND;
continue;
}
@ -1275,7 +1277,7 @@ comintr(arg)
#ifdef COM_DEBUG
iter[n].msr =
#endif
msr = bus_io_read_1(bc, ioh, com_msr);
msr = bus_space_read_1(iot, ioh, com_msr);
if (msr != sc->sc_msr) {
delta = msr ^ sc->sc_msr;
@ -1284,7 +1286,7 @@ comintr(arg)
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
(*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) {
CLR(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
if (ISSET(delta & msr, MSR_CTS) &&
ISSET(tp->t_cflag, CRTSCTS)) {
@ -1305,7 +1307,7 @@ comintr(arg)
goto ohfudge;
iter[n].iir =
#endif
iir = bus_io_read_1(bc, ioh, com_iir);
iir = bus_space_read_1(iot, ioh, com_iir);
if (ISSET(iir, IIR_NOPEND))
return (1);
}
@ -1337,16 +1339,16 @@ comcnprobe(cp)
struct consdev *cp;
{
/* XXX NEEDS TO BE FIXED XXX */
bus_chipset_tag_t bc = 0;
bus_io_handle_t ioh;
bus_space_tag_t iot = 0;
bus_space_handle_t ioh;
int found;
if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) {
cp->cn_pri = CN_DEAD;
return;
}
found = comprobe1(bc, ioh, CONADDR);
bus_io_unmap(bc, ioh, COM_NPORTS);
found = comprobe1(iot, ioh, CONADDR);
bus_space_unmap(iot, ioh, COM_NPORTS);
if (!found) {
cp->cn_pri = CN_DEAD;
return;
@ -1373,36 +1375,36 @@ comcninit(cp)
#if 0
XXX NEEDS TO BE FIXED XXX
comconsbc = ???;
comconstag = ???;
#endif
if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh))
if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsbah))
panic("comcninit: mapping failed");
cominit(comconsbc, comconsioh, comdefaultrate);
cominit(comconstag, comconsbah, comdefaultrate);
comconsaddr = CONADDR;
comconsinit = 0;
}
void
cominit(bc, ioh, rate)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
cominit(iot, ioh, rate)
bus_space_tag_t iot;
bus_space_handle_t ioh;
int rate;
{
int s = splhigh();
u_char stat;
bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB);
bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
rate = comspeed(comdefaultrate);
bus_io_write_1(bc, ioh, com_dlbl, rate);
bus_io_write_1(bc, ioh, com_dlbh, rate >> 8);
bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS);
bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY);
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_dlbl, rate);
bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
bus_io_write_1(bc, ioh, com_mcr, MCR_DTR | MCR_RTS);
bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS);
DELAY(100);
stat = bus_io_read_1(bc, ioh, com_iir);
stat = bus_space_read_1(iot, ioh, com_iir);
splx(s);
}
@ -1411,14 +1413,14 @@ comcngetc(dev)
dev_t dev;
{
int s = splhigh();
bus_chipset_tag_t bc = comconsbc;
bus_io_handle_t ioh = comconsioh;
bus_space_tag_t iot = comconstag;
bus_space_handle_t ioh = comconsbah;
u_char stat, c;
while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY))
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
;
c = bus_io_read_1(bc, ioh, com_data);
stat = bus_io_read_1(bc, ioh, com_iir);
c = bus_space_read_1(iot, ioh, com_data);
stat = bus_space_read_1(iot, ioh, com_iir);
splx(s);
return c;
}
@ -1432,8 +1434,8 @@ comcnputc(dev, c)
int c;
{
int s = splhigh();
bus_chipset_tag_t bc = comconsbc;
bus_io_handle_t ioh = comconsioh;
bus_space_tag_t iot = comconstag;
bus_space_handle_t ioh = comconsbah;
u_char stat;
register int timo;
@ -1441,20 +1443,20 @@ comcnputc(dev, c)
if (dev != kgdb_dev)
#endif
if (comconsinit == 0) {
cominit(bc, ioh, comdefaultrate);
cominit(iot, ioh, comdefaultrate);
comconsinit = 1;
}
/* wait for any pending transmission to finish */
timo = 50000;
while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo)
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
;
bus_io_write_1(bc, ioh, com_data, c);
bus_space_write_1(iot, ioh, com_data, c);
/* wait for this transmission to complete */
timo = 1500000;
while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo)
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
;
/* clear any interrupts generated by this transmission */
stat = bus_io_read_1(bc, ioh, com_iir);
stat = bus_space_read_1(iot, ioh, com_iir);
splx(s);
}

12
sys/dev/ic/comvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: comvar.h,v 1.5 1996/05/05 19:50:47 christos Exp $ */
/* $NetBSD: comvar.h,v 1.6 1996/10/21 22:40:34 thorpej Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -33,17 +33,17 @@
struct commulti_attach_args {
int ca_slave; /* slave number */
bus_chipset_tag_t ca_bc;
bus_io_handle_t ca_ioh;
bus_space_tag_t ca_iot;
bus_space_handle_t ca_ioh;
int ca_iobase;
int ca_noien;
};
int comprobe1 __P((bus_chipset_tag_t, bus_io_handle_t, int));
int comprobe1 __P((bus_space_tag_t, bus_space_handle_t, int));
int comintr __P((void *));
extern int comconsaddr;
extern int comconsattached;
extern bus_chipset_tag_t comconsbc;
extern bus_io_handle_t comconsioh;
extern bus_space_tag_t comconstag;
extern bus_space_handle_t comconsbah;
extern tcflag_t comconscflag;

100
sys/dev/ic/lpt.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: lpt.c,v 1.41 1996/10/13 01:37:55 christos Exp $ */
/* $NetBSD: lpt.c,v 1.42 1996/10/21 22:41:14 thorpej Exp $ */
/*
* Copyright (c) 1993, 1994 Charles Hannum.
@ -93,8 +93,8 @@ struct lpt_softc {
u_char *sc_cp;
int sc_spinmax;
int sc_iobase;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_irq;
u_char sc_state;
#define LPT_OPEN 0x01 /* device is open */
@ -128,36 +128,36 @@ struct cfdriver lpt_cd = {
#define LPS_INVERT (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK)
#define LPS_MASK (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK|LPS_NOPAPER)
#define NOT_READY() ((bus_io_read_1(bc, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_io_read_1(bc, ioh, lpt_status), sc)
#define NOT_READY() ((bus_space_read_1(iot, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_space_read_1(iot, ioh, lpt_status), sc)
static int not_ready __P((u_char, struct lpt_softc *));
static void lptwakeup __P((void *arg));
static int pushbytes __P((struct lpt_softc *));
int lpt_port_test __P((bus_chipset_tag_t, bus_io_handle_t, bus_io_addr_t,
bus_io_size_t, u_char, u_char));
int lpt_port_test __P((bus_space_tag_t, bus_space_handle_t, bus_addr_t,
bus_size_t, u_char, u_char));
/*
* Internal routine to lptprobe to do port tests of one byte value.
*/
int
lpt_port_test(bc, ioh, base, off, data, mask)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_addr_t base;
bus_io_size_t off;
lpt_port_test(iot, ioh, base, off, data, mask)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t base;
bus_size_t off;
u_char data, mask;
{
int timeout;
u_char temp;
data &= mask;
bus_io_write_1(bc, ioh, off, data);
bus_space_write_1(iot, ioh, off, data);
timeout = 1000;
do {
delay(10);
temp = bus_io_read_1(bc, ioh, off) & mask;
temp = bus_space_read_1(iot, ioh, off) & mask;
} while (temp != data && --timeout);
LPRINTF(("lpt: port=0x%x out=0x%x in=0x%x timeout=%d\n", base + off,
data, temp, timeout));
@ -191,8 +191,8 @@ lptprobe(parent, match, aux)
void *match, *aux;
{
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_long base;
u_char mask, data;
int i, rv;
@ -204,36 +204,36 @@ lptprobe(parent, match, aux)
#define ABORT goto out
#endif
bc = ia->ia_bc;
iot = ia->ia_iot;
base = ia->ia_iobase;
if (bus_io_map(bc, base, LPT_NPORTS, &ioh))
if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh))
return 0;
rv = 0;
mask = 0xff;
data = 0x55; /* Alternating zeros */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
data = 0xaa; /* Alternating ones */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
for (i = 0; i < CHAR_BIT; i++) { /* Walking zero */
data = ~(1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
for (i = 0; i < CHAR_BIT; i++) { /* Walking one */
data = (1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
bus_io_write_1(bc, ioh, lpt_data, 0);
bus_io_write_1(bc, ioh, lpt_control, 0);
bus_space_write_1(iot, ioh, lpt_data, 0);
bus_space_write_1(iot, ioh, lpt_control, 0);
ia->ia_iosize = LPT_NPORTS;
ia->ia_msize = 0;
@ -241,7 +241,7 @@ lptprobe(parent, match, aux)
rv = 1;
out:
bus_io_unmap(bc, ioh, LPT_NPORTS);
bus_space_unmap(iot, ioh, LPT_NPORTS);
return rv;
}
@ -252,8 +252,8 @@ lptattach(parent, self, aux)
{
struct lpt_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
if (ia->ia_irq != IRQUNK)
printf("\n");
@ -264,12 +264,12 @@ lptattach(parent, self, aux)
sc->sc_irq = ia->ia_irq;
sc->sc_state = 0;
bc = sc->sc_bc = ia->ia_bc;
if (bus_io_map(bc, sc->sc_iobase, LPT_NPORTS, &ioh))
iot = sc->sc_iot = ia->ia_iot;
if (bus_space_map(iot, sc->sc_iobase, LPT_NPORTS, 0, &ioh))
panic("lptattach: couldn't map I/O ports");
sc->sc_ioh = ioh;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
if (ia->ia_irq != IRQUNK)
sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
@ -289,8 +289,8 @@ lptopen(dev, flag, mode, p)
int unit = LPTUNIT(dev);
u_char flags = LPTFLAGS(dev);
struct lpt_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_char control;
int error;
int spin;
@ -316,17 +316,17 @@ lptopen(dev, flag, mode, p)
sc->sc_state = LPT_INIT;
sc->sc_flags = flags;
LPRINTF(("%s: open: flags=0x%x\n", sc->sc_dev.dv_xname, flags));
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
if ((flags & LPT_NOPRIME) == 0) {
/* assert INIT for 100 usec to start up printer */
bus_io_write_1(bc, ioh, lpt_control, LPC_SELECT);
bus_space_write_1(iot, ioh, lpt_control, LPC_SELECT);
delay(100);
}
control = LPC_SELECT | LPC_NINIT;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* wait till ready (printer running diagnostics) */
for (spin = 0; NOT_READY_ERR(); spin += STEP) {
@ -348,7 +348,7 @@ lptopen(dev, flag, mode, p)
if (flags & LPT_AUTOLF)
control |= LPC_AUTOLF;
sc->sc_control = control;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_inbuf = geteblk(LPT_BSIZE);
sc->sc_count = 0;
@ -408,8 +408,8 @@ lptclose(dev, flag, mode, p)
{
int unit = LPTUNIT(dev);
struct lpt_softc *sc = lpt_cd.cd_devs[unit];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (sc->sc_count)
(void) pushbytes(sc);
@ -417,9 +417,9 @@ lptclose(dev, flag, mode, p)
if ((sc->sc_flags & LPT_NOINTR) == 0)
untimeout(lptwakeup, sc);
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
sc->sc_state = 0;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
brelse(sc->sc_inbuf);
LPRINTF(("%s: closed\n", sc->sc_dev.dv_xname));
@ -430,8 +430,8 @@ int
pushbytes(sc)
struct lpt_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
if (sc->sc_flags & LPT_NOINTR) {
@ -459,10 +459,10 @@ pushbytes(sc)
break;
}
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* adapt busy-wait algorithm */
if (spin*2 + 16 < sc->sc_spinmax)
@ -529,8 +529,8 @@ lptintr(arg)
void *arg;
{
struct lpt_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
#if 0
if ((sc->sc_state & LPT_OPEN) == 0)
@ -544,10 +544,10 @@ lptintr(arg)
if (sc->sc_count) {
u_char control = sc->sc_control;
/* send char */
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_state |= LPT_OBUSY;
} else
sc->sc_state &= ~LPT_OBUSY;

100
sys/dev/ic/lptvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: lptvar.h,v 1.41 1996/10/13 01:37:55 christos Exp $ */
/* $NetBSD: lptvar.h,v 1.42 1996/10/21 22:41:14 thorpej Exp $ */
/*
* Copyright (c) 1993, 1994 Charles Hannum.
@ -93,8 +93,8 @@ struct lpt_softc {
u_char *sc_cp;
int sc_spinmax;
int sc_iobase;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_irq;
u_char sc_state;
#define LPT_OPEN 0x01 /* device is open */
@ -128,36 +128,36 @@ struct cfdriver lpt_cd = {
#define LPS_INVERT (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK)
#define LPS_MASK (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK|LPS_NOPAPER)
#define NOT_READY() ((bus_io_read_1(bc, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_io_read_1(bc, ioh, lpt_status), sc)
#define NOT_READY() ((bus_space_read_1(iot, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_space_read_1(iot, ioh, lpt_status), sc)
static int not_ready __P((u_char, struct lpt_softc *));
static void lptwakeup __P((void *arg));
static int pushbytes __P((struct lpt_softc *));
int lpt_port_test __P((bus_chipset_tag_t, bus_io_handle_t, bus_io_addr_t,
bus_io_size_t, u_char, u_char));
int lpt_port_test __P((bus_space_tag_t, bus_space_handle_t, bus_addr_t,
bus_size_t, u_char, u_char));
/*
* Internal routine to lptprobe to do port tests of one byte value.
*/
int
lpt_port_test(bc, ioh, base, off, data, mask)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_addr_t base;
bus_io_size_t off;
lpt_port_test(iot, ioh, base, off, data, mask)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t base;
bus_size_t off;
u_char data, mask;
{
int timeout;
u_char temp;
data &= mask;
bus_io_write_1(bc, ioh, off, data);
bus_space_write_1(iot, ioh, off, data);
timeout = 1000;
do {
delay(10);
temp = bus_io_read_1(bc, ioh, off) & mask;
temp = bus_space_read_1(iot, ioh, off) & mask;
} while (temp != data && --timeout);
LPRINTF(("lpt: port=0x%x out=0x%x in=0x%x timeout=%d\n", base + off,
data, temp, timeout));
@ -191,8 +191,8 @@ lptprobe(parent, match, aux)
void *match, *aux;
{
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_long base;
u_char mask, data;
int i, rv;
@ -204,36 +204,36 @@ lptprobe(parent, match, aux)
#define ABORT goto out
#endif
bc = ia->ia_bc;
iot = ia->ia_iot;
base = ia->ia_iobase;
if (bus_io_map(bc, base, LPT_NPORTS, &ioh))
if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh))
return 0;
rv = 0;
mask = 0xff;
data = 0x55; /* Alternating zeros */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
data = 0xaa; /* Alternating ones */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
for (i = 0; i < CHAR_BIT; i++) { /* Walking zero */
data = ~(1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
for (i = 0; i < CHAR_BIT; i++) { /* Walking one */
data = (1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
bus_io_write_1(bc, ioh, lpt_data, 0);
bus_io_write_1(bc, ioh, lpt_control, 0);
bus_space_write_1(iot, ioh, lpt_data, 0);
bus_space_write_1(iot, ioh, lpt_control, 0);
ia->ia_iosize = LPT_NPORTS;
ia->ia_msize = 0;
@ -241,7 +241,7 @@ lptprobe(parent, match, aux)
rv = 1;
out:
bus_io_unmap(bc, ioh, LPT_NPORTS);
bus_space_unmap(iot, ioh, LPT_NPORTS);
return rv;
}
@ -252,8 +252,8 @@ lptattach(parent, self, aux)
{
struct lpt_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
if (ia->ia_irq != IRQUNK)
printf("\n");
@ -264,12 +264,12 @@ lptattach(parent, self, aux)
sc->sc_irq = ia->ia_irq;
sc->sc_state = 0;
bc = sc->sc_bc = ia->ia_bc;
if (bus_io_map(bc, sc->sc_iobase, LPT_NPORTS, &ioh))
iot = sc->sc_iot = ia->ia_iot;
if (bus_space_map(iot, sc->sc_iobase, LPT_NPORTS, 0, &ioh))
panic("lptattach: couldn't map I/O ports");
sc->sc_ioh = ioh;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
if (ia->ia_irq != IRQUNK)
sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
@ -289,8 +289,8 @@ lptopen(dev, flag, mode, p)
int unit = LPTUNIT(dev);
u_char flags = LPTFLAGS(dev);
struct lpt_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_char control;
int error;
int spin;
@ -316,17 +316,17 @@ lptopen(dev, flag, mode, p)
sc->sc_state = LPT_INIT;
sc->sc_flags = flags;
LPRINTF(("%s: open: flags=0x%x\n", sc->sc_dev.dv_xname, flags));
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
if ((flags & LPT_NOPRIME) == 0) {
/* assert INIT for 100 usec to start up printer */
bus_io_write_1(bc, ioh, lpt_control, LPC_SELECT);
bus_space_write_1(iot, ioh, lpt_control, LPC_SELECT);
delay(100);
}
control = LPC_SELECT | LPC_NINIT;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* wait till ready (printer running diagnostics) */
for (spin = 0; NOT_READY_ERR(); spin += STEP) {
@ -348,7 +348,7 @@ lptopen(dev, flag, mode, p)
if (flags & LPT_AUTOLF)
control |= LPC_AUTOLF;
sc->sc_control = control;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_inbuf = geteblk(LPT_BSIZE);
sc->sc_count = 0;
@ -408,8 +408,8 @@ lptclose(dev, flag, mode, p)
{
int unit = LPTUNIT(dev);
struct lpt_softc *sc = lpt_cd.cd_devs[unit];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (sc->sc_count)
(void) pushbytes(sc);
@ -417,9 +417,9 @@ lptclose(dev, flag, mode, p)
if ((sc->sc_flags & LPT_NOINTR) == 0)
untimeout(lptwakeup, sc);
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
sc->sc_state = 0;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
brelse(sc->sc_inbuf);
LPRINTF(("%s: closed\n", sc->sc_dev.dv_xname));
@ -430,8 +430,8 @@ int
pushbytes(sc)
struct lpt_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
if (sc->sc_flags & LPT_NOINTR) {
@ -459,10 +459,10 @@ pushbytes(sc)
break;
}
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* adapt busy-wait algorithm */
if (spin*2 + 16 < sc->sc_spinmax)
@ -529,8 +529,8 @@ lptintr(arg)
void *arg;
{
struct lpt_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
#if 0
if ((sc->sc_state & LPT_OPEN) == 0)
@ -544,10 +544,10 @@ lptintr(arg)
if (sc->sc_count) {
u_char control = sc->sc_control;
/* send char */
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_state |= LPT_OBUSY;
} else
sc->sc_state &= ~LPT_OBUSY;

6
sys/dev/ic/smc93cx6.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: smc93cx6.c,v 1.4 1996/10/13 01:37:29 christos Exp $ */
/* $NetBSD: smc93cx6.c,v 1.5 1996/10/21 22:34:38 thorpej Exp $ */
/*
* Interface for the 93C46/26/06 serial eeprom parts.
@ -94,8 +94,8 @@ read_seeprom(sd, buf, start_addr, count)
u_int start_addr;
int count;
#elif defined(__NetBSD__)
bus_io_size_t start_addr;
bus_io_size_t count;
bus_size_t start_addr;
bus_size_t count;
#endif
{
int i = 0, k = 0;

14
sys/dev/ic/smc93cx6var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: smc93cx6var.h,v 1.2 1996/07/10 22:50:50 explorer Exp $ */
/* $NetBSD: smc93cx6var.h,v 1.3 1996/10/21 22:34:41 thorpej Exp $ */
/*
* Interface to the 93C46 serial EEPROM that is used to store BIOS
@ -34,9 +34,9 @@ struct seeprom_descriptor {
#if defined(__FreeBSD__)
u_long sd_iobase;
#elif defined(__NetBSD__)
bus_chipset_tag_t sd_bc;
bus_io_handle_t sd_ioh;
bus_io_size_t sd_offset;
bus_space_tag_t sd_iot;
bus_space_handle_t sd_ioh;
bus_size_t sd_offset;
#endif
u_int16_t sd_MS;
u_int16_t sd_RDY;
@ -67,9 +67,9 @@ struct seeprom_descriptor {
#define SEEPROM_OUTB(sd, value) outb(sd->sd_iobase, value)
#elif defined(__NetBSD__)
#define SEEPROM_INB(sd) \
bus_io_read_1(sd->sd_bc, sd->sd_ioh, sd->sd_offset)
bus_space_read_1(sd->sd_iot, sd->sd_ioh, sd->sd_offset)
#define SEEPROM_OUTB(sd, value) \
bus_io_write_1(sd->sd_bc, sd->sd_ioh, sd->sd_offset, value)
bus_space_write_1(sd->sd_iot, sd->sd_ioh, sd->sd_offset, value)
#endif
#if defined(__FreeBSD__)
@ -77,5 +77,5 @@ int read_seeprom __P((struct seeprom_descriptor *sd,
u_int16_t *buf, u_int start_addr, int count));
#elif defined(__NetBSD__)
int read_seeprom __P((struct seeprom_descriptor *sd,
u_int16_t *buf, bus_io_size_t start_addr, bus_io_size_t count));
u_int16_t *buf, bus_size_t start_addr, bus_size_t count));
#endif

7
sys/dev/ic/uhavar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: uhavar.h,v 1.2 1996/09/01 00:54:42 mycroft Exp $ */
/* $NetBSD: uhavar.h,v 1.3 1996/10/21 22:34:43 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
@ -36,9 +36,10 @@
struct uha_softc {
struct device sc_dev;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_irq, sc_drq;
void *sc_ih;

118
sys/dev/isa/aha.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: aha.c,v 1.17 1996/10/13 01:37:33 christos Exp $ */
/* $NetBSD: aha.c,v 1.18 1996/10/21 22:40:14 thorpej Exp $ */
#undef AHADIAG
#ifdef DDB
@ -84,7 +84,7 @@
int aha_debug = 1;
#endif /* AHADEBUG */
int aha_cmd __P((bus_chipset_tag_t, bus_io_handle_t, struct aha_softc *, int,
int aha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct aha_softc *, int,
u_char *, int, u_char *));
integrate void aha_finish_ccbs __P((struct aha_softc *));
integrate void aha_reset_ccb __P((struct aha_softc *, struct aha_ccb *));
@ -135,7 +135,7 @@ struct cfdriver aha_cd = {
#define AHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
/*
* aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
* aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
*
* Activate Adapter command
* icnt: number of args (outbound bytes including opcode)
@ -149,9 +149,9 @@ struct cfdriver aha_cd = {
* tells it to read in a scsi command.
*/
int
aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
aha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct aha_softc *sc;
int icnt, ocnt;
u_char *ibuf, *obuf;
@ -185,7 +185,7 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
*/
if (opcode != AHA_MBO_INTR_EN) {
for (i = 20000; i; i--) { /* 1 sec? */
sts = bus_io_read_1(bc, ioh, AHA_STAT_PORT);
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
if (sts & AHA_STAT_IDLE)
break;
delay(50);
@ -201,8 +201,8 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
* queue feeding to us.
*/
if (ocnt) {
while ((bus_io_read_1(bc, ioh, AHA_STAT_PORT)) & AHA_STAT_DF)
bus_io_read_1(bc, ioh, AHA_DATA_PORT);
while ((bus_space_read_1(iot, ioh, AHA_STAT_PORT)) & AHA_STAT_DF)
bus_space_read_1(iot, ioh, AHA_DATA_PORT);
}
/*
* Output the command and the number of arguments given
@ -210,7 +210,7 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
*/
while (icnt--) {
for (i = wait; i; i--) {
sts = bus_io_read_1(bc, ioh, AHA_STAT_PORT);
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
if (!(sts & AHA_STAT_CDF))
break;
delay(50);
@ -218,10 +218,10 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
if (!i) {
if (opcode != AHA_INQUIRE_REVISION)
printf("%s: aha_cmd, cmd/data port full\n", name);
bus_io_write_1(bc, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
return (1);
}
bus_io_write_1(bc, ioh, AHA_CMD_PORT, *ibuf++);
bus_space_write_1(iot, ioh, AHA_CMD_PORT, *ibuf++);
}
/*
* If we expect input, loop that many times, each time,
@ -229,7 +229,7 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
*/
while (ocnt--) {
for (i = wait; i; i--) {
sts = bus_io_read_1(bc, ioh, AHA_STAT_PORT);
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
if (sts & AHA_STAT_DF)
break;
delay(50);
@ -238,10 +238,10 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
if (opcode != AHA_INQUIRE_REVISION)
printf("%s: aha_cmd, cmd/data port empty %d\n",
name, ocnt);
bus_io_write_1(bc, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_SRST);
return (1);
}
*obuf++ = bus_io_read_1(bc, ioh, AHA_DATA_PORT);
*obuf++ = bus_space_read_1(iot, ioh, AHA_DATA_PORT);
}
/*
* Wait for the board to report a finished instruction.
@ -250,7 +250,7 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
*/
if (opcode != AHA_MBO_INTR_EN) {
for (i = 20000; i; i--) { /* 1 sec? */
sts = bus_io_read_1(bc, ioh, AHA_INTR_PORT);
sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT);
/* XXX Need to save this in the interrupt handler? */
if (sts & AHA_INTR_HACC)
break;
@ -262,7 +262,7 @@ aha_cmd(bc, ioh, sc, icnt, ibuf, ocnt, obuf)
return (1);
}
}
bus_io_write_1(bc, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
return (0);
}
@ -279,16 +279,16 @@ aha_isa_probe(parent, match, aux)
{
struct isa_attach_args *ia = aux;
struct aha_softc sc;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int rv;
if (bus_io_map(bc, ia->ia_iobase, AHA_ISA_IOSIZE, &ioh))
if (bus_space_map(iot, ia->ia_iobase, AHA_ISA_IOSIZE, 0, &ioh))
return (0);
rv = aha_find(bc, ioh, &sc);
rv = aha_find(iot, ioh, &sc);
bus_io_unmap(bc, ioh, AHA_ISA_IOSIZE);
bus_space_unmap(iot, ioh, AHA_ISA_IOSIZE);
if (rv) {
if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq)
@ -313,18 +313,18 @@ aha_isa_attach(parent, self, aux)
{
struct isa_attach_args *ia = aux;
struct aha_softc *sc = (void *)self;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
isa_chipset_tag_t ic = ia->ia_ic;
printf("\n");
if (bus_io_map(bc, ia->ia_iobase, AHA_ISA_IOSIZE, &ioh))
panic("aha_attach: bus_io_map failed!");
if (bus_space_map(iot, ia->ia_iobase, AHA_ISA_IOSIZE, 0, &ioh))
panic("aha_attach: bus_space_map failed!");
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
if (!aha_find(bc, ioh, sc))
if (!aha_find(iot, ioh, sc))
panic("aha_attach: aha_find failed!");
if (sc->sc_drq != -1)
@ -462,8 +462,8 @@ aha_intr(arg)
void *arg;
{
struct aha_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_char sts;
#ifdef AHADEBUG
@ -474,10 +474,10 @@ aha_intr(arg)
* First acknowlege the interrupt, Then if it's not telling about
* a completed operation just return.
*/
sts = bus_io_read_1(bc, ioh, AHA_INTR_PORT);
sts = bus_space_read_1(iot, ioh, AHA_INTR_PORT);
if ((sts & AHA_INTR_ANYINTR) == 0)
return (0);
bus_io_write_1(bc, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_IRST);
#ifdef AHADIAG
/* Make sure we clear CCB_SENDING before finishing a CCB. */
@ -490,7 +490,7 @@ aha_intr(arg)
toggle.cmd.opcode = AHA_MBO_INTR_EN;
toggle.cmd.enable = 0;
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(toggle.cmd), (u_char *)&toggle.cmd,
0, (u_char *)0);
aha_start_ccbs(sc);
@ -675,8 +675,8 @@ void
aha_start_ccbs(sc)
struct aha_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct aha_mbx_out *wmbo; /* Mail Box Out pointer */
struct aha_ccb *ccb;
@ -690,7 +690,7 @@ aha_start_ccbs(sc)
toggle.cmd.opcode = AHA_MBO_INTR_EN;
toggle.cmd.enable = 1;
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(toggle.cmd), (u_char *)&toggle.cmd,
0, (u_char *)0);
break;
@ -710,7 +710,7 @@ aha_start_ccbs(sc)
wmbo->cmd = AHA_MBO_START;
/* Tell the card to poll immediately. */
bus_io_write_1(bc, ioh, AHA_CMD_PORT, AHA_START_SCSI);
bus_space_write_1(iot, ioh, AHA_CMD_PORT, AHA_START_SCSI);
if ((ccb->xs->flags & SCSI_POLL) == 0)
timeout(aha_timeout, ccb, (ccb->timeout * hz) / 1000);
@ -794,9 +794,9 @@ aha_done(sc, ccb)
* Find the board and find its irq/drq
*/
int
aha_find(bc, ioh, sc)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
aha_find(iot, ioh, sc)
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct aha_softc *sc;
{
int i;
@ -809,11 +809,11 @@ aha_find(bc, ioh, sc)
* that it's not there.. good for the probe
*/
bus_io_write_1(bc, ioh, AHA_CTRL_PORT, AHA_CTRL_HRST | AHA_CTRL_SRST);
bus_space_write_1(iot, ioh, AHA_CTRL_PORT, AHA_CTRL_HRST | AHA_CTRL_SRST);
delay(100);
for (i = AHA_RESET_TIMEOUT; i; i--) {
sts = bus_io_read_1(bc, ioh, AHA_STAT_PORT);
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT))
break;
delay(1000); /* calibrated in msec */
@ -832,7 +832,7 @@ aha_find(bc, ioh, sc)
*/
delay(1000); /* for Bustek 545 */
config.cmd.opcode = AHA_INQUIRE_CONFIG;
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(config.cmd), (u_char *)&config.cmd,
sizeof(config.reply), (u_char *)&config.reply);
switch (config.reply.chan) {
@ -896,8 +896,8 @@ void
aha_init(sc)
struct aha_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct aha_devices devices;
struct aha_setup setup;
struct aha_mailbox mailbox;
@ -916,7 +916,7 @@ aha_init(sc)
printf("%s: unlocking mailbox interface\n", sc->sc_dev.dv_xname);
extbios.cmd.opcode = AHA_EXT_BIOS;
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(extbios.cmd), (u_char *)&extbios.cmd,
sizeof(extbios.reply), (u_char *)&extbios.reply);
@ -929,7 +929,7 @@ aha_init(sc)
unlock.cmd.opcode = AHA_MBX_ENABLE;
unlock.cmd.junk = 0;
unlock.cmd.magic = extbios.reply.mailboxlock;
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(unlock.cmd), (u_char *)&unlock.cmd,
0, (u_char *)0);
}
@ -938,20 +938,20 @@ aha_init(sc)
/*
* Change the bus on/off times to not clash with other dma users.
*/
aha_cmd(bc, ioh, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7);
aha_cmd(bc, ioh, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4);
aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7);
aha_cmd(iot, ioh, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4);
#endif
/* Inquire Installed Devices (to force synchronous negotiation). */
devices.cmd.opcode = AHA_INQUIRE_DEVICES;
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(devices.cmd), (u_char *)&devices.cmd,
sizeof(devices.reply), (u_char *)&devices.reply);
/* Obtain setup information from. */
setup.cmd.opcode = AHA_INQUIRE_SETUP;
setup.cmd.len = sizeof(setup.reply);
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(setup.cmd), (u_char *)&setup.cmd,
sizeof(setup.reply), (u_char *)&setup.reply);
@ -984,7 +984,7 @@ aha_init(sc)
mailbox.cmd.opcode = AHA_MBX_INIT;
mailbox.cmd.nmbx = AHA_MBX_SIZE;
ltophys(KVTOPHYS(wmbx), mailbox.cmd.addr);
aha_cmd(bc, ioh, sc,
aha_cmd(iot, ioh, sc,
sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
0, (u_char *)0);
}
@ -993,8 +993,8 @@ void
aha_inquire_setup_information(sc)
struct aha_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct aha_revision revision;
u_char sts;
int i;
@ -1009,7 +1009,7 @@ aha_inquire_setup_information(sc)
* clone, and skip the board-specific stuff.
*/
revision.cmd.opcode = AHA_INQUIRE_REVISION;
if (aha_cmd(bc, ioh, sc,
if (aha_cmd(iot, ioh, sc,
sizeof(revision.cmd), (u_char *)&revision.cmd,
sizeof(revision.reply), (u_char *)&revision.reply)) {
/*
@ -1017,7 +1017,7 @@ aha_inquire_setup_information(sc)
* even need to bother here.
*/
for (i = AHA_RESET_TIMEOUT; i; i--) {
sts = bus_io_read_1(bc, ioh, AHA_STAT_PORT);
sts = bus_space_read_1(iot, ioh, AHA_STAT_PORT);
if (sts == (AHA_STAT_IDLE | AHA_STAT_INIT))
break;
delay(1000);
@ -1273,8 +1273,8 @@ aha_poll(sc, xs, count)
struct scsi_xfer *xs;
int count;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
/* timeouts are in msec, so we loop in 1000 usec cycles */
while (count) {
@ -1282,7 +1282,7 @@ aha_poll(sc, xs, count)
* If we had interrupts enabled, would we
* have got an interrupt?
*/
if (bus_io_read_1(bc, ioh, AHA_INTR_PORT) & AHA_INTR_ANYINTR)
if (bus_space_read_1(iot, ioh, AHA_INTR_PORT) & AHA_INTR_ANYINTR)
aha_intr(sc);
if (xs->flags & ITSDONE)
return (0);

9
sys/dev/isa/ahavar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: ahavar.h,v 1.1 1996/09/07 12:12:19 mycroft Exp $ */
/* $NetBSD: ahavar.h,v 1.2 1996/10/21 22:40:20 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
@ -56,9 +56,9 @@ struct aha_mbx {
struct aha_softc {
struct device sc_dev;
bus_chipset_tag_t sc_bc;
bus_space_tag_t sc_iot;
bus_io_handle_t sc_ioh;
bus_space_handle_t sc_ioh;
int sc_irq, sc_drq;
void *sc_ih;
@ -74,6 +74,7 @@ struct aha_softc {
struct scsi_link sc_link; /* prototype for devs */
};
int aha_find __P((bus_chipset_tag_t, bus_io_handle_t, struct aha_softc *));
int aha_find __P((bus_space_tag_t, bus_space_handle_t,
struct aha_softc *));
void aha_attach __P((struct aha_softc *));
int aha_intr __P((void *));

38
sys/dev/isa/ast.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ast.c,v 1.31 1996/10/13 01:37:36 christos Exp $ */
/* $NetBSD: ast.c,v 1.32 1996/10/21 22:40:23 thorpej Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -51,12 +51,12 @@ struct ast_softc {
struct device sc_dev;
void *sc_ih;
bus_chipset_tag_t sc_bc;
bus_space_tag_t sc_iot;
int sc_iobase;
int sc_alive; /* mask of slave units attached */
void *sc_slaves[NSLAVES]; /* com device unit numbers */
bus_io_handle_t sc_slaveioh[NSLAVES];
bus_space_handle_t sc_slaveioh[NSLAVES];
};
int astprobe __P((struct device *, void *, void *));
@ -80,8 +80,8 @@ astprobe(parent, self, aux)
{
struct isa_attach_args *ia = aux;
int iobase = ia->ia_iobase;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int i, rv = 1;
/*
@ -95,12 +95,12 @@ astprobe(parent, self, aux)
if (iobase == comconsaddr && !comconsattached)
goto checkmappings;
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
rv = comprobe1(bc, ioh, iobase);
bus_io_unmap(bc, ioh, COM_NPORTS);
rv = comprobe1(iot, ioh, iobase);
bus_space_unmap(iot, ioh, COM_NPORTS);
if (rv == 0)
goto out;
@ -111,11 +111,11 @@ checkmappings:
if (iobase == comconsaddr && !comconsattached)
continue;
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
bus_io_unmap(bc, ioh, COM_NPORTS);
bus_space_unmap(iot, ioh, COM_NPORTS);
}
out:
@ -145,27 +145,27 @@ astattach(parent, self, aux)
struct ast_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
struct commulti_attach_args ca;
bus_chipset_tag_t bc = ia->ia_bc;
bus_space_tag_t iot = ia->ia_iot;
int i;
sc->sc_bc = ia->ia_bc;
sc->sc_iot = ia->ia_iot;
sc->sc_iobase = ia->ia_iobase;
for (i = 0; i < NSLAVES; i++)
if (bus_io_map(bc, sc->sc_iobase + i * COM_NPORTS, COM_NPORTS,
&sc->sc_slaveioh[i]))
if (bus_space_map(iot, sc->sc_iobase + i * COM_NPORTS,
COM_NPORTS, 0, &sc->sc_slaveioh[i]))
panic("astattach: couldn't map slave %d", i);
/*
* Enable the master interrupt.
*/
bus_io_write_1(bc, sc->sc_slaveioh[3], 7, 0x80);
bus_space_write_1(iot, sc->sc_slaveioh[3], 7, 0x80);
printf("\n");
for (i = 0; i < NSLAVES; i++) {
ca.ca_slave = i;
ca.ca_bc = sc->sc_bc;
ca.ca_iot = sc->sc_iot;
ca.ca_ioh = sc->sc_slaveioh[i];
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
ca.ca_noien = 1;
@ -184,11 +184,11 @@ astintr(arg)
void *arg;
{
struct ast_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_space_tag_t iot = sc->sc_iot;
int alive = sc->sc_alive;
int bits;
bits = ~bus_io_read_1(bc, sc->sc_slaveioh[3], 7) & alive;
bits = ~bus_space_read_1(iot, sc->sc_slaveioh[3], 7) & alive;
if (bits == 0)
return (0);
@ -201,7 +201,7 @@ astintr(arg)
TRY(2);
TRY(3);
#undef TRY
bits = ~bus_io_read_1(bc, sc->sc_slaveioh[3], 7) & alive;
bits = ~bus_space_read_1(iot, sc->sc_slaveioh[3], 7) & alive;
if (bits == 0)
return (1);
}

24
sys/dev/isa/bha_isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: bha_isa.c,v 1.4 1996/10/13 01:37:36 christos Exp $ */
/* $NetBSD: bha_isa.c,v 1.5 1996/10/21 22:40:26 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
@ -67,16 +67,16 @@ bha_isa_probe(parent, match, aux)
{
struct isa_attach_args *ia = aux;
struct bha_softc sc;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int rv;
if (bus_io_map(bc, ia->ia_iobase, BHA_ISA_IOSIZE, &ioh))
if (bus_space_map(iot, ia->ia_iobase, BHA_ISA_IOSIZE, 0, &ioh))
return (0);
rv = bha_find(bc, ioh, &sc);
rv = bha_find(iot, ioh, &sc);
bus_io_unmap(bc, ioh, BHA_ISA_IOSIZE);
bus_space_unmap(iot, ioh, BHA_ISA_IOSIZE);
if (rv) {
if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq)
@ -101,18 +101,18 @@ bha_isa_attach(parent, self, aux)
{
struct isa_attach_args *ia = aux;
struct bha_softc *sc = (void *)self;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
isa_chipset_tag_t ic = ia->ia_ic;
printf("\n");
if (bus_io_map(bc, ia->ia_iobase, BHA_ISA_IOSIZE, &ioh))
panic("bha_attach: bus_io_map failed!");
if (bus_space_map(iot, ia->ia_iobase, BHA_ISA_IOSIZE, 0, &ioh))
panic("bha_attach: bus_space_map failed!");
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
if (!bha_find(bc, ioh, sc))
if (!bha_find(iot, ioh, sc))
panic("bha_attach: bha_find failed!");
if (sc->sc_drq != -1)

36
sys/dev/isa/boca.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: boca.c,v 1.18 1996/10/13 01:37:37 christos Exp $ */
/* $NetBSD: boca.c,v 1.19 1996/10/21 22:40:28 thorpej Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -51,12 +51,12 @@ struct boca_softc {
struct device sc_dev;
void *sc_ih;
bus_chipset_tag_t sc_bc;
bus_space_tag_t sc_iot;
int sc_iobase;
int sc_alive; /* mask of slave units attached */
void *sc_slaves[NSLAVES]; /* com device unit numbers */
bus_io_handle_t sc_slaveioh[NSLAVES];
bus_space_handle_t sc_slaveioh[NSLAVES];
};
int bocaprobe __P((struct device *, void *, void *));
@ -80,8 +80,8 @@ bocaprobe(parent, self, aux)
{
struct isa_attach_args *ia = aux;
int iobase = ia->ia_iobase;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int i, rv = 1;
/*
@ -95,12 +95,12 @@ bocaprobe(parent, self, aux)
if (iobase == comconsaddr && !comconsattached)
goto checkmappings;
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
rv = comprobe1(bc, ioh, iobase);
bus_io_unmap(bc, ioh, COM_NPORTS);
rv = comprobe1(iot, ioh, iobase);
bus_space_unmap(iot, ioh, COM_NPORTS);
if (rv == 0)
goto out;
@ -111,11 +111,11 @@ checkmappings:
if (iobase == comconsaddr && !comconsattached)
continue;
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
bus_io_unmap(bc, ioh, COM_NPORTS);
bus_space_unmap(iot, ioh, COM_NPORTS);
}
out:
@ -145,15 +145,15 @@ bocaattach(parent, self, aux)
struct boca_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
struct commulti_attach_args ca;
bus_chipset_tag_t bc = ia->ia_bc;
bus_space_tag_t iot = ia->ia_iot;
int i;
sc->sc_bc = ia->ia_bc;
sc->sc_iot = ia->ia_iot;
sc->sc_iobase = ia->ia_iobase;
for (i = 0; i < NSLAVES; i++)
if (bus_io_map(bc, sc->sc_iobase + i * COM_NPORTS, COM_NPORTS,
&sc->sc_slaveioh[i]))
if (bus_space_map(iot, sc->sc_iobase + i * COM_NPORTS,
COM_NPORTS, 0, &sc->sc_slaveioh[i]))
panic("bocaattach: couldn't map slave %d", i);
printf("\n");
@ -161,7 +161,7 @@ bocaattach(parent, self, aux)
for (i = 0; i < NSLAVES; i++) {
ca.ca_slave = i;
ca.ca_bc = sc->sc_bc;
ca.ca_iot = sc->sc_iot;
ca.ca_ioh = sc->sc_slaveioh[i];
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
ca.ca_noien = 0;
@ -180,11 +180,11 @@ bocaintr(arg)
void *arg;
{
struct boca_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_space_tag_t iot = sc->sc_iot;
int alive = sc->sc_alive;
int bits;
bits = bus_io_read_1(bc, sc->sc_slaveioh[0], 7) & alive;
bits = bus_space_read_1(iot, sc->sc_slaveioh[0], 7) & alive;
if (bits == 0)
return (0);
@ -201,7 +201,7 @@ bocaintr(arg)
TRY(6);
TRY(7);
#undef TRY
bits = bus_io_read_1(bc, sc->sc_slaveioh[0], 7) & alive;
bits = bus_space_read_1(iot, sc->sc_slaveioh[0], 7) & alive;
if (bits == 0)
return (1);
}

296
sys/dev/isa/com.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: com.c,v 1.90 1996/10/13 01:37:38 christos Exp $ */
/* $NetBSD: com.c,v 1.91 1996/10/21 22:40:30 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995, 1996
@ -91,9 +91,9 @@ struct com_softc {
int sc_hayespbase;
#endif
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_io_handle_t sc_hayespioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
bus_space_handle_t sc_hayespioh;
u_char sc_hwflags;
#define COM_HW_NOIEN 0x01
@ -113,7 +113,7 @@ struct com_softc {
};
#ifdef COM_HAYESP
int comprobeHAYESP __P((bus_io_handle_t hayespioh, struct com_softc *sc));
int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
#endif
void comdiag __P((void *));
int comspeed __P((long));
@ -157,7 +157,7 @@ struct cfdriver com_cd = {
NULL, "com", DV_TTY
};
void cominit __P((bus_chipset_tag_t, bus_io_handle_t, int));
void cominit __P((bus_space_tag_t, bus_space_handle_t, int));
#ifdef COMCONSOLE
int comdefaultrate = CONSPEED; /* XXX why set default? */
@ -167,8 +167,8 @@ int comdefaultrate = TTYDEF_SPEED;
int comconsaddr;
int comconsinit;
int comconsattached;
bus_chipset_tag_t comconsbc;
bus_io_handle_t comconsioh;
bus_space_tag_t comconstag;
bus_space_handle_t comconsbah;
tcflag_t comconscflag = TTYDEF_CFLAG;
int commajor;
@ -215,16 +215,16 @@ comspeed(speed)
}
int
comprobe1(bc, ioh, iobase)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
comprobe1(iot, ioh, iobase)
bus_space_tag_t iot;
bus_space_handle_t ioh;
int iobase;
{
/* force access to id reg */
bus_io_write_1(bc, ioh, com_lcr, 0);
bus_io_write_1(bc, ioh, com_iir, 0);
if (bus_io_read_1(bc, ioh, com_iir) & 0x38)
bus_space_write_1(iot, ioh, com_lcr, 0);
bus_space_write_1(iot, ioh, com_iir, 0);
if (bus_space_read_1(iot, ioh, com_iir) & 0x38)
return 0;
return 1;
@ -233,12 +233,12 @@ comprobe1(bc, ioh, iobase)
#ifdef COM_HAYESP
int
comprobeHAYESP(hayespioh, sc)
bus_io_handle_t hayespioh;
bus_space_handle_t hayespioh;
struct com_softc *sc;
{
char val, dips;
int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
bus_chipset_tag_t bc = sc->sc_bc;
bus_space_tag_t iot = sc->sc_iot;
/*
* Hayes ESP cards have two iobases. One is for compatibility with
@ -248,7 +248,7 @@ comprobeHAYESP(hayespioh, sc)
*/
/* Test for ESP signature */
if ((bus_io_read_1(bc, hayespioh, 0) & 0xf3) == 0)
if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0)
return 0;
/*
@ -256,8 +256,8 @@ comprobeHAYESP(hayespioh, sc)
*/
/* Get the dip-switch configurations */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
dips = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1);
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1);
/* Determine which com port this ESP card services: bits 0,1 of */
/* dips is the port # (0-3); combaselist[val] is the com_iobase */
@ -268,9 +268,9 @@ comprobeHAYESP(hayespioh, sc)
/* Check ESP Self Test bits. */
/* Check for ESP version 2.0: bits 4,5,6 == 010 */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */
val = bus_io_read_1(bc, hayespioh, HAYESP_STATUS2);
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg 1 */
val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);
if ((val & 0x70) < 0x20) {
printf("-old (%o)", val & 0x70);
/* we do not support the necessary features */
@ -300,8 +300,8 @@ comprobe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int iobase, needioh;
int rv = 1;
@ -314,7 +314,7 @@ comprobe(parent, match, aux)
if (!strcmp(parent->dv_cfdata->cf_driver->cd_name, "isa")) {
struct isa_attach_args *ia = aux;
bc = ia->ia_bc;
iot = ia->ia_iot;
iobase = ia->ia_iobase;
needioh = 1;
} else
@ -327,7 +327,7 @@ comprobe(parent, match, aux)
if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ca->ca_slave)
return (0);
bc = ca->ca_bc;
iot = ca->ca_iot;
iobase = ca->ca_iobase;
ioh = ca->ca_ioh;
needioh = 0;
@ -339,13 +339,13 @@ comprobe(parent, match, aux)
if (iobase == comconsaddr && !comconsattached)
goto out;
if (needioh && bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (needioh && bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
rv = comprobe1(bc, ioh, iobase);
rv = comprobe1(iot, ioh, iobase);
if (needioh)
bus_io_unmap(bc, ioh, COM_NPORTS);
bus_space_unmap(iot, ioh, COM_NPORTS);
out:
#if NCOM_ISA
@ -366,8 +366,8 @@ comattach(parent, self, aux)
{
struct com_softc *sc = (void *)self;
int iobase, irq;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
#ifdef COM_HAYESP
int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
int *hayespp;
@ -388,12 +388,12 @@ comattach(parent, self, aux)
* We're living on an isa.
*/
iobase = ia->ia_iobase;
bc = ia->ia_bc;
iot = ia->ia_iot;
if (iobase != comconsaddr) {
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh))
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh))
panic("comattach: io mapping failed");
} else
ioh = comconsioh;
ioh = comconsbah;
irq = ia->ia_irq;
} else
#endif
@ -405,7 +405,7 @@ comattach(parent, self, aux)
* We're living on a commulti.
*/
iobase = ca->ca_iobase;
bc = ca->ca_bc;
iot = ca->ca_iot;
ioh = ca->ca_ioh;
irq = IRQUNK;
@ -415,7 +415,7 @@ comattach(parent, self, aux)
#endif
panic("comattach: impossible");
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
sc->sc_iobase = iobase;
@ -435,42 +435,42 @@ comattach(parent, self, aux)
#ifdef COM_HAYESP
/* Look for a Hayes ESP board. */
for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) {
bus_io_handle_t hayespioh;
bus_space_handle_t hayespioh;
#define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */
if (bus_io_map(bc, *hayespp, HAYESP_NPORTS, &hayespioh))
if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, &hayespioh))
continue;
if (comprobeHAYESP(hayespioh, sc)) {
sc->sc_hayespbase = *hayespp;
sc->sc_hayespioh = hayespioh;
break;
}
bus_io_unmap(bc, hayespioh, HAYESP_NPORTS);
bus_space_unmap(iot, hayespioh, HAYESP_NPORTS);
}
/* No ESP; look for other things. */
if (*hayespp == 0) {
#endif
/* look for a NS 16550AF UART with FIFOs */
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
delay(100);
if (ISSET(bus_io_read_1(bc, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
if (ISSET(bus_io_read_1(bc, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) == IIR_FIFO_MASK)
if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) == FIFO_TRIGGER_14) {
SET(sc->sc_hwflags, COM_HW_FIFO);
printf(": ns16550a, working fifo\n");
} else
printf(": ns16550, broken fifo\n");
else
printf(": ns8250 or ns16450, no fifo\n");
bus_io_write_1(bc, ioh, com_fifo, 0);
bus_space_write_1(iot, ioh, com_fifo, 0);
#ifdef COM_HAYESP
}
#endif
/* disable interrupts */
bus_io_write_1(bc, ioh, com_ier, 0);
bus_io_write_1(bc, ioh, com_mcr, 0);
bus_space_write_1(iot, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_mcr, 0);
if (irq != IRQUNK) {
#if NCOM_ISA
@ -489,7 +489,7 @@ comattach(parent, self, aux)
if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
kgdb_dev = -1; /* can't debug over console port */
else {
cominit(bc, ioh, kgdb_rate);
cominit(iot, ioh, kgdb_rate);
if (kgdb_debug_init) {
/*
* Print prefix of device name,
@ -517,8 +517,8 @@ comopen(dev, flag, mode, p)
{
int unit = COMUNIT(dev);
struct com_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct tty *tp;
int s;
int error = 0;
@ -568,57 +568,57 @@ comopen(dev, flag, mode, p)
sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
#ifdef COM_HAYESP
/* Setup the ESP board */
if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
bus_io_handle_t hayespioh = sc->sc_hayespioh;
bus_space_handle_t hayespioh = sc->sc_hayespioh;
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_DMA_MODE|FIFO_ENABLE|
FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_8);
/* Set 16550 compatibility mode */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETMODE);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETMODE);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
HAYESP_MODE_SCALE);
/* Set RTS/CTS flow control */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS);
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETFLOWTYPE);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_RTS);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2, HAYESP_FLOW_CTS);
/* Set flow control levels */
bus_io_write_1(bc, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW);
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_SETRXFLOW);
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_HIBYTE(HAYESP_RXHIWMARK));
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_LOBYTE(HAYESP_RXHIWMARK));
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_HIBYTE(HAYESP_RXLOWMARK));
bus_io_write_1(bc, hayespioh, HAYESP_CMD2,
bus_space_write_1(iot, hayespioh, HAYESP_CMD2,
HAYESP_LOBYTE(HAYESP_RXLOWMARK));
} else
#endif
if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
/* Set the FIFO threshold based on the receive speed. */
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
(tp->t_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
/* flush any pending I/O */
while (ISSET(bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY))
(void) bus_io_read_1(bc, ioh, com_data);
while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
(void) bus_space_read_1(iot, ioh, com_data);
/* you turn me on, baby */
sc->sc_mcr = MCR_DTR | MCR_RTS;
if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
SET(sc->sc_mcr, MCR_IENABLE);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc->sc_msr = bus_io_read_1(bc, ioh, com_msr);
sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) ||
ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
SET(tp->t_state, TS_CARR_ON);
@ -657,8 +657,8 @@ comclose(dev, flag, mode, p)
int unit = COMUNIT(dev);
struct com_softc *sc = com_cd.cd_devs[unit];
struct tty *tp = sc->sc_tty;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int s;
/* XXX This is for cons.c. */
@ -668,13 +668,14 @@ comclose(dev, flag, mode, p)
(*linesw[tp->t_line].l_close)(tp, flag);
s = spltty();
CLR(sc->sc_lcr, LCR_SBREAK);
bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr);
bus_io_write_1(bc, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_ier, 0);
if (ISSET(tp->t_cflag, HUPCL) &&
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
/* XXX perhaps only clear DTR */
bus_io_write_1(bc, ioh, com_mcr, 0);
bus_io_write_1(bc, ioh, com_fifo, FIFO_RCV_RST | FIFO_XMT_RST);
bus_space_write_1(iot, ioh, com_mcr, 0);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_RCV_RST | FIFO_XMT_RST);
}
CLR(tp->t_state, TS_BUSY | TS_FLUSH);
if (--comsopen == 0)
@ -748,8 +749,8 @@ comioctl(dev, cmd, data, flag, p)
int unit = COMUNIT(dev);
struct com_softc *sc = com_cd.cd_devs[unit];
struct tty *tp = sc->sc_tty;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
@ -762,29 +763,29 @@ comioctl(dev, cmd, data, flag, p)
switch (cmd) {
case TIOCSBRK:
SET(sc->sc_lcr, LCR_SBREAK);
bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
break;
case TIOCCBRK:
CLR(sc->sc_lcr, LCR_SBREAK);
bus_io_write_1(bc, ioh, com_lcr, sc->sc_lcr);
bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
break;
case TIOCSDTR:
SET(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCCDTR:
CLR(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCMSET:
CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
case TIOCMBIS:
SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCMBIC:
CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
break;
case TIOCMGET: {
u_char m;
@ -804,7 +805,7 @@ comioctl(dev, cmd, data, flag, p)
SET(bits, TIOCM_DSR);
if (ISSET(m, MSR_RI | MSR_TERI))
SET(bits, TIOCM_RI);
if (bus_io_read_1(bc, ioh, com_ier))
if (bus_space_read_1(iot, ioh, com_ier))
SET(bits, TIOCM_LE);
*(int *)data = bits;
break;
@ -859,8 +860,8 @@ comparam(tp, t)
struct termios *t;
{
struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int ospeed = comspeed(t->c_ospeed);
u_char lcr;
tcflag_t oldcflag;
@ -900,7 +901,7 @@ comparam(tp, t)
if (ospeed == 0) {
CLR(sc->sc_mcr, MCR_DTR);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
/*
@ -935,34 +936,34 @@ comparam(tp, t)
}
}
bus_io_write_1(bc, ioh, com_lcr, lcr | LCR_DLAB);
bus_io_write_1(bc, ioh, com_dlbl, ospeed);
bus_io_write_1(bc, ioh, com_dlbh, ospeed >> 8);
bus_io_write_1(bc, ioh, com_lcr, lcr);
bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
bus_space_write_1(iot, ioh, com_dlbl, ospeed);
bus_space_write_1(iot, ioh, com_dlbh, ospeed >> 8);
bus_space_write_1(iot, ioh, com_lcr, lcr);
SET(sc->sc_mcr, MCR_DTR);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
} else
bus_io_write_1(bc, ioh, com_lcr, lcr);
bus_space_write_1(iot, ioh, com_lcr, lcr);
if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) &&
ISSET(sc->sc_hwflags, COM_HW_FIFO))
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE |
(t->c_ispeed <= 1200 ? FIFO_TRIGGER_1 : FIFO_TRIGGER_8));
} else
bus_io_write_1(bc, ioh, com_lcr, lcr);
bus_space_write_1(iot, ioh, com_lcr, lcr);
/* When not using CRTSCTS, RTS follows DTR. */
if (!ISSET(t->c_cflag, CRTSCTS)) {
if (ISSET(sc->sc_mcr, MCR_DTR)) {
if (!ISSET(sc->sc_mcr, MCR_RTS)) {
SET(sc->sc_mcr, MCR_RTS);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
} else {
if (ISSET(sc->sc_mcr, MCR_RTS)) {
CLR(sc->sc_mcr, MCR_RTS);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
}
sc->sc_dtr = MCR_DTR | MCR_RTS;
@ -984,7 +985,7 @@ comparam(tp, t)
ISSET(oldcflag, MDMBUF) != ISSET(tp->t_cflag, MDMBUF) &&
(*linesw[tp->t_line].l_modem)(tp, 0) == 0) {
CLR(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
/* Just to be sure... */
@ -998,8 +999,8 @@ comstart(tp)
struct tty *tp;
{
struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int s;
s = spltty();
@ -1023,14 +1024,14 @@ comstart(tp)
if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
SET(sc->sc_ier, IER_ETXRDY);
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
}
#ifdef COM_HAYESP
if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
u_char buffer[1024], *cp = buffer;
int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
do
bus_io_write_1(bc, ioh, com_data, *cp++);
bus_space_write_1(iot, ioh, com_data, *cp++);
while (--n);
}
else
@ -1039,17 +1040,17 @@ comstart(tp)
u_char buffer[16], *cp = buffer;
int n = q_to_b(&tp->t_outq, cp, sizeof buffer);
do {
bus_io_write_1(bc, ioh, com_data, *cp++);
bus_space_write_1(iot, ioh, com_data, *cp++);
} while (--n);
} else
bus_io_write_1(bc, ioh, com_data, getc(&tp->t_outq));
bus_space_write_1(iot, ioh, com_data, getc(&tp->t_outq));
out:
splx(s);
return;
stopped:
if (ISSET(sc->sc_ier, IER_ETXRDY)) {
CLR(sc->sc_ier, IER_ETXRDY);
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
}
splx(s);
}
@ -1153,7 +1154,7 @@ comsoft(arg)
!ISSET(sc->sc_mcr, MCR_RTS)) {
/* XXX */
SET(sc->sc_mcr, MCR_RTS);
bus_io_write_1(sc->sc_bc, sc->sc_ioh, com_mcr,
bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr,
sc->sc_mcr);
}
@ -1181,8 +1182,8 @@ comintr(arg)
void *arg;
{
struct com_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct tty *tp;
u_char iir, lsr, data, msr, delta;
#ifdef COM_DEBUG
@ -1196,7 +1197,7 @@ comintr(arg)
n = 0;
iter[n].iir =
#endif
iir = bus_io_read_1(bc, ioh, com_iir);
iir = bus_space_read_1(iot, ioh, com_iir);
if (ISSET(iir, IIR_NOPEND))
return (0);
@ -1206,14 +1207,14 @@ comintr(arg)
#ifdef COM_DEBUG
iter[n].lsr =
#endif
lsr = bus_io_read_1(bc, ioh, com_lsr);
lsr = bus_space_read_1(iot, ioh, com_lsr);
if (ISSET(lsr, LSR_RXRDY)) {
register u_char *p = sc->sc_ibufp;
comevents = 1;
do {
data = bus_io_read_1(bc, ioh, com_data);
data = bus_space_read_1(iot, ioh, com_data);
if (ISSET(lsr, LSR_BI)) {
#ifdef notdef
printf("break %02x %02x %02x %02x\n",
@ -1239,7 +1240,7 @@ comintr(arg)
ISSET(tp->t_cflag, CRTSCTS)) {
/* XXX */
CLR(sc->sc_mcr, MCR_RTS);
bus_io_write_1(bc, ioh,
bus_space_write_1(iot, ioh,
com_mcr, sc->sc_mcr);
}
}
@ -1251,7 +1252,7 @@ comintr(arg)
goto ohfudge;
iter[n].lsr =
#endif
lsr = bus_io_read_1(bc, ioh, com_lsr);
lsr = bus_space_read_1(iot, ioh, com_lsr);
} while (ISSET(lsr, LSR_RXRDY));
sc->sc_ibufp = p;
@ -1264,9 +1265,10 @@ comintr(arg)
sc->sc_failures++;
if (sc->sc_errors++ == 0)
timeout(comdiag, sc, 60 * hz);
bus_io_write_1(bc, ioh, com_ier, 0);
bus_space_write_1(iot, ioh, com_ier, 0);
delay(10);
bus_io_write_1(bc, ioh, com_ier, sc->sc_ier);
bus_space_write_1(iot, ioh, com_ier,
sc->sc_ier);
iir = IIR_NOPEND;
continue;
}
@ -1275,7 +1277,7 @@ comintr(arg)
#ifdef COM_DEBUG
iter[n].msr =
#endif
msr = bus_io_read_1(bc, ioh, com_msr);
msr = bus_space_read_1(iot, ioh, com_msr);
if (msr != sc->sc_msr) {
delta = msr ^ sc->sc_msr;
@ -1284,7 +1286,7 @@ comintr(arg)
!ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
(*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)) == 0) {
CLR(sc->sc_mcr, sc->sc_dtr);
bus_io_write_1(bc, ioh, com_mcr, sc->sc_mcr);
bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
}
if (ISSET(delta & msr, MSR_CTS) &&
ISSET(tp->t_cflag, CRTSCTS)) {
@ -1305,7 +1307,7 @@ comintr(arg)
goto ohfudge;
iter[n].iir =
#endif
iir = bus_io_read_1(bc, ioh, com_iir);
iir = bus_space_read_1(iot, ioh, com_iir);
if (ISSET(iir, IIR_NOPEND))
return (1);
}
@ -1337,16 +1339,16 @@ comcnprobe(cp)
struct consdev *cp;
{
/* XXX NEEDS TO BE FIXED XXX */
bus_chipset_tag_t bc = 0;
bus_io_handle_t ioh;
bus_space_tag_t iot = 0;
bus_space_handle_t ioh;
int found;
if (bus_io_map(bc, CONADDR, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, CONADDR, COM_NPORTS, 0, &ioh)) {
cp->cn_pri = CN_DEAD;
return;
}
found = comprobe1(bc, ioh, CONADDR);
bus_io_unmap(bc, ioh, COM_NPORTS);
found = comprobe1(iot, ioh, CONADDR);
bus_space_unmap(iot, ioh, COM_NPORTS);
if (!found) {
cp->cn_pri = CN_DEAD;
return;
@ -1373,36 +1375,36 @@ comcninit(cp)
#if 0
XXX NEEDS TO BE FIXED XXX
comconsbc = ???;
comconstag = ???;
#endif
if (bus_io_map(comconsbc, CONADDR, COM_NPORTS, &comconsioh))
if (bus_space_map(comconstag, CONADDR, COM_NPORTS, 0, &comconsbah))
panic("comcninit: mapping failed");
cominit(comconsbc, comconsioh, comdefaultrate);
cominit(comconstag, comconsbah, comdefaultrate);
comconsaddr = CONADDR;
comconsinit = 0;
}
void
cominit(bc, ioh, rate)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
cominit(iot, ioh, rate)
bus_space_tag_t iot;
bus_space_handle_t ioh;
int rate;
{
int s = splhigh();
u_char stat;
bus_io_write_1(bc, ioh, com_lcr, LCR_DLAB);
bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
rate = comspeed(comdefaultrate);
bus_io_write_1(bc, ioh, com_dlbl, rate);
bus_io_write_1(bc, ioh, com_dlbh, rate >> 8);
bus_io_write_1(bc, ioh, com_lcr, LCR_8BITS);
bus_io_write_1(bc, ioh, com_ier, IER_ERXRDY | IER_ETXRDY);
bus_io_write_1(bc, ioh, com_fifo,
bus_space_write_1(iot, ioh, com_dlbl, rate);
bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
bus_space_write_1(iot, ioh, com_ier, IER_ERXRDY | IER_ETXRDY);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
bus_io_write_1(bc, ioh, com_mcr, MCR_DTR | MCR_RTS);
bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS);
DELAY(100);
stat = bus_io_read_1(bc, ioh, com_iir);
stat = bus_space_read_1(iot, ioh, com_iir);
splx(s);
}
@ -1411,14 +1413,14 @@ comcngetc(dev)
dev_t dev;
{
int s = splhigh();
bus_chipset_tag_t bc = comconsbc;
bus_io_handle_t ioh = comconsioh;
bus_space_tag_t iot = comconstag;
bus_space_handle_t ioh = comconsbah;
u_char stat, c;
while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_RXRDY))
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
;
c = bus_io_read_1(bc, ioh, com_data);
stat = bus_io_read_1(bc, ioh, com_iir);
c = bus_space_read_1(iot, ioh, com_data);
stat = bus_space_read_1(iot, ioh, com_iir);
splx(s);
return c;
}
@ -1432,8 +1434,8 @@ comcnputc(dev, c)
int c;
{
int s = splhigh();
bus_chipset_tag_t bc = comconsbc;
bus_io_handle_t ioh = comconsioh;
bus_space_tag_t iot = comconstag;
bus_space_handle_t ioh = comconsbah;
u_char stat;
register int timo;
@ -1441,20 +1443,20 @@ comcnputc(dev, c)
if (dev != kgdb_dev)
#endif
if (comconsinit == 0) {
cominit(bc, ioh, comdefaultrate);
cominit(iot, ioh, comdefaultrate);
comconsinit = 1;
}
/* wait for any pending transmission to finish */
timo = 50000;
while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo)
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
;
bus_io_write_1(bc, ioh, com_data, c);
bus_space_write_1(iot, ioh, com_data, c);
/* wait for this transmission to complete */
timo = 1500000;
while (!ISSET(stat = bus_io_read_1(bc, ioh, com_lsr), LSR_TXRDY) && --timo)
while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo)
;
/* clear any interrupts generated by this transmission */
stat = bus_io_read_1(bc, ioh, com_iir);
stat = bus_space_read_1(iot, ioh, com_iir);
splx(s);
}

12
sys/dev/isa/comvar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: comvar.h,v 1.5 1996/05/05 19:50:47 christos Exp $ */
/* $NetBSD: comvar.h,v 1.6 1996/10/21 22:40:34 thorpej Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -33,17 +33,17 @@
struct commulti_attach_args {
int ca_slave; /* slave number */
bus_chipset_tag_t ca_bc;
bus_io_handle_t ca_ioh;
bus_space_tag_t ca_iot;
bus_space_handle_t ca_ioh;
int ca_iobase;
int ca_noien;
};
int comprobe1 __P((bus_chipset_tag_t, bus_io_handle_t, int));
int comprobe1 __P((bus_space_tag_t, bus_space_handle_t, int));
int comintr __P((void *));
extern int comconsaddr;
extern int comconsattached;
extern bus_chipset_tag_t comconsbc;
extern bus_io_handle_t comconsioh;
extern bus_space_tag_t comconstag;
extern bus_space_handle_t comconsbah;
extern tcflag_t comconscflag;

16
sys/dev/isa/cy_isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: cy_isa.c,v 1.4 1996/10/13 01:37:39 christos Exp $ */
/* $NetBSD: cy_isa.c,v 1.5 1996/10/21 22:40:36 thorpej Exp $ */
/*
* cy.c
@ -42,7 +42,7 @@ cy_probe_isa(parent, match, aux)
memcpy(&sc.sc_dev, match, sizeof(struct device));
sc.sc_bc = ia->ia_bc;
sc.sc_memt = ia->ia_memt;
sc.sc_bustype = CY_BUSTYPE_ISA;
if (ia->ia_irq == IRQUNK) {
@ -50,13 +50,13 @@ cy_probe_isa(parent, match, aux)
return 0;
}
if (bus_mem_map(ia->ia_bc, ia->ia_maddr, CY_MEMSIZE, 0,
&sc.sc_memh) != 0)
if (bus_space_map(ia->ia_memt, ia->ia_maddr, CY_MEMSIZE, 0,
&sc.sc_bsh) != 0)
return 0;
found = cy_find(&sc);
bus_mem_unmap(ia->ia_bc, sc.sc_memh, CY_MEMSIZE);
bus_space_unmap(ia->ia_memt, sc.sc_bsh, CY_MEMSIZE);
if (found) {
ia->ia_iosize = 0;
@ -74,11 +74,11 @@ cy_attach_isa(parent, self, aux)
struct cy_softc *sc = (void *) self;
struct isa_attach_args *ia = aux;
sc->sc_bc = ia->ia_bc;
sc->sc_memt = ia->ia_memt;
sc->sc_bustype = CY_BUSTYPE_ISA;
if (bus_mem_map(ia->ia_bc, ia->ia_maddr, CY_MEMSIZE, 0,
&sc->sc_memh) != 0)
if (bus_space_map(ia->ia_memt, ia->ia_maddr, CY_MEMSIZE, 0,
&sc->sc_bsh) != 0)
panic("%s: Cannot map memory", sc->sc_dev.dv_xname);
if (cy_find(sc) == 0)

26
sys/dev/isa/elink.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: elink.c,v 1.9 1996/05/03 19:06:27 christos Exp $ */
/* $NetBSD: elink.c,v 1.10 1996/10/21 22:40:39 thorpej Exp $ */
/*
* Copyright (c) 1996 Jason R. Thorpe. All rights reserved.
@ -61,12 +61,12 @@ static int elink_all_resets_initialized;
* The "bus" argument here is the unit number of the ISA bus, e.g. "0"
* if the bus is "isa0".
*
* NOTE: the caller MUST provide an i/o handle for ELINK_ID_PORT!
* NOTE: the caller MUST provide an access handle for ELINK_ID_PORT!
*/
void
elink_reset(bc, ioh, bus)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
elink_reset(iot, ioh, bus)
bus_space_tag_t iot;
bus_space_handle_t ioh;
int bus;
{
struct elink_done_reset *er;
@ -94,23 +94,23 @@ elink_reset(bc, ioh, bus)
LIST_INSERT_HEAD(&elink_all_resets, er, er_link);
/* Haven't reset the cards on this bus, yet. */
bus_io_write_1(bc, ioh, 0, ELINK_RESET);
bus_space_write_1(iot, ioh, 0, ELINK_RESET);
out:
bus_io_write_1(bc, ioh, 0, 0x00);
bus_io_write_1(bc, ioh, 0, 0x00);
bus_space_write_1(iot, ioh, 0, 0x00);
bus_space_write_1(iot, ioh, 0, 0x00);
}
/*
* The `ID sequence' is really just snapshots of an 8-bit CRC register as 0
* bits are shifted in. Different board types use different polynomials.
*
* NOTE: the caller MUST provide an i/o handle for ELINK_ID_PORT!
* NOTE: the caller MUST provide an access handle for ELINK_ID_PORT!
*/
void
elink_idseq(bc, ioh, p)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
elink_idseq(iot, ioh, p)
bus_space_tag_t iot;
bus_space_handle_t ioh;
register u_char p;
{
register int i;
@ -118,7 +118,7 @@ elink_idseq(bc, ioh, p)
c = 0xff;
for (i = 255; i; i--) {
bus_io_write_1(bc, ioh, 0, c);
bus_space_write_1(iot, ioh, 0, c);
if (c & 0x80) {
c <<= 1;
c ^= p;

6
sys/dev/isa/elink.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: elink.h,v 1.4 1996/04/30 22:16:31 thorpej Exp $ */
/* $NetBSD: elink.h,v 1.5 1996/10/21 22:40:41 thorpej Exp $ */
/*
* Copyright (c) 1994 Charles Hannum. All rights reserved.
@ -35,5 +35,5 @@
#define ELINK_507_POLY 0xe7
#define ELINK_509_POLY 0xcf
void elink_reset __P((bus_chipset_tag_t, bus_io_handle_t, int));
void elink_idseq __P((bus_chipset_tag_t, bus_io_handle_t, u_char p));
void elink_reset __P((bus_space_tag_t, bus_space_handle_t, int));
void elink_idseq __P((bus_space_tag_t, bus_space_handle_t, u_char p));

545
sys/dev/isa/if_ed.c
View File

File diff suppressed because it is too large Load Diff

128
sys/dev/isa/if_eg.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_eg.c,v 1.31 1996/10/17 04:21:55 thorpej Exp $ */
/* $NetBSD: if_eg.c,v 1.32 1996/10/21 22:40:50 thorpej Exp $ */
/*
* Copyright (c) 1993 Dean Huxley <dean@fsa.ca>
@ -104,8 +104,8 @@ struct eg_softc {
struct device sc_dev;
void *sc_ih;
struct arpcom sc_arpcom; /* Ethernet common part */
bus_chipset_tag_t sc_bc; /* bus chipset identifier */
bus_io_handle_t sc_ioh; /* i/o handle */
bus_space_tag_t sc_iot; /* bus space identifier */
bus_space_handle_t sc_ioh; /* i/o handle */
u_int8_t eg_rom_major; /* Cards ROM version (major number) */
u_int8_t eg_rom_minor; /* Cards ROM version (minor number) */
short eg_ram; /* Amount of RAM on the card */
@ -179,13 +179,13 @@ egoutPCB(sc, b)
struct eg_softc *sc;
u_int8_t b;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
for (i=0; i < 4000; i++) {
if (bus_io_read_1(bc, ioh, EG_STATUS) & EG_STAT_HCRE) {
bus_io_write_1(bc, ioh, EG_COMMAND, b);
if (bus_space_read_1(iot, ioh, EG_STATUS) & EG_STAT_HCRE) {
bus_space_write_1(iot, ioh, EG_COMMAND, b);
return 0;
}
delay(10);
@ -199,17 +199,17 @@ egreadPCBstat(sc, statb)
struct eg_softc *sc;
u_int8_t statb;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
for (i=0; i < 5000; i++) {
if ((bus_io_read_1(bc, ioh, EG_STATUS) &
if ((bus_space_read_1(iot, ioh, EG_STATUS) &
EG_PCB_STAT) != EG_PCB_NULL)
break;
delay(10);
}
if ((bus_io_read_1(bc, ioh, EG_STATUS) & EG_PCB_STAT) == statb)
if ((bus_space_read_1(iot, ioh, EG_STATUS) & EG_PCB_STAT) == statb)
return 0;
return 1;
}
@ -218,12 +218,12 @@ static int
egreadPCBready(sc)
struct eg_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
for (i=0; i < 10000; i++) {
if (bus_io_read_1(bc, ioh, EG_STATUS) & EG_STAT_ACRF)
if (bus_space_read_1(iot, ioh, EG_STATUS) & EG_STAT_ACRF)
return 0;
delay(5);
}
@ -235,26 +235,26 @@ static int
egwritePCB(sc)
struct eg_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
u_int8_t len;
bus_io_write_1(bc, ioh, EG_CONTROL,
(bus_io_read_1(bc, ioh, EG_CONTROL) & ~EG_PCB_STAT) | EG_PCB_NULL);
bus_space_write_1(iot, ioh, EG_CONTROL,
(bus_space_read_1(iot, ioh, EG_CONTROL) & ~EG_PCB_STAT) | EG_PCB_NULL);
len = sc->eg_pcb[1] + 2;
for (i = 0; i < len; i++)
egoutPCB(sc, sc->eg_pcb[i]);
for (i=0; i < 4000; i++) {
if (bus_io_read_1(bc, ioh, EG_STATUS) & EG_STAT_HCRE)
if (bus_space_read_1(iot, ioh, EG_STATUS) & EG_STAT_HCRE)
break;
delay(10);
}
bus_io_write_1(bc, ioh, EG_CONTROL,
(bus_io_read_1(bc, ioh, EG_CONTROL) & ~EG_PCB_STAT) | EG_PCB_DONE);
bus_space_write_1(iot, ioh, EG_CONTROL,
(bus_space_read_1(iot, ioh, EG_CONTROL) & ~EG_PCB_STAT) | EG_PCB_DONE);
egoutPCB(sc, len);
@ -267,25 +267,25 @@ static int
egreadPCB(sc)
struct eg_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
u_int8_t b;
bus_io_write_1(bc, ioh, EG_CONTROL,
(bus_io_read_1(bc, ioh, EG_CONTROL) & ~EG_PCB_STAT) | EG_PCB_NULL);
bus_space_write_1(iot, ioh, EG_CONTROL,
(bus_space_read_1(iot, ioh, EG_CONTROL) & ~EG_PCB_STAT) | EG_PCB_NULL);
bzero(sc->eg_pcb, sizeof(sc->eg_pcb));
if (egreadPCBready(sc))
return 1;
sc->eg_pcb[0] = bus_io_read_1(bc, ioh, EG_COMMAND);
sc->eg_pcb[0] = bus_space_read_1(iot, ioh, EG_COMMAND);
if (egreadPCBready(sc))
return 1;
sc->eg_pcb[1] = bus_io_read_1(bc, ioh, EG_COMMAND);
sc->eg_pcb[1] = bus_space_read_1(iot, ioh, EG_COMMAND);
if (sc->eg_pcb[1] > 62) {
DPRINTF(("len %d too large\n", sc->eg_pcb[1]));
@ -295,19 +295,19 @@ egreadPCB(sc)
for (i = 0; i < sc->eg_pcb[1]; i++) {
if (egreadPCBready(sc))
return 1;
sc->eg_pcb[2+i] = bus_io_read_1(bc, ioh, EG_COMMAND);
sc->eg_pcb[2+i] = bus_space_read_1(iot, ioh, EG_COMMAND);
}
if (egreadPCBready(sc))
return 1;
if (egreadPCBstat(sc, EG_PCB_DONE))
return 1;
if ((b = bus_io_read_1(bc, ioh, EG_COMMAND)) != sc->eg_pcb[1] + 2) {
if ((b = bus_space_read_1(iot, ioh, EG_COMMAND)) != sc->eg_pcb[1] + 2) {
DPRINTF(("%d != %d\n", b, sc->eg_pcb[1] + 2));
return 1;
}
bus_io_write_1(bc, ioh, EG_CONTROL,
(bus_io_read_1(bc, ioh, EG_CONTROL) &
bus_space_write_1(iot, ioh, EG_CONTROL,
(bus_space_read_1(iot, ioh, EG_CONTROL) &
~EG_PCB_STAT) | EG_PCB_ACCEPT);
return 0;
@ -324,8 +324,8 @@ egprobe(parent, match, aux)
{
struct eg_softc *sc = match;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int i, rval;
rval = 0;
@ -336,7 +336,7 @@ egprobe(parent, match, aux)
}
/* Map i/o space. */
if (bus_io_map(bc, ia->ia_iobase, 0x08, &ioh)) {
if (bus_space_map(iot, ia->ia_iobase, 0x08, 0, &ioh)) {
DPRINTF(("egprobe: can't map i/o space in probe\n"));
return 0;
}
@ -344,19 +344,19 @@ egprobe(parent, match, aux)
/*
* XXX Indirect brokenness.
*/
sc->sc_bc = bc; /* XXX */
sc->sc_iot = iot; /* XXX */
sc->sc_ioh = ioh; /* XXX */
/* hard reset card */
bus_io_write_1(bc, ioh, EG_CONTROL, EG_CTL_RESET);
bus_io_write_1(bc, ioh, EG_CONTROL, 0);
bus_space_write_1(iot, ioh, EG_CONTROL, EG_CTL_RESET);
bus_space_write_1(iot, ioh, EG_CONTROL, 0);
for (i = 0; i < 5000; i++) {
delay(1000);
if ((bus_io_read_1(bc, ioh, EG_STATUS) &
if ((bus_space_read_1(iot, ioh, EG_STATUS) &
EG_PCB_STAT) == EG_PCB_NULL)
break;
}
if ((bus_io_read_1(bc, ioh, EG_STATUS) & EG_PCB_STAT) != EG_PCB_NULL) {
if ((bus_space_read_1(iot, ioh, EG_STATUS) & EG_PCB_STAT) != EG_PCB_NULL) {
DPRINTF(("egprobe: Reset failed\n"));
goto out;
}
@ -384,7 +384,7 @@ egprobe(parent, match, aux)
rval = 1;
out:
bus_io_unmap(bc, ioh, 0x08);
bus_space_unmap(iot, ioh, 0x08);
return rval;
}
@ -395,19 +395,19 @@ egattach(parent, self, aux)
{
struct eg_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
printf("\n");
/* Map i/o space. */
if (bus_io_map(bc, ia->ia_iobase, ia->ia_iosize, &ioh)) {
if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh)) {
printf("%s: can't map i/o space\n", self->dv_xname);
return;
}
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
egstop(sc);
@ -481,15 +481,15 @@ eginit(sc)
register struct eg_softc *sc;
{
register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
/* soft reset the board */
bus_io_write_1(bc, ioh, EG_CONTROL, EG_CTL_FLSH);
bus_space_write_1(iot, ioh, EG_CONTROL, EG_CTL_FLSH);
delay(100);
bus_io_write_1(bc, ioh, EG_CONTROL, EG_CTL_ATTN);
bus_space_write_1(iot, ioh, EG_CONTROL, EG_CTL_ATTN);
delay(100);
bus_io_write_1(bc, ioh, EG_CONTROL, 0);
bus_space_write_1(iot, ioh, EG_CONTROL, 0);
delay(200);
sc->eg_pcb[0] = EG_CMD_CONFIG82586; /* Configure 82586 */
@ -527,7 +527,7 @@ eginit(sc)
}
}
bus_io_write_1(bc, ioh, EG_CONTROL, EG_CTL_CMDE);
bus_space_write_1(iot, ioh, EG_CONTROL, EG_CTL_CMDE);
sc->eg_incount = 0;
egrecv(sc);
@ -567,8 +567,8 @@ egstart(ifp)
struct ifnet *ifp;
{
register struct eg_softc *sc = ifp->if_softc;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct mbuf *m0, *m;
caddr_t buffer;
int len;
@ -622,12 +622,12 @@ loop:
}
/* set direction bit: host -> adapter */
bus_io_write_1(bc, ioh, EG_CONTROL,
bus_io_read_1(bc, ioh, EG_CONTROL) & ~EG_CTL_DIR);
bus_space_write_1(iot, ioh, EG_CONTROL,
bus_space_read_1(iot, ioh, EG_CONTROL) & ~EG_CTL_DIR);
for (ptr = (u_int16_t *) sc->eg_outbuf; len > 0; len -= 2) {
bus_io_write_2(bc, ioh, EG_DATA, *ptr++);
while (!(bus_io_read_1(bc, ioh, EG_STATUS) & EG_STAT_HRDY))
bus_space_write_2(iot, ioh, EG_DATA, *ptr++);
while (!(bus_space_read_1(iot, ioh, EG_STATUS) & EG_STAT_HRDY))
; /* XXX need timeout here */
}
@ -639,29 +639,29 @@ egintr(arg)
void *arg;
{
register struct eg_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i, len, serviced;
u_int16_t *ptr;
serviced = 0;
while (bus_io_read_1(bc, ioh, EG_STATUS) & EG_STAT_ACRF) {
while (bus_space_read_1(iot, ioh, EG_STATUS) & EG_STAT_ACRF) {
egreadPCB(sc);
switch (sc->eg_pcb[0]) {
case EG_RSP_RECVPACKET:
len = sc->eg_pcb[6] | (sc->eg_pcb[7] << 8);
/* Set direction bit : Adapter -> host */
bus_io_write_1(bc, ioh, EG_CONTROL,
bus_io_read_1(bc, ioh, EG_CONTROL) | EG_CTL_DIR);
bus_space_write_1(iot, ioh, EG_CONTROL,
bus_space_read_1(iot, ioh, EG_CONTROL) | EG_CTL_DIR);
for (ptr = (u_int16_t *) sc->eg_inbuf;
len > 0; len -= 2) {
while (!(bus_io_read_1(bc, ioh, EG_STATUS) &
while (!(bus_space_read_1(iot, ioh, EG_STATUS) &
EG_STAT_HRDY))
;
*ptr++ = bus_io_read_2(bc, ioh, EG_DATA);
*ptr++ = bus_space_read_2(iot, ioh, EG_DATA);
}
len = sc->eg_pcb[8] | (sc->eg_pcb[9] << 8);
@ -939,5 +939,5 @@ egstop(sc)
register struct eg_softc *sc;
{
bus_io_write_1(sc->sc_bc, sc->sc_ioh, EG_CONTROL, 0);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, EG_CONTROL, 0);
}

148
sys/dev/isa/if_el.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_el.c,v 1.42 1996/10/13 01:37:45 christos Exp $ */
/* $NetBSD: if_el.c,v 1.43 1996/10/21 22:40:53 thorpej Exp $ */
/*
* Copyright (c) 1994, Matthew E. Kimmel. Permission is hereby granted
@ -77,8 +77,8 @@ struct el_softc {
void *sc_ih;
struct arpcom sc_arpcom; /* ethernet common */
bus_chipset_tag_t sc_bc; /* bus chipset identifier */
bus_io_handle_t sc_ioh; /* i/o handle */
bus_space_tag_t sc_iot; /* bus space identifier */
bus_space_handle_t sc_ioh; /* i/o handle */
};
/*
@ -119,8 +119,8 @@ elprobe(parent, match, aux)
void *match, *aux;
{
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int iobase = ia->ia_iobase;
u_int8_t station_addr[ETHER_ADDR_LEN];
u_int8_t i;
@ -133,7 +133,7 @@ elprobe(parent, match, aux)
return 0;
/* Map i/o space. */
if (bus_io_map(bc, iobase, 4, &ioh))
if (bus_space_map(iot, iobase, 4, 0, &ioh))
return 0;
/*
@ -144,15 +144,15 @@ elprobe(parent, match, aux)
/* Reset the board. */
DPRINTF(("Resetting board...\n"));
bus_io_write_1(bc, ioh, EL_AC, EL_AC_RESET);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_RESET);
delay(5);
bus_io_write_1(bc, ioh, EL_AC, 0);
bus_space_write_1(iot, ioh, EL_AC, 0);
/* Now read the address. */
DPRINTF(("Reading station address...\n"));
for (i = 0; i < ETHER_ADDR_LEN; i++) {
bus_io_write_1(bc, ioh, EL_GPBL, i);
station_addr[i] = bus_io_read_1(bc, ioh, EL_EAW);
bus_space_write_1(iot, ioh, EL_GPBL, i);
station_addr[i] = bus_space_read_1(iot, ioh, EL_EAW);
}
DPRINTF(("Address is %s\n", ether_sprintf(station_addr)));
@ -172,7 +172,7 @@ elprobe(parent, match, aux)
rval = 1;
out:
bus_io_unmap(bc, ioh, 4);
bus_space_unmap(iot, ioh, 4);
return rval;
}
@ -188,8 +188,8 @@ elattach(parent, self, aux)
{
struct el_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
u_int8_t i;
@ -198,23 +198,23 @@ elattach(parent, self, aux)
DPRINTF(("Attaching %s...\n", sc->sc_dev.dv_xname));
/* Map i/o space. */
if (bus_io_map(bc, ia->ia_iobase, ia->ia_iosize, &ioh)) {
if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh)) {
printf("%s: can't map i/o space\n", self->dv_xname);
return;
}
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
/* Reset the board. */
bus_io_write_1(bc, ioh, EL_AC, EL_AC_RESET);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_RESET);
delay(5);
bus_io_write_1(bc, ioh, EL_AC, 0);
bus_space_write_1(iot, ioh, EL_AC, 0);
/* Now read the address. */
for (i = 0; i < ETHER_ADDR_LEN; i++) {
bus_io_write_1(bc, ioh, EL_GPBL, i);
sc->sc_arpcom.ac_enaddr[i] = bus_io_read_1(bc, ioh, EL_EAW);
bus_space_write_1(iot, ioh, EL_GPBL, i);
sc->sc_arpcom.ac_enaddr[i] = bus_space_read_1(iot, ioh, EL_EAW);
}
/* Stop the board. */
@ -273,7 +273,7 @@ elstop(sc)
struct el_softc *sc;
{
bus_io_write_1(sc->sc_bc, sc->sc_ioh, EL_AC, 0);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, EL_AC, 0);
}
/*
@ -284,16 +284,16 @@ static inline void
el_hardreset(sc)
struct el_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
bus_io_write_1(bc, ioh, EL_AC, EL_AC_RESET);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_RESET);
delay(5);
bus_io_write_1(bc, ioh, EL_AC, 0);
bus_space_write_1(iot, ioh, EL_AC, 0);
for (i = 0; i < ETHER_ADDR_LEN; i++)
bus_io_write_1(bc, ioh, i, sc->sc_arpcom.ac_enaddr[i]);
bus_space_write_1(iot, ioh, i, sc->sc_arpcom.ac_enaddr[i]);
}
/*
@ -304,8 +304,8 @@ elinit(sc)
struct el_softc *sc;
{
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
/* First, reset the board. */
el_hardreset(sc);
@ -313,22 +313,22 @@ elinit(sc)
/* Configure rx. */
DPRINTF(("Configuring rx...\n"));
if (ifp->if_flags & IFF_PROMISC)
bus_io_write_1(bc, ioh, EL_RXC,
bus_space_write_1(iot, ioh, EL_RXC,
EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB |
EL_RXC_DOFLOW | EL_RXC_PROMISC);
else
bus_io_write_1(bc, ioh, EL_RXC,
bus_space_write_1(iot, ioh, EL_RXC,
EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB |
EL_RXC_DOFLOW | EL_RXC_ABROAD);
bus_io_write_1(bc, ioh, EL_RBC, 0);
bus_space_write_1(iot, ioh, EL_RBC, 0);
/* Configure TX. */
DPRINTF(("Configuring tx...\n"));
bus_io_write_1(bc, ioh, EL_TXC, 0);
bus_space_write_1(iot, ioh, EL_TXC, 0);
/* Start reception. */
DPRINTF(("Starting reception...\n"));
bus_io_write_1(bc, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
/* Set flags appropriately. */
ifp->if_flags |= IFF_RUNNING;
@ -348,8 +348,8 @@ elstart(ifp)
struct ifnet *ifp;
{
struct el_softc *sc = ifp->if_softc;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct mbuf *m, *m0;
int s, i, off, retries;
@ -383,8 +383,8 @@ elstart(ifp)
#endif
/* Disable the receiver. */
bus_io_write_1(bc, ioh, EL_AC, EL_AC_HOST);
bus_io_write_1(bc, ioh, EL_RBC, 0);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_HOST);
bus_space_write_1(iot, ioh, EL_RBC, 0);
/* Transfer datagram to board. */
DPRINTF(("el: xfr pkt length=%d...\n", m0->m_pkthdr.len));
@ -394,12 +394,12 @@ elstart(ifp)
printf("%s: bogus off 0x%x\n",
sc->sc_dev.dv_xname, off);
#endif
bus_io_write_1(bc, ioh, EL_GPBL, off & 0xff);
bus_io_write_1(bc, ioh, EL_GPBH, (off >> 8) & 0xff);
bus_space_write_1(iot, ioh, EL_GPBL, off & 0xff);
bus_space_write_1(iot, ioh, EL_GPBH, (off >> 8) & 0xff);
/* Copy the datagram to the buffer. */
for (m = m0; m != 0; m = m->m_next)
bus_io_write_multi_1(bc, ioh, EL_BUF,
bus_space_write_multi_1(iot, ioh, EL_BUF,
mtod(m, u_int8_t *), m->m_len);
m_freem(m0);
@ -407,14 +407,14 @@ elstart(ifp)
/* Now transmit the datagram. */
retries = 0;
for (;;) {
bus_io_write_1(bc, ioh, EL_GPBL, off & 0xff);
bus_io_write_1(bc, ioh, EL_GPBH, (off >> 8) & 0xff);
bus_space_write_1(iot, ioh, EL_GPBL, off & 0xff);
bus_space_write_1(iot, ioh, EL_GPBH, (off >> 8) & 0xff);
if (el_xmit(sc)) {
ifp->if_oerrors++;
break;
}
/* Check out status. */
i = bus_io_read_1(bc, ioh, EL_TXS);
i = bus_space_read_1(iot, ioh, EL_TXS);
DPRINTF(("tx status=0x%x\n", i));
if ((i & EL_TXS_READY) == 0) {
DPRINTF(("el: err txs=%x\n", i));
@ -423,7 +423,7 @@ elstart(ifp)
if ((i & EL_TXC_DCOLL16) == 0 &&
retries < 15) {
retries++;
bus_io_write_1(bc, ioh,
bus_space_write_1(iot, ioh,
EL_AC, EL_AC_HOST);
}
} else {
@ -440,15 +440,15 @@ elstart(ifp)
* Now give the card a chance to receive.
* Gotta love 3c501s...
*/
(void)bus_io_read_1(bc, ioh, EL_AS);
bus_io_write_1(bc, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
(void)bus_space_read_1(iot, ioh, EL_AS);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
splx(s);
/* Interrupt here. */
s = splnet();
}
(void)bus_io_read_1(bc, ioh, EL_AS);
bus_io_write_1(bc, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
(void)bus_space_read_1(iot, ioh, EL_AS);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
ifp->if_flags &= ~IFF_OACTIVE;
splx(s);
}
@ -462,8 +462,8 @@ static int
el_xmit(sc)
struct el_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int i;
/*
@ -473,9 +473,9 @@ el_xmit(sc)
*/
DPRINTF(("el: xmit..."));
bus_io_write_1(bc, ioh, EL_AC, EL_AC_TXFRX);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_TXFRX);
i = 20000;
while ((bus_io_read_1(bc, ioh, EL_AS) & EL_AS_TXBUSY) && (i > 0))
while ((bus_space_read_1(iot, ioh, EL_AS) & EL_AS_TXBUSY) && (i > 0))
i--;
if (i == 0) {
DPRINTF(("tx not ready\n"));
@ -493,22 +493,22 @@ elintr(arg)
void *arg;
{
register struct el_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_int8_t rxstat;
int len;
DPRINTF(("elintr: "));
/* Check board status. */
if ((bus_io_read_1(bc, ioh, EL_AS) & EL_AS_RXBUSY) != 0) {
(void)bus_io_read_1(bc, ioh, EL_RXC);
bus_io_write_1(bc, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
if ((bus_space_read_1(iot, ioh, EL_AS) & EL_AS_RXBUSY) != 0) {
(void)bus_space_read_1(iot, ioh, EL_RXC);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
return 0;
}
for (;;) {
rxstat = bus_io_read_1(bc, ioh, EL_RXS);
rxstat = bus_space_read_1(iot, ioh, EL_RXS);
if (rxstat & EL_RXS_STALE)
break;
@ -518,36 +518,36 @@ elintr(arg)
el_hardreset(sc);
/* Put board back into receive mode. */
if (sc->sc_arpcom.ac_if.if_flags & IFF_PROMISC)
bus_io_write_1(bc, ioh, EL_RXC,
bus_space_write_1(iot, ioh, EL_RXC,
EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB |
EL_RXC_DOFLOW | EL_RXC_PROMISC);
else
bus_io_write_1(bc, ioh, EL_RXC,
bus_space_write_1(iot, ioh, EL_RXC,
EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB |
EL_RXC_DOFLOW | EL_RXC_ABROAD);
(void)bus_io_read_1(bc, ioh, EL_AS);
bus_io_write_1(bc, ioh, EL_RBC, 0);
(void)bus_space_read_1(iot, ioh, EL_AS);
bus_space_write_1(iot, ioh, EL_RBC, 0);
break;
}
/* Incoming packet. */
len = bus_io_read_1(bc, ioh, EL_RBL);
len |= bus_io_read_1(bc, ioh, EL_RBH) << 8;
len = bus_space_read_1(iot, ioh, EL_RBL);
len |= bus_space_read_1(iot, ioh, EL_RBH) << 8;
DPRINTF(("receive len=%d rxstat=%x ", len, rxstat));
bus_io_write_1(bc, ioh, EL_AC, EL_AC_HOST);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_HOST);
/* Pass data up to upper levels. */
elread(sc, len);
/* Is there another packet? */
if ((bus_io_read_1(bc, ioh, EL_AS) & EL_AS_RXBUSY) != 0)
if ((bus_space_read_1(iot, ioh, EL_AS) & EL_AS_RXBUSY) != 0)
break;
DPRINTF(("<rescan> "));
}
(void)bus_io_read_1(bc, ioh, EL_RXC);
bus_io_write_1(bc, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
(void)bus_space_read_1(iot, ioh, EL_RXC);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_IRQE | EL_AC_RX);
return 1;
}
@ -622,8 +622,8 @@ elget(sc, totlen)
int totlen;
{
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct mbuf *top, **mp, *m;
int len;
@ -636,8 +636,8 @@ elget(sc, totlen)
top = 0;
mp = &top;
bus_io_write_1(bc, ioh, EL_GPBL, 0);
bus_io_write_1(bc, ioh, EL_GPBH, 0);
bus_space_write_1(iot, ioh, EL_GPBL, 0);
bus_space_write_1(iot, ioh, EL_GPBH, 0);
while (totlen > 0) {
if (top) {
@ -654,14 +654,14 @@ elget(sc, totlen)
len = MCLBYTES;
}
m->m_len = len = min(totlen, len);
bus_io_read_multi_1(bc, ioh, EL_BUF, mtod(m, u_int8_t *), len);
bus_space_read_multi_1(iot, ioh, EL_BUF, mtod(m, u_int8_t *), len);
totlen -= len;
*mp = m;
mp = &m->m_next;
}
bus_io_write_1(bc, ioh, EL_RBC, 0);
bus_io_write_1(bc, ioh, EL_AC, EL_AC_RX);
bus_space_write_1(iot, ioh, EL_RBC, 0);
bus_space_write_1(iot, ioh, EL_AC, EL_AC_RX);
return top;
}

38
sys/dev/isa/if_ep_isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ep_isa.c,v 1.7 1996/10/13 01:37:47 christos Exp $ */
/* $NetBSD: if_ep_isa.c,v 1.8 1996/10/21 22:40:56 thorpej Exp $ */
/*
* Copyright (c) 1996 Jason R. Thorpe <thorpej@beer.org>
@ -138,8 +138,8 @@ ep_isa_probe(parent, match, aux)
void *match, *aux;
{
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int slot, iobase, irq, i;
u_int16_t vendor, model;
struct ep_isa_done_probe *er;
@ -172,24 +172,24 @@ ep_isa_probe(parent, match, aux)
/*
* Map the Etherlink ID port for the probe sequence.
*/
if (bus_io_map(bc, ELINK_ID_PORT, 1, &ioh)) {
if (bus_space_map(iot, ELINK_ID_PORT, 1, 0, &ioh)) {
printf("ep_isa_probe: can't map Etherlink ID port\n");
return 0;
}
for (slot = 0; slot < MAXEPCARDS; slot++) {
elink_reset(bc, ioh, parent->dv_unit);
elink_idseq(bc, ioh, ELINK_509_POLY);
elink_reset(iot, ioh, parent->dv_unit);
elink_idseq(iot, ioh, ELINK_509_POLY);
/* Untag all the adapters so they will talk to us. */
if (slot == 0)
bus_io_write_1(bc, ioh, 0, TAG_ADAPTER + 0);
bus_space_write_1(iot, ioh, 0, TAG_ADAPTER + 0);
vendor = htons(epreadeeprom(bc, ioh, EEPROM_MFG_ID));
vendor = htons(epreadeeprom(iot, ioh, EEPROM_MFG_ID));
if (vendor != MFG_ID)
continue;
model = htons(epreadeeprom(bc, ioh, EEPROM_PROD_ID));
model = htons(epreadeeprom(iot, ioh, EEPROM_PROD_ID));
if ((model & 0xfff0) != PROD_ID) {
#ifndef trusted
printf(
@ -198,15 +198,15 @@ ep_isa_probe(parent, match, aux)
continue;
}
iobase = epreadeeprom(bc, ioh, EEPROM_ADDR_CFG);
iobase = epreadeeprom(iot, ioh, EEPROM_ADDR_CFG);
iobase = (iobase & 0x1f) * 0x10 + 0x200;
irq = epreadeeprom(bc, ioh, EEPROM_RESOURCE_CFG);
irq = epreadeeprom(iot, ioh, EEPROM_RESOURCE_CFG);
irq >>= 12;
epaddcard(bus, iobase, irq);
/* so card will not respond to contention again */
bus_io_write_1(bc, ioh, 0, TAG_ADAPTER + 1);
bus_space_write_1(iot, ioh, 0, TAG_ADAPTER + 1);
/*
* XXX: this should probably not be done here
@ -214,11 +214,11 @@ ep_isa_probe(parent, match, aux)
* the board. Perhaps it should be done after
* we have checked for irq/drq collisions?
*/
bus_io_write_1(bc, ioh, 0, ACTIVATE_ADAPTER_TO_CONFIG);
bus_space_write_1(iot, ioh, 0, ACTIVATE_ADAPTER_TO_CONFIG);
}
/* XXX should we sort by ethernet address? */
bus_io_unmap(bc, ioh, 1);
bus_space_unmap(iot, ioh, 1);
bus_probed:
@ -253,20 +253,20 @@ ep_isa_attach(parent, self, aux)
{
struct ep_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
u_short conn = 0;
/* Map i/o space. */
if (bus_io_map(bc, ia->ia_iobase, ia->ia_iosize, &ioh))
if (bus_space_map(iot, ia->ia_iobase, ia->ia_iosize, 0, &ioh))
panic("ep_isa_attach: can't map i/o space");
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
sc->bustype = EP_BUS_ISA;
GO_WINDOW(0);
conn = bus_io_read_2(bc, ioh, EP_W0_CONFIG_CTRL);
conn = bus_space_read_2(iot, ioh, EP_W0_CONFIG_CTRL);
printf(": 3Com 3C509 Ethernet\n");

18
sys/dev/isa/if_ie.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ie.c,v 1.54 1996/10/13 01:37:50 christos Exp $ */
/* $NetBSD: if_ie.c,v 1.55 1996/10/21 22:40:59 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995 Charles Hannum.
@ -468,8 +468,8 @@ el_probe(sc, ia)
struct ie_softc *sc;
struct isa_attach_args *ia;
{
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
u_char c;
int i, rval = 0;
u_char signature[] = "*3COM*";
@ -483,7 +483,7 @@ el_probe(sc, ia)
/*
* Map the Etherlink ID port for the probe sequence.
*/
if (bus_io_map(bc, ELINK_ID_PORT, 1, &ioh)) {
if (bus_space_map(iot, ELINK_ID_PORT, 1, 0, &ioh)) {
printf("3c507 probe: can't map Etherlink ID port\n");
return 0;
}
@ -492,9 +492,9 @@ el_probe(sc, ia)
* Reset and put card in CONFIG state without changing address.
* XXX Indirect brokenness here!
*/
elink_reset(bc, ioh, sc->sc_dev.dv_parent->dv_unit);
elink_idseq(bc, ioh, ELINK_507_POLY);
elink_idseq(bc, ioh, ELINK_507_POLY);
elink_reset(iot, ioh, sc->sc_dev.dv_parent->dv_unit);
elink_idseq(iot, ioh, ELINK_507_POLY);
elink_idseq(iot, ioh, ELINK_507_POLY);
outb(ELINK_ID_PORT, 0xff);
/* Check for 3COM signature before proceeding. */
@ -512,7 +512,7 @@ el_probe(sc, ia)
/* Go to RUN state. */
outb(ELINK_ID_PORT, 0x00);
elink_idseq(bc, ioh, ELINK_507_POLY);
elink_idseq(iot, ioh, ELINK_507_POLY);
outb(ELINK_ID_PORT, 0x00);
/* Set bank 2 for version info and read BCD version byte. */
@ -576,7 +576,7 @@ el_probe(sc, ia)
rval = 1;
out:
bus_io_unmap(bc, ioh, 1);
bus_space_unmap(iot, ioh, 1);
return rval;
}

340
sys/dev/isa/if_iy.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_iy.c,v 1.8 1996/10/13 01:37:51 christos Exp $ */
/* $NetBSD: if_iy.c,v 1.9 1996/10/21 22:41:03 thorpej Exp $ */
/* #define IYDEBUG */
/* #define IYMEMDEBUG */
/*-
@ -90,8 +90,8 @@ struct iy_softc {
struct device sc_dev;
void *sc_ih;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
struct arpcom sc_arpcom;
@ -135,7 +135,7 @@ void iy_find_mem_size __P((struct iy_softc *));
void iyrint __P((struct iy_softc *));
void iytint __P((struct iy_softc *));
void iyxmit __P((struct iy_softc *));
void iyget __P((struct iy_softc *, bus_chipset_tag_t, bus_io_handle_t, int));
void iyget __P((struct iy_softc *, bus_space_tag_t, bus_space_handle_t, int));
void iymbuffill __P((void *));
void iymbufempty __P((void *));
void iyprobemem __P((struct iy_softc *));
@ -155,8 +155,8 @@ int in_iftint = 0;
int iyprobe __P((struct device *, void *, void *));
void iyattach __P((struct device *, struct device *, void *));
static u_int16_t eepromread __P((bus_chipset_tag_t, bus_io_handle_t,
bus_io_size_t, int));
static u_int16_t eepromread __P((bus_space_tag_t, bus_space_handle_t,
bus_size_t, int));
struct cfattach iy_ca = {
sizeof(struct iy_softc), iyprobe, iyattach
@ -179,8 +179,8 @@ iyprobe(parent, match, aux)
u_int16_t eaddr[8];
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int i;
@ -188,9 +188,9 @@ iyprobe(parent, match, aux)
u_int16_t eepromtmp;
u_int8_t c, d;
bc = ia->ia_bc;
iot = ia->ia_iot;
if (bus_io_map(bc, ia->ia_iobase, 16, &ioh))
if (bus_space_map(iot, ia->ia_iobase, 16, 0, &ioh))
goto out;
/* check here for addresses already given to other devices */
@ -198,32 +198,32 @@ iyprobe(parent, match, aux)
/* try to find the round robin sig: */
c = bus_io_read_1(bc, ioh, ID_REG);
c = bus_space_read_1(iot, ioh, ID_REG);
if (c & ID_REG_MASK != ID_REG_SIG)
goto out;
d = bus_io_read_1(bc, ioh, ID_REG);
d = bus_space_read_1(iot, ioh, ID_REG);
if (d & ID_REG_MASK != ID_REG_SIG)
goto out;
if (((d-c) & R_ROBIN_BITS) != 0x40)
goto out;
d = bus_io_read_1(bc, ioh, ID_REG);
d = bus_space_read_1(iot, ioh, ID_REG);
if (d & ID_REG_MASK != ID_REG_SIG)
goto out;
if (((d-c) & R_ROBIN_BITS) != 0x80)
goto out;
d = bus_io_read_1(bc, ioh, ID_REG);
d = bus_space_read_1(iot, ioh, ID_REG);
if (d & ID_REG_MASK != ID_REG_SIG)
goto out;
if (((d-c) & R_ROBIN_BITS) != 0xC0)
goto out;
d = bus_io_read_1(bc, ioh, ID_REG);
d = bus_space_read_1(iot, ioh, ID_REG);
if (d & ID_REG_MASK != ID_REG_SIG)
goto out;
@ -235,7 +235,7 @@ iyprobe(parent, match, aux)
#endif
for (i=0; i<64; ++i) {
eepromtmp = eepromread(bc, ioh, EEPROM_REG, i);
eepromtmp = eepromread(iot, ioh, EEPROM_REG, i);
checksum += eepromtmp;
if (i<(sizeof(eaddr)/sizeof(*eaddr)))
eaddr[i] = eepromtmp;
@ -245,9 +245,9 @@ iyprobe(parent, match, aux)
checksum, EEPP_CHKSUM);
if ((eaddr[EEPPEther0] != eepromread(bc, ioh, EEPROM_REG, EEPPEther0a)) &&
(eaddr[EEPPEther1] != eepromread(bc, ioh, EEPROM_REG, EEPPEther1a)) &&
(eaddr[EEPPEther2] != eepromread(bc, ioh, EEPROM_REG, EEPPEther2a)))
if ((eaddr[EEPPEther0] != eepromread(iot, ioh, EEPROM_REG, EEPPEther0a)) &&
(eaddr[EEPPEther1] != eepromread(iot, ioh, EEPROM_REG, EEPPEther1a)) &&
(eaddr[EEPPEther2] != eepromread(iot, ioh, EEPROM_REG, EEPPEther2a)))
printf("EEPROM Ethernet address differs from copy\n");
sc->sc_arpcom.ac_enaddr[1] = eaddr[EEPPEther0] & 0xFF;
@ -270,7 +270,7 @@ iyprobe(parent, match, aux)
/* now lets reset the chip */
bus_io_write_1(bc, ioh, COMMAND_REG, RESET_CMD);
bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD);
delay(200);
/*
@ -279,11 +279,11 @@ iyprobe(parent, match, aux)
*/
ia->ia_iosize = 16;
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
return 1; /* found */
out:
bus_io_unmap(bc, ioh, 16);
bus_space_unmap(iot, ioh, 16);
return 0;
}
@ -295,14 +295,14 @@ iyattach(parent, self, aux)
struct iy_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
/*
* XXX Should re-map io and mem, but can't
* XXX until we squish "indirect" brokenness.
*/
bc = sc->sc_bc; /* XXX */
iot = sc->sc_iot; /* XXX */
ioh = sc->sc_ioh; /* XXX */
bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
@ -335,21 +335,21 @@ void
iystop(sc)
struct iy_softc *sc;
{
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
#ifdef IYDEBUG
u_int p, v;
#endif
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
bus_io_write_1(bc, ioh, COMMAND_REG, RCV_DISABLE_CMD);
bus_space_write_1(iot, ioh, COMMAND_REG, RCV_DISABLE_CMD);
bus_io_write_1(bc, ioh, INT_MASK_REG, ALL_INTS);
bus_io_write_1(bc, ioh, STATUS_REG, ALL_INTS);
bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS);
bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS);
bus_io_write_1(bc, ioh, COMMAND_REG, RESET_CMD);
bus_space_write_1(iot, ioh, COMMAND_REG, RESET_CMD);
delay(200);
#ifdef IYDEBUG
printf("%s: dumping tx chain (st 0x%x end 0x%x last 0x%x)\n",
@ -358,14 +358,14 @@ struct iy_softc *sc;
if (!p)
p = sc->tx_start;
do {
bus_io_write_2(bc, ioh, HOST_ADDR_REG, p);
v = bus_io_read_2(bc, ioh, MEM_PORT_REG);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, p);
v = bus_space_read_2(iot, ioh, MEM_PORT_REG);
printf("0x%04x: %b ", p, v, "\020\006Ab\010Dn");
v = bus_io_read_2(bc, ioh, MEM_PORT_REG);
v = bus_space_read_2(iot, ioh, MEM_PORT_REG);
printf("0x%b", v, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF\011UND_RUN\012JERR\013LST_CRS\014LTCOL\016TX_OK\020COLL");
p = bus_io_read_2(bc, ioh, MEM_PORT_REG);
p = bus_space_read_2(iot, ioh, MEM_PORT_REG);
printf(" 0x%04x", p);
v = bus_io_read_2(bc, ioh, MEM_PORT_REG);
v = bus_space_read_2(iot, ioh, MEM_PORT_REG);
printf(" 0x%b\n", v, "\020\020Ch");
} while (v & 0x8000);
@ -395,10 +395,10 @@ struct iy_softc *sc;
int i;
unsigned temp;
struct ifnet *ifp;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
ifp = &sc->sc_arpcom.ac_if;
@ -406,22 +406,22 @@ struct iy_softc *sc;
printf("ifp is %p\n", ifp);
#endif
bus_io_write_1(bc, ioh, 0, BANK_SEL(2));
bus_space_write_1(iot, ioh, 0, BANK_SEL(2));
temp = bus_io_read_1(bc, ioh, EEPROM_REG);
temp = bus_space_read_1(iot, ioh, EEPROM_REG);
if (temp & 0x10)
bus_io_write_1(bc, ioh, EEPROM_REG, temp & ~0x10);
bus_space_write_1(iot, ioh, EEPROM_REG, temp & ~0x10);
for (i=0; i<6; ++i) {
bus_io_write_1(bc, ioh, I_ADD(i), sc->sc_arpcom.ac_enaddr[i]);
bus_space_write_1(iot, ioh, I_ADD(i), sc->sc_arpcom.ac_enaddr[i]);
}
temp = bus_io_read_1(bc, ioh, REG1);
bus_io_write_1(bc, ioh, REG1, temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP |
temp = bus_space_read_1(iot, ioh, REG1);
bus_space_write_1(iot, ioh, REG1, temp | XMT_CHAIN_INT | XMT_CHAIN_ERRSTOP |
RCV_DISCARD_BAD);
temp = bus_io_read_1(bc, ioh, RECV_MODES_REG);
bus_io_write_1(bc, ioh, RECV_MODES_REG, temp | MATCH_BRDCST);
temp = bus_space_read_1(iot, ioh, RECV_MODES_REG);
bus_space_write_1(iot, ioh, RECV_MODES_REG, temp | MATCH_BRDCST);
#ifdef IYDEBUG
printf("%s: RECV_MODES were %b set to %b\n",
sc->sc_dev.dv_xname,
@ -433,7 +433,7 @@ struct iy_softc *sc;
DELAY(500000); /* for the hardware to test for the connector */
temp = bus_io_read_1(bc, ioh, MEDIA_SELECT);
temp = bus_space_read_1(iot, ioh, MEDIA_SELECT);
#ifdef IYDEBUG
printf("%s: media select was 0x%b ", sc->sc_dev.dv_xname,
temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC");
@ -457,62 +457,62 @@ struct iy_softc *sc;
}
bus_io_write_1(bc, ioh, MEDIA_SELECT, temp);
bus_space_write_1(iot, ioh, MEDIA_SELECT, temp);
#ifdef IYDEBUG
printf("changed to 0x%b\n",
temp, "\020\1LnkInDis\2PolCor\3TPE\4JabberDis\5NoAport\6BNC");
#endif
bus_io_write_1(bc, ioh, 0, BANK_SEL(1));
bus_space_write_1(iot, ioh, 0, BANK_SEL(1));
temp = bus_io_read_1(bc, ioh, INT_NO_REG);
bus_io_write_1(bc, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq);
temp = bus_space_read_1(iot, ioh, INT_NO_REG);
bus_space_write_1(iot, ioh, INT_NO_REG, (temp & 0xf8) | sc->mappedirq);
#ifdef IYDEBUG
printf("%s: int no was %b\n", sc->sc_dev.dv_xname,
temp, "\020\4bad_irq\010flash/boot present");
temp = bus_io_read_1(bc, ioh, INT_NO_REG);
temp = bus_space_read_1(iot, ioh, INT_NO_REG);
printf("%s: int no now 0x%02x\n", sc->sc_dev.dv_xname,
temp, "\020\4BAD IRQ\010flash/boot present");
#endif
bus_io_write_1(bc, ioh, RCV_LOWER_LIMIT_REG, 0);
bus_io_write_1(bc, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8);
bus_io_write_1(bc, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8);
bus_io_write_1(bc, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8);
bus_space_write_1(iot, ioh, RCV_LOWER_LIMIT_REG, 0);
bus_space_write_1(iot, ioh, RCV_UPPER_LIMIT_REG, (sc->rx_size - 2) >> 8);
bus_space_write_1(iot, ioh, XMT_LOWER_LIMIT_REG, sc->rx_size >> 8);
bus_space_write_1(iot, ioh, XMT_UPPER_LIMIT_REG, sc->sram >> 8);
temp = bus_io_read_1(bc, ioh, REG1);
temp = bus_space_read_1(iot, ioh, REG1);
#ifdef IYDEBUG
printf("%s: HW access is %b\n", sc->sc_dev.dv_xname,
temp, "\020\2WORD_WIDTH\010INT_ENABLE");
#endif
bus_io_write_1(bc, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */
bus_space_write_1(iot, ioh, REG1, temp | INT_ENABLE); /* XXX what about WORD_WIDTH? */
#ifdef IYDEBUG
temp = bus_io_read_1(bc, ioh, REG1);
temp = bus_space_read_1(iot, ioh, REG1);
printf("%s: HW access is %b\n", sc->sc_dev.dv_xname,
temp, "\020\2WORD_WIDTH\010INT_ENABLE");
#endif
bus_io_write_1(bc, ioh, 0, BANK_SEL(0));
bus_space_write_1(iot, ioh, 0, BANK_SEL(0));
bus_io_write_1(bc, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT));
bus_io_write_1(bc, ioh, STATUS_REG, ALL_INTS); /* clear ints */
bus_space_write_1(iot, ioh, INT_MASK_REG, ALL_INTS & ~(RX_BIT|TX_BIT));
bus_space_write_1(iot, ioh, STATUS_REG, ALL_INTS); /* clear ints */
bus_io_write_2(bc, ioh, RCV_START_LOW, 0);
bus_io_write_2(bc, ioh, RCV_STOP_LOW, sc->rx_size - 2);
bus_space_write_2(iot, ioh, RCV_START_LOW, 0);
bus_space_write_2(iot, ioh, RCV_STOP_LOW, sc->rx_size - 2);
sc->rx_start = 0;
bus_io_write_1(bc, ioh, 0, SEL_RESET_CMD);
bus_space_write_1(iot, ioh, 0, SEL_RESET_CMD);
DELAY(200);
bus_io_write_2(bc, ioh, XMT_ADDR_REG, sc->rx_size);
bus_space_write_2(iot, ioh, XMT_ADDR_REG, sc->rx_size);
sc->tx_start = sc->tx_end = sc->rx_size;
sc->tx_last = 0;
bus_io_write_1(bc, ioh, 0, RCV_ENABLE_CMD);
bus_space_write_1(iot, ioh, 0, RCV_ENABLE_CMD);
ifp->if_flags |= IFF_RUNNING;
ifp->if_flags &= ~IFF_OACTIVE;
@ -531,8 +531,8 @@ struct ifnet *ifp;
int avail;
caddr_t data;
u_int16_t resval, stat;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
#ifdef IYDEBUG
printf("iystart called\n");
@ -541,7 +541,7 @@ struct ifnet *ifp;
return;
sc = ifp->if_softc;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
while ((m0 = ifp->if_snd.ifq_head) != NULL) {
@ -613,11 +613,11 @@ struct ifnet *ifp;
end -= sc->tx_size;
}
bus_io_write_2(bc, ioh, HOST_ADDR_REG, last);
bus_io_write_2(bc, ioh, MEM_PORT_REG, XMT_CMD);
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0);
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0);
bus_io_write_2(bc, ioh, MEM_PORT_REG, len + pad);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, last);
bus_space_write_2(iot, ioh, MEM_PORT_REG, XMT_CMD);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0);
bus_space_write_2(iot, ioh, MEM_PORT_REG, len + pad);
residual = resval = 0;
@ -630,12 +630,12 @@ struct ifnet *ifp;
sc->sc_dev.dv_xname);
#endif
resval |= *data << 8;
bus_io_write_2(bc, ioh, MEM_PORT_REG, resval);
bus_space_write_2(iot, ioh, MEM_PORT_REG, resval);
--llen;
++data;
}
if (llen > 1)
bus_io_write_multi_2(bc, ioh, MEM_PORT_REG,
bus_space_write_multi_2(iot, ioh, MEM_PORT_REG,
data, llen>>1);
residual = llen & 1;
if (residual) {
@ -650,11 +650,11 @@ struct ifnet *ifp;
}
if (residual)
bus_io_write_2(bc, ioh, MEM_PORT_REG, resval);
bus_space_write_2(iot, ioh, MEM_PORT_REG, resval);
pad >>= 1;
while (pad-- > 0)
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0);
#ifdef IYDEBUG
printf("%s: new last = 0x%x, end = 0x%x.\n",
@ -664,34 +664,34 @@ struct ifnet *ifp;
#endif
if (sc->tx_start != sc->tx_end) {
bus_io_write_2(bc, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT);
stat = bus_io_read_2(bc, ioh, MEM_PORT_REG);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_COUNT);
stat = bus_space_read_2(iot, ioh, MEM_PORT_REG);
bus_io_write_2(bc, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN);
bus_io_write_2(bc, ioh, MEM_PORT_REG, last);
bus_io_write_2(bc, ioh, MEM_PORT_REG, stat | CHAIN);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_last + XMT_CHAIN);
bus_space_write_2(iot, ioh, MEM_PORT_REG, last);
bus_space_write_2(iot, ioh, MEM_PORT_REG, stat | CHAIN);
#ifdef IYDEBUG
printf("%s: setting 0x%x to 0x%x\n",
sc->sc_dev.dv_xname, sc->tx_last + XMT_COUNT,
stat | CHAIN);
#endif
}
stat = bus_io_read_2(bc, ioh, MEM_PORT_REG); /* dummy read */
stat = bus_space_read_2(iot, ioh, MEM_PORT_REG); /* dummy read */
/* XXX todo: enable ints here if disabled */
++ifp->if_opackets;
if (sc->tx_start == sc->tx_end) {
bus_io_write_2(bc, ioh, XMT_ADDR_REG, last);
bus_io_write_1(bc, ioh, 0, XMT_CMD);
bus_space_write_2(iot, ioh, XMT_ADDR_REG, last);
bus_space_write_1(iot, ioh, 0, XMT_CMD);
sc->tx_start = last;
#ifdef IYDEBUG
printf("%s: writing 0x%x to XAR and giving XCMD\n",
sc->sc_dev.dv_xname, last);
#endif
} else {
bus_io_write_1(bc, ioh, 0, RESUME_XMT_CMD);
bus_space_write_1(iot, ioh, 0, RESUME_XMT_CMD);
#ifdef IYDEBUG
printf("%s: giving RESUME_XCMD\n",
sc->sc_dev.dv_xname);
@ -704,74 +704,74 @@ struct ifnet *ifp;
static __inline void
eepromwritebit(bc, ioh, ioff, what)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_size_t ioff;
eepromwritebit(iot, ioh, ioff, what)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_size_t ioff;
int what;
{
bus_io_write_1(bc, ioh, ioff, what);
bus_space_write_1(iot, ioh, ioff, what);
delay(1);
bus_io_write_1(bc, ioh, ioff, what|EESK);
bus_space_write_1(iot, ioh, ioff, what|EESK);
delay(1);
bus_io_write_1(bc, ioh, ioff, what);
bus_space_write_1(iot, ioh, ioff, what);
delay(1);
}
static __inline int
eepromreadbit(bc, ioh, ioff)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_size_t ioff;
eepromreadbit(iot, ioh, ioff)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_size_t ioff;
{
int b;
bus_io_write_1(bc, ioh, ioff, EECS|EESK);
bus_space_write_1(iot, ioh, ioff, EECS|EESK);
delay(1);
b = bus_io_read_1(bc, ioh, ioff);
bus_io_write_1(bc, ioh, ioff, EECS);
b = bus_space_read_1(iot, ioh, ioff);
bus_space_write_1(iot, ioh, ioff, EECS);
delay(1);
return ((b & EEDO) != 0);
}
static u_int16_t
eepromread(bc, ioh, ioff, offset)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_size_t ioff;
eepromread(iot, ioh, ioff, offset)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_size_t ioff;
int offset;
{
volatile int i;
volatile int j;
volatile u_int16_t readval;
bus_io_write_1(bc, ioh, 0, BANK_SEL(2));
bus_space_write_1(iot, ioh, 0, BANK_SEL(2));
delay(1);
bus_io_write_1(bc, ioh, ioff, EECS); /* XXXX??? */
bus_space_write_1(iot, ioh, ioff, EECS); /* XXXX??? */
delay(1);
eepromwritebit(bc, ioh, ioff, EECS|EEDI);
eepromwritebit(bc, ioh, ioff, EECS|EEDI);
eepromwritebit(bc, ioh, ioff, EECS);
eepromwritebit(iot, ioh, ioff, EECS|EEDI);
eepromwritebit(iot, ioh, ioff, EECS|EEDI);
eepromwritebit(iot, ioh, ioff, EECS);
for (j=5; j>=0; --j) {
if ((offset>>j) & 1)
eepromwritebit(bc, ioh, ioff, EECS|EEDI);
eepromwritebit(iot, ioh, ioff, EECS|EEDI);
else
eepromwritebit(bc, ioh, ioff, EECS);
eepromwritebit(iot, ioh, ioff, EECS);
}
for (readval=0, i=0; i<16; ++i) {
readval<<=1;
readval |= eepromreadbit(bc, ioh, ioff);
readval |= eepromreadbit(iot, ioh, ioff);
}
bus_io_write_1(bc, ioh, ioff, 0|EESK);
bus_space_write_1(iot, ioh, ioff, 0|EESK);
delay(1);
bus_io_write_1(bc, ioh, ioff, 0);
bus_space_write_1(iot, ioh, ioff, 0);
bus_io_write_1(bc, ioh, ioff, BANK_SEL(0));
bus_space_write_1(iot, ioh, ioff, BANK_SEL(0));
return readval;
}
@ -799,21 +799,21 @@ iyintr(arg)
void *arg;
{
struct iy_softc *sc = arg;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
register u_short status;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
status = bus_io_read_1(bc, ioh, STATUS_REG);
status = bus_space_read_1(iot, ioh, STATUS_REG);
#ifdef IYDEBUG
if (status & ALL_INTS) {
printf("%s: got interupt %b", sc->sc_dev.dv_xname, status,
"\020\1RX_STP\2RX\3TX\4EXEC");
if (status & EXEC_INT)
printf(" event %b\n", bus_io_read_1(bc, ioh, 0),
printf(" event %b\n", bus_space_read_1(iot, ioh, 0),
"\020\6ABORT");
else
printf("\n");
@ -824,19 +824,19 @@ iyintr(arg)
if (status & RX_INT) {
iy_intr_rx(sc);
bus_io_write_1(bc, ioh, STATUS_REG, RX_INT);
bus_space_write_1(iot, ioh, STATUS_REG, RX_INT);
} else if (status & TX_INT) {
iy_intr_tx(sc);
bus_io_write_1(bc, ioh, STATUS_REG, TX_INT);
bus_space_write_1(iot, ioh, STATUS_REG, TX_INT);
}
return 1;
}
void
iyget(sc, bc, ioh, rxlen)
iyget(sc, iot, ioh, rxlen)
struct iy_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int rxlen;
{
struct mbuf *m, *top, **mp;
@ -889,13 +889,13 @@ iyget(sc, bc, ioh, rxlen)
if (len > 1) {
len &= ~1;
bus_io_read_multi_2(bc, ioh, MEM_PORT_REG,
bus_space_read_multi_2(iot, ioh, MEM_PORT_REG,
mtod(m, caddr_t), len/2);
} else {
#ifdef IYDEBUG
printf("%s: received odd mbuf\n", sc->sc_dev.dv_xname);
#endif
*(mtod(m, caddr_t)) = bus_io_read_2(bc, ioh,
*(mtod(m, caddr_t)) = bus_space_read_2(iot, ioh,
MEM_PORT_REG);
}
m->m_len = len;
@ -933,24 +933,24 @@ iy_intr_rx(sc)
struct iy_softc *sc;
{
struct ifnet *ifp;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_int rxadrs, rxevnt, rxstatus, rxnext, rxlen;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
ifp = &sc->sc_arpcom.ac_if;
rxadrs = sc->rx_start;
bus_io_write_2(bc, ioh, HOST_ADDR_REG, rxadrs);
rxevnt = bus_io_read_2(bc, ioh, MEM_PORT_REG);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxadrs);
rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG);
rxnext = 0;
while (rxevnt == RCV_DONE) {
rxstatus = bus_io_read_2(bc, ioh, MEM_PORT_REG);
rxnext = bus_io_read_2(bc, ioh, MEM_PORT_REG);
rxlen = bus_io_read_2(bc, ioh, MEM_PORT_REG);
rxstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG);
rxnext = bus_space_read_2(iot, ioh, MEM_PORT_REG);
rxlen = bus_space_read_2(iot, ioh, MEM_PORT_REG);
#ifdef IYDEBUG
printf("%s: pck at 0x%04x stat %b next 0x%x len 0x%x\n",
sc->sc_dev.dv_xname, rxadrs, rxstatus,
@ -958,15 +958,15 @@ struct iy_softc *sc;
"\014CRCERR\015LENERR\016RCVOK\020TYP",
rxnext, rxlen);
#endif
iyget(sc, bc, ioh, rxlen);
iyget(sc, iot, ioh, rxlen);
/* move stop address */
bus_io_write_2(bc, ioh, RCV_STOP_LOW,
bus_space_write_2(iot, ioh, RCV_STOP_LOW,
rxnext == 0 ? sc->rx_size - 2 : rxnext - 2);
bus_io_write_2(bc, ioh, HOST_ADDR_REG, rxnext);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, rxnext);
rxadrs = rxnext;
rxevnt = bus_io_read_2(bc, ioh, MEM_PORT_REG);
rxevnt = bus_space_read_2(iot, ioh, MEM_PORT_REG);
}
sc->rx_start = rxnext;
}
@ -975,24 +975,24 @@ void
iy_intr_tx(sc)
struct iy_softc *sc;
{
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct ifnet *ifp;
u_int txstatus, txstat2, txlen, txnext;
ifp = &sc->sc_arpcom.ac_if;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
while (sc->tx_start != sc->tx_end) {
bus_io_write_2(bc, ioh, HOST_ADDR_REG, sc->tx_start);
txstatus = bus_io_read_2(bc, ioh, MEM_PORT_REG);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, sc->tx_start);
txstatus = bus_space_read_2(iot, ioh, MEM_PORT_REG);
if ((txstatus & (TX_DONE|CMD_MASK)) != (TX_DONE|XMT_CMD))
break;
txstat2 = bus_io_read_2(bc, ioh, MEM_PORT_REG);
txnext = bus_io_read_2(bc, ioh, MEM_PORT_REG);
txlen = bus_io_read_2(bc, ioh, MEM_PORT_REG);
txstat2 = bus_space_read_2(iot, ioh, MEM_PORT_REG);
txnext = bus_space_read_2(iot, ioh, MEM_PORT_REG);
txlen = bus_space_read_2(iot, ioh, MEM_PORT_REG);
#ifdef IYDEBUG
printf("txstat 0x%x stat2 0x%b next 0x%x len 0x%x\n",
txstatus, txstat2, "\020\6MAX_COL\7HRT_BEAT\010TX_DEF"
@ -1350,21 +1350,21 @@ void
iyprobemem(sc)
struct iy_softc *sc;
{
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
int testing;
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
bus_io_write_2(bc, ioh, HOST_ADDR_REG, 4096-2);
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, 4096-2);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0);
for (testing=65536; testing >= 4096; testing >>= 1) {
bus_io_write_2(bc, ioh, HOST_ADDR_REG, testing-2);
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0xdead);
bus_io_write_2(bc, ioh, HOST_ADDR_REG, testing-2);
if (bus_io_read_2(bc, ioh, MEM_PORT_REG) != 0xdead) {
bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xdead);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2);
if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xdead) {
#ifdef IYMEMDEBUG
printf("%s: Didn't keep 0xdead at 0x%x\n",
sc->sc_dev.dv_xname, testing-2);
@ -1372,10 +1372,10 @@ iyprobemem(sc)
continue;
}
bus_io_write_2(bc, ioh, HOST_ADDR_REG, testing-2);
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0xbeef);
bus_io_write_2(bc, ioh, HOST_ADDR_REG, testing-2);
if (bus_io_read_2(bc, ioh, MEM_PORT_REG) != 0xbeef) {
bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0xbeef);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing-2);
if (bus_space_read_2(iot, ioh, MEM_PORT_REG) != 0xbeef) {
#ifdef IYMEMDEBUG
printf("%s: Didn't keep 0xbeef at 0x%x\n",
sc->sc_dev.dv_xname, testing-2);
@ -1383,12 +1383,12 @@ iyprobemem(sc)
continue;
}
bus_io_write_2(bc, ioh, HOST_ADDR_REG, 0);
bus_io_write_2(bc, ioh, MEM_PORT_REG, 0);
bus_io_write_2(bc, ioh, HOST_ADDR_REG, testing >> 1);
bus_io_write_2(bc, ioh, MEM_PORT_REG, testing >> 1);
bus_io_write_2(bc, ioh, HOST_ADDR_REG, 0);
if (bus_io_read_2(bc, ioh, MEM_PORT_REG) == (testing >> 1)) {
bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0);
bus_space_write_2(iot, ioh, MEM_PORT_REG, 0);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, testing >> 1);
bus_space_write_2(iot, ioh, MEM_PORT_REG, testing >> 1);
bus_space_write_2(iot, ioh, HOST_ADDR_REG, 0);
if (bus_space_read_2(iot, ioh, MEM_PORT_REG) == (testing >> 1)) {
#ifdef IYMEMDEBUG
printf("%s: 0x%x alias of 0x0\n",
sc->sc_dev.dv_xname, testing >> 1);

5
sys/dev/isa/if_levar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: if_levar.h,v 1.5 1996/05/07 01:50:07 thorpej Exp $ */
/* $NetBSD: if_levar.h,v 1.6 1996/10/21 22:41:06 thorpej Exp $ */
/*
* LANCE Ethernet driver header file
@ -47,7 +47,8 @@ struct le_softc {
struct am7990_softc sc_am7990; /* glue to MI code */
void *sc_ih;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_card;
int sc_rap, sc_rdp; /* offsets to LANCE registers */
};

12
sys/dev/isa/isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: isa.c,v 1.88 1996/10/13 01:37:53 christos Exp $ */
/* $NetBSD: isa.c,v 1.89 1996/10/21 22:41:09 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994 Charles Hannum. All rights reserved.
@ -80,14 +80,15 @@ isaattach(parent, self, aux)
isa_attach_hook(parent, self, iba);
printf("\n");
sc->sc_bc = iba->iba_bc;
sc->sc_iot = iba->iba_iot;
sc->sc_memt = iba->iba_memt;
sc->sc_ic = iba->iba_ic;
/*
* Map port 0x84, which causes a 1.25us delay when read.
* We do this now, since several drivers need it.
*/
if (bus_io_map(sc->sc_bc, 0x84, 1, &sc->sc_delayioh))
if (bus_space_map(sc->sc_iot, 0x84, 1, 0, &sc->sc_delaybah))
panic("isaattach: can't map `delay port'"); /* XXX */
TAILQ_INIT(&sc->sc_subdevs);
@ -129,7 +130,8 @@ isascan(parent, match)
if (cf->cf_fstate == FSTATE_STAR)
panic("clone devices not supported on ISA bus");
ia.ia_bc = sc->sc_bc;
ia.ia_iot = sc->sc_iot;
ia.ia_memt = sc->sc_memt;
ia.ia_ic = sc->sc_ic;
ia.ia_iobase = cf->cf_loc[0];
ia.ia_iosize = 0x666;
@ -137,7 +139,7 @@ isascan(parent, match)
ia.ia_msize = cf->cf_loc[3];
ia.ia_irq = cf->cf_loc[4] == 2 ? 9 : cf->cf_loc[4];
ia.ia_drq = cf->cf_loc[5];
ia.ia_delayioh = sc->sc_delayioh;
ia.ia_delaybah = sc->sc_delaybah;
if ((*cf->cf_attach->ca_match)(parent, dev, &ia) > 0)
config_attach(parent, dev, &ia, isaprint);

21
sys/dev/isa/isavar.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: isavar.h,v 1.23 1996/05/08 23:32:31 thorpej Exp $ */
/* $NetBSD: isavar.h,v 1.24 1996/10/21 22:41:11 thorpej Exp $ */
/*
* Copyright (c) 1995 Chris G. Demetriou
@ -65,8 +65,9 @@ ERROR: COMPILING FOR UNSUPPORTED MACHINE, OR MORE THAN ONE.
* ISA bus attach arguments
*/
struct isabus_attach_args {
char *iba_busname; /* XXX should be common */
bus_chipset_tag_t iba_bc; /* XXX should be common */
char *iba_busname; /* XXX should be common */
bus_space_tag_t iba_iot; /* isa i/o space tag */
bus_space_tag_t iba_memt; /* isa mem space tag */
isa_chipset_tag_t iba_ic;
};
@ -74,7 +75,9 @@ struct isabus_attach_args {
* ISA driver attach arguments
*/
struct isa_attach_args {
bus_chipset_tag_t ia_bc;
bus_space_tag_t ia_iot; /* isa i/o space tag */
bus_space_tag_t ia_memt; /* isa mem space tag */
isa_chipset_tag_t ia_ic;
int ia_iobase; /* base i/o address */
@ -85,7 +88,7 @@ struct isa_attach_args {
u_int ia_msize; /* size of i/o memory */
void *ia_aux; /* driver specific */
bus_io_handle_t ia_delayioh; /* i/o handle for `delay port' */
bus_space_handle_t ia_delaybah; /* i/o handle for `delay port' */
};
#define IOBASEUNK -1 /* i/o address is unknown */
@ -110,16 +113,18 @@ struct isa_softc {
TAILQ_HEAD(, isadev)
sc_subdevs; /* list of all children */
bus_chipset_tag_t sc_bc;
bus_space_tag_t sc_iot; /* isa io space tag */
bus_space_tag_t sc_memt; /* isa mem space tag */
isa_chipset_tag_t sc_ic;
/*
* This i/o handle is used to map port 0x84, which is
* read to provide a 1.25us delay. This i/o handle
* read to provide a 1.25us delay. This access handle
* is mapped in isaattach(), and exported to drivers
* via isa_attach_args.
*/
bus_io_handle_t sc_delayioh;
bus_space_handle_t sc_delaybah;
};
#define cf_iobase cf_loc[0]

100
sys/dev/isa/lpt.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: lpt.c,v 1.41 1996/10/13 01:37:55 christos Exp $ */
/* $NetBSD: lpt.c,v 1.42 1996/10/21 22:41:14 thorpej Exp $ */
/*
* Copyright (c) 1993, 1994 Charles Hannum.
@ -93,8 +93,8 @@ struct lpt_softc {
u_char *sc_cp;
int sc_spinmax;
int sc_iobase;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_irq;
u_char sc_state;
#define LPT_OPEN 0x01 /* device is open */
@ -128,36 +128,36 @@ struct cfdriver lpt_cd = {
#define LPS_INVERT (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK)
#define LPS_MASK (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK|LPS_NOPAPER)
#define NOT_READY() ((bus_io_read_1(bc, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_io_read_1(bc, ioh, lpt_status), sc)
#define NOT_READY() ((bus_space_read_1(iot, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_space_read_1(iot, ioh, lpt_status), sc)
static int not_ready __P((u_char, struct lpt_softc *));
static void lptwakeup __P((void *arg));
static int pushbytes __P((struct lpt_softc *));
int lpt_port_test __P((bus_chipset_tag_t, bus_io_handle_t, bus_io_addr_t,
bus_io_size_t, u_char, u_char));
int lpt_port_test __P((bus_space_tag_t, bus_space_handle_t, bus_addr_t,
bus_size_t, u_char, u_char));
/*
* Internal routine to lptprobe to do port tests of one byte value.
*/
int
lpt_port_test(bc, ioh, base, off, data, mask)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_addr_t base;
bus_io_size_t off;
lpt_port_test(iot, ioh, base, off, data, mask)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t base;
bus_size_t off;
u_char data, mask;
{
int timeout;
u_char temp;
data &= mask;
bus_io_write_1(bc, ioh, off, data);
bus_space_write_1(iot, ioh, off, data);
timeout = 1000;
do {
delay(10);
temp = bus_io_read_1(bc, ioh, off) & mask;
temp = bus_space_read_1(iot, ioh, off) & mask;
} while (temp != data && --timeout);
LPRINTF(("lpt: port=0x%x out=0x%x in=0x%x timeout=%d\n", base + off,
data, temp, timeout));
@ -191,8 +191,8 @@ lptprobe(parent, match, aux)
void *match, *aux;
{
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_long base;
u_char mask, data;
int i, rv;
@ -204,36 +204,36 @@ lptprobe(parent, match, aux)
#define ABORT goto out
#endif
bc = ia->ia_bc;
iot = ia->ia_iot;
base = ia->ia_iobase;
if (bus_io_map(bc, base, LPT_NPORTS, &ioh))
if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh))
return 0;
rv = 0;
mask = 0xff;
data = 0x55; /* Alternating zeros */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
data = 0xaa; /* Alternating ones */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
for (i = 0; i < CHAR_BIT; i++) { /* Walking zero */
data = ~(1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
for (i = 0; i < CHAR_BIT; i++) { /* Walking one */
data = (1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
bus_io_write_1(bc, ioh, lpt_data, 0);
bus_io_write_1(bc, ioh, lpt_control, 0);
bus_space_write_1(iot, ioh, lpt_data, 0);
bus_space_write_1(iot, ioh, lpt_control, 0);
ia->ia_iosize = LPT_NPORTS;
ia->ia_msize = 0;
@ -241,7 +241,7 @@ lptprobe(parent, match, aux)
rv = 1;
out:
bus_io_unmap(bc, ioh, LPT_NPORTS);
bus_space_unmap(iot, ioh, LPT_NPORTS);
return rv;
}
@ -252,8 +252,8 @@ lptattach(parent, self, aux)
{
struct lpt_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
if (ia->ia_irq != IRQUNK)
printf("\n");
@ -264,12 +264,12 @@ lptattach(parent, self, aux)
sc->sc_irq = ia->ia_irq;
sc->sc_state = 0;
bc = sc->sc_bc = ia->ia_bc;
if (bus_io_map(bc, sc->sc_iobase, LPT_NPORTS, &ioh))
iot = sc->sc_iot = ia->ia_iot;
if (bus_space_map(iot, sc->sc_iobase, LPT_NPORTS, 0, &ioh))
panic("lptattach: couldn't map I/O ports");
sc->sc_ioh = ioh;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
if (ia->ia_irq != IRQUNK)
sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
@ -289,8 +289,8 @@ lptopen(dev, flag, mode, p)
int unit = LPTUNIT(dev);
u_char flags = LPTFLAGS(dev);
struct lpt_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_char control;
int error;
int spin;
@ -316,17 +316,17 @@ lptopen(dev, flag, mode, p)
sc->sc_state = LPT_INIT;
sc->sc_flags = flags;
LPRINTF(("%s: open: flags=0x%x\n", sc->sc_dev.dv_xname, flags));
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
if ((flags & LPT_NOPRIME) == 0) {
/* assert INIT for 100 usec to start up printer */
bus_io_write_1(bc, ioh, lpt_control, LPC_SELECT);
bus_space_write_1(iot, ioh, lpt_control, LPC_SELECT);
delay(100);
}
control = LPC_SELECT | LPC_NINIT;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* wait till ready (printer running diagnostics) */
for (spin = 0; NOT_READY_ERR(); spin += STEP) {
@ -348,7 +348,7 @@ lptopen(dev, flag, mode, p)
if (flags & LPT_AUTOLF)
control |= LPC_AUTOLF;
sc->sc_control = control;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_inbuf = geteblk(LPT_BSIZE);
sc->sc_count = 0;
@ -408,8 +408,8 @@ lptclose(dev, flag, mode, p)
{
int unit = LPTUNIT(dev);
struct lpt_softc *sc = lpt_cd.cd_devs[unit];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (sc->sc_count)
(void) pushbytes(sc);
@ -417,9 +417,9 @@ lptclose(dev, flag, mode, p)
if ((sc->sc_flags & LPT_NOINTR) == 0)
untimeout(lptwakeup, sc);
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
sc->sc_state = 0;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
brelse(sc->sc_inbuf);
LPRINTF(("%s: closed\n", sc->sc_dev.dv_xname));
@ -430,8 +430,8 @@ int
pushbytes(sc)
struct lpt_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
if (sc->sc_flags & LPT_NOINTR) {
@ -459,10 +459,10 @@ pushbytes(sc)
break;
}
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* adapt busy-wait algorithm */
if (spin*2 + 16 < sc->sc_spinmax)
@ -529,8 +529,8 @@ lptintr(arg)
void *arg;
{
struct lpt_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
#if 0
if ((sc->sc_state & LPT_OPEN) == 0)
@ -544,10 +544,10 @@ lptintr(arg)
if (sc->sc_count) {
u_char control = sc->sc_control;
/* send char */
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_state |= LPT_OBUSY;
} else
sc->sc_state &= ~LPT_OBUSY;

100
sys/dev/isa/lpt_isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: lpt_isa.c,v 1.41 1996/10/13 01:37:55 christos Exp $ */
/* $NetBSD: lpt_isa.c,v 1.42 1996/10/21 22:41:14 thorpej Exp $ */
/*
* Copyright (c) 1993, 1994 Charles Hannum.
@ -93,8 +93,8 @@ struct lpt_softc {
u_char *sc_cp;
int sc_spinmax;
int sc_iobase;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_irq;
u_char sc_state;
#define LPT_OPEN 0x01 /* device is open */
@ -128,36 +128,36 @@ struct cfdriver lpt_cd = {
#define LPS_INVERT (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK)
#define LPS_MASK (LPS_SELECT|LPS_NERR|LPS_NBSY|LPS_NACK|LPS_NOPAPER)
#define NOT_READY() ((bus_io_read_1(bc, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_io_read_1(bc, ioh, lpt_status), sc)
#define NOT_READY() ((bus_space_read_1(iot, ioh, lpt_status) ^ LPS_INVERT) & LPS_MASK)
#define NOT_READY_ERR() not_ready(bus_space_read_1(iot, ioh, lpt_status), sc)
static int not_ready __P((u_char, struct lpt_softc *));
static void lptwakeup __P((void *arg));
static int pushbytes __P((struct lpt_softc *));
int lpt_port_test __P((bus_chipset_tag_t, bus_io_handle_t, bus_io_addr_t,
bus_io_size_t, u_char, u_char));
int lpt_port_test __P((bus_space_tag_t, bus_space_handle_t, bus_addr_t,
bus_size_t, u_char, u_char));
/*
* Internal routine to lptprobe to do port tests of one byte value.
*/
int
lpt_port_test(bc, ioh, base, off, data, mask)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_io_addr_t base;
bus_io_size_t off;
lpt_port_test(iot, ioh, base, off, data, mask)
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t base;
bus_size_t off;
u_char data, mask;
{
int timeout;
u_char temp;
data &= mask;
bus_io_write_1(bc, ioh, off, data);
bus_space_write_1(iot, ioh, off, data);
timeout = 1000;
do {
delay(10);
temp = bus_io_read_1(bc, ioh, off) & mask;
temp = bus_space_read_1(iot, ioh, off) & mask;
} while (temp != data && --timeout);
LPRINTF(("lpt: port=0x%x out=0x%x in=0x%x timeout=%d\n", base + off,
data, temp, timeout));
@ -191,8 +191,8 @@ lptprobe(parent, match, aux)
void *match, *aux;
{
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_long base;
u_char mask, data;
int i, rv;
@ -204,36 +204,36 @@ lptprobe(parent, match, aux)
#define ABORT goto out
#endif
bc = ia->ia_bc;
iot = ia->ia_iot;
base = ia->ia_iobase;
if (bus_io_map(bc, base, LPT_NPORTS, &ioh))
if (bus_space_map(iot, base, LPT_NPORTS, 0, &ioh))
return 0;
rv = 0;
mask = 0xff;
data = 0x55; /* Alternating zeros */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
data = 0xaa; /* Alternating ones */
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
for (i = 0; i < CHAR_BIT; i++) { /* Walking zero */
data = ~(1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
for (i = 0; i < CHAR_BIT; i++) { /* Walking one */
data = (1 << i);
if (!lpt_port_test(bc, ioh, base, lpt_data, data, mask))
if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
ABORT;
}
bus_io_write_1(bc, ioh, lpt_data, 0);
bus_io_write_1(bc, ioh, lpt_control, 0);
bus_space_write_1(iot, ioh, lpt_data, 0);
bus_space_write_1(iot, ioh, lpt_control, 0);
ia->ia_iosize = LPT_NPORTS;
ia->ia_msize = 0;
@ -241,7 +241,7 @@ lptprobe(parent, match, aux)
rv = 1;
out:
bus_io_unmap(bc, ioh, LPT_NPORTS);
bus_space_unmap(iot, ioh, LPT_NPORTS);
return rv;
}
@ -252,8 +252,8 @@ lptattach(parent, self, aux)
{
struct lpt_softc *sc = (void *)self;
struct isa_attach_args *ia = aux;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
if (ia->ia_irq != IRQUNK)
printf("\n");
@ -264,12 +264,12 @@ lptattach(parent, self, aux)
sc->sc_irq = ia->ia_irq;
sc->sc_state = 0;
bc = sc->sc_bc = ia->ia_bc;
if (bus_io_map(bc, sc->sc_iobase, LPT_NPORTS, &ioh))
iot = sc->sc_iot = ia->ia_iot;
if (bus_space_map(iot, sc->sc_iobase, LPT_NPORTS, 0, &ioh))
panic("lptattach: couldn't map I/O ports");
sc->sc_ioh = ioh;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
if (ia->ia_irq != IRQUNK)
sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
@ -289,8 +289,8 @@ lptopen(dev, flag, mode, p)
int unit = LPTUNIT(dev);
u_char flags = LPTFLAGS(dev);
struct lpt_softc *sc;
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
bus_space_tag_t iot;
bus_space_handle_t ioh;
u_char control;
int error;
int spin;
@ -316,17 +316,17 @@ lptopen(dev, flag, mode, p)
sc->sc_state = LPT_INIT;
sc->sc_flags = flags;
LPRINTF(("%s: open: flags=0x%x\n", sc->sc_dev.dv_xname, flags));
bc = sc->sc_bc;
iot = sc->sc_iot;
ioh = sc->sc_ioh;
if ((flags & LPT_NOPRIME) == 0) {
/* assert INIT for 100 usec to start up printer */
bus_io_write_1(bc, ioh, lpt_control, LPC_SELECT);
bus_space_write_1(iot, ioh, lpt_control, LPC_SELECT);
delay(100);
}
control = LPC_SELECT | LPC_NINIT;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* wait till ready (printer running diagnostics) */
for (spin = 0; NOT_READY_ERR(); spin += STEP) {
@ -348,7 +348,7 @@ lptopen(dev, flag, mode, p)
if (flags & LPT_AUTOLF)
control |= LPC_AUTOLF;
sc->sc_control = control;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_inbuf = geteblk(LPT_BSIZE);
sc->sc_count = 0;
@ -408,8 +408,8 @@ lptclose(dev, flag, mode, p)
{
int unit = LPTUNIT(dev);
struct lpt_softc *sc = lpt_cd.cd_devs[unit];
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (sc->sc_count)
(void) pushbytes(sc);
@ -417,9 +417,9 @@ lptclose(dev, flag, mode, p)
if ((sc->sc_flags & LPT_NOINTR) == 0)
untimeout(lptwakeup, sc);
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
sc->sc_state = 0;
bus_io_write_1(bc, ioh, lpt_control, LPC_NINIT);
bus_space_write_1(iot, ioh, lpt_control, LPC_NINIT);
brelse(sc->sc_inbuf);
LPRINTF(("%s: closed\n", sc->sc_dev.dv_xname));
@ -430,8 +430,8 @@ int
pushbytes(sc)
struct lpt_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int error;
if (sc->sc_flags & LPT_NOINTR) {
@ -459,10 +459,10 @@ pushbytes(sc)
break;
}
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
/* adapt busy-wait algorithm */
if (spin*2 + 16 < sc->sc_spinmax)
@ -529,8 +529,8 @@ lptintr(arg)
void *arg;
{
struct lpt_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
#if 0
if ((sc->sc_state & LPT_OPEN) == 0)
@ -544,10 +544,10 @@ lptintr(arg)
if (sc->sc_count) {
u_char control = sc->sc_control;
/* send char */
bus_io_write_1(bc, ioh, lpt_data, *sc->sc_cp++);
bus_io_write_1(bc, ioh, lpt_control, control | LPC_STROBE);
bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);
sc->sc_count--;
bus_io_write_1(bc, ioh, lpt_control, control);
bus_space_write_1(iot, ioh, lpt_control, control);
sc->sc_state |= LPT_OBUSY;
} else
sc->sc_state &= ~LPT_OBUSY;

40
sys/dev/isa/rtfps.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: rtfps.c,v 1.26 1996/10/13 01:37:59 christos Exp $ */
/* $NetBSD: rtfps.c,v 1.27 1996/10/21 22:41:18 thorpej Exp $ */
/*
* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
@ -51,14 +51,14 @@ struct rtfps_softc {
struct device sc_dev;
void *sc_ih;
bus_chipset_tag_t sc_bc;
bus_space_tag_t sc_iot;
int sc_iobase;
int sc_irqport;
bus_io_handle_t sc_irqioh;
bus_space_handle_t sc_irqioh;
int sc_alive; /* mask of slave units attached */
void *sc_slaves[NSLAVES]; /* com device unit numbers */
bus_io_handle_t sc_slaveioh[NSLAVES];
bus_space_handle_t sc_slaveioh[NSLAVES];
};
int rtfpsprobe __P((struct device *, void *, void *));
@ -82,8 +82,8 @@ rtfpsprobe(parent, self, aux)
{
struct isa_attach_args *ia = aux;
int iobase = ia->ia_iobase;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int i, rv = 1;
/*
@ -97,12 +97,12 @@ rtfpsprobe(parent, self, aux)
if (iobase == comconsaddr && !comconsattached)
goto checkmappings;
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
rv = comprobe1(bc, ioh, iobase);
bus_io_unmap(bc, ioh, COM_NPORTS);
rv = comprobe1(iot, ioh, iobase);
bus_space_unmap(iot, ioh, COM_NPORTS);
if (rv == 0)
goto out;
@ -113,11 +113,11 @@ checkmappings:
if (iobase == comconsaddr && !comconsattached)
continue;
if (bus_io_map(bc, iobase, COM_NPORTS, &ioh)) {
if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) {
rv = 0;
goto out;
}
bus_io_unmap(bc, ioh, COM_NPORTS);
bus_space_unmap(iot, ioh, COM_NPORTS);
}
out:
@ -153,10 +153,10 @@ rtfpsattach(parent, self, aux)
IOBASEUNK, 0x2f2, 0x6f2, 0x6f3,
IOBASEUNK, IOBASEUNK, IOBASEUNK, IOBASEUNK
};
bus_chipset_tag_t bc = ia->ia_bc;
bus_space_tag_t iot = ia->ia_iot;
int i;
sc->sc_bc = ia->ia_bc;
sc->sc_iot = ia->ia_iot;
sc->sc_iobase = ia->ia_iobase;
if (ia->ia_irq >= 16 || irqport[ia->ia_irq] == IOBASEUNK)
@ -164,20 +164,20 @@ rtfpsattach(parent, self, aux)
sc->sc_irqport = irqport[ia->ia_irq];
for (i = 0; i < NSLAVES; i++)
if (bus_io_map(bc, sc->sc_iobase + i * COM_NPORTS, COM_NPORTS,
&sc->sc_slaveioh[i]))
if (bus_space_map(iot, sc->sc_iobase + i * COM_NPORTS,
COM_NPORTS, 0, &sc->sc_slaveioh[i]))
panic("rtfpsattach: couldn't map slave %d", i);
if (bus_io_map(bc, sc->sc_irqport, 1, &sc->sc_irqioh))
if (bus_space_map(iot, sc->sc_irqport, 1, 0, &sc->sc_irqioh))
panic("rtfpsattach: couldn't map irq port at 0x%x\n",
sc->sc_irqport);
bus_io_write_1(bc, sc->sc_irqioh, 0, 0);
bus_space_write_1(iot, sc->sc_irqioh, 0, 0);
printf("\n");
for (i = 0; i < NSLAVES; i++) {
ca.ca_slave = i;
ca.ca_bc = sc->sc_bc;
ca.ca_iot = sc->sc_iot;
ca.ca_ioh = sc->sc_slaveioh[i];
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
ca.ca_noien = 0;
@ -196,10 +196,10 @@ rtfpsintr(arg)
void *arg;
{
struct rtfps_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_space_tag_t iot = sc->sc_iot;
int alive = sc->sc_alive;
bus_io_write_1(bc, sc->sc_irqioh, 0, 0);
bus_space_write_1(iot, sc->sc_irqioh, 0, 0);
#define TRY(n) \
if (alive & (1 << (n))) \

88
sys/dev/isa/uha_isa.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: uha_isa.c,v 1.4 1996/10/13 01:38:03 christos Exp $ */
/* $NetBSD: uha_isa.c,v 1.5 1996/10/21 22:41:21 thorpej Exp $ */
/*
* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
@ -60,7 +60,7 @@ struct cfattach uha_isa_ca = {
#define KVTOPHYS(x) vtophys(x)
int u14_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *));
int u14_find __P((bus_space_tag_t, bus_space_handle_t, struct uha_softc *));
void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *));
int u14_poll __P((struct uha_softc *, struct scsi_xfer *, int));
int u14_intr __P((void *));
@ -78,16 +78,16 @@ uha_isa_probe(parent, match, aux)
{
struct isa_attach_args *ia = aux;
struct uha_softc sc;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int rv;
if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh))
if (bus_space_map(iot, ia->ia_iobase, UHA_ISA_IOSIZE, 0, &ioh))
return (0);
rv = u14_find(bc, ioh, &sc);
rv = u14_find(iot, ioh, &sc);
bus_io_unmap(bc, ioh, UHA_ISA_IOSIZE);
bus_space_unmap(iot, ioh, UHA_ISA_IOSIZE);
if (rv) {
if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq)
@ -112,18 +112,18 @@ uha_isa_attach(parent, self, aux)
{
struct isa_attach_args *ia = aux;
struct uha_softc *sc = (void *)self;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
isa_chipset_tag_t ic = ia->ia_ic;
printf("\n");
if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh))
panic("uha_attach: bus_io_map failed!");
if (bus_space_map(iot, ia->ia_iobase, UHA_ISA_IOSIZE, 0, &ioh))
panic("uha_attach: bus_space_map failed!");
sc->sc_bc = bc;
sc->sc_iot = iot;
sc->sc_ioh = ioh;
if (!u14_find(bc, ioh, sc))
if (!u14_find(iot, ioh, sc))
panic("uha_attach: u14_find failed!");
if (sc->sc_drq != -1)
@ -149,22 +149,22 @@ uha_isa_attach(parent, self, aux)
* Start the board, ready for normal operation
*/
int
u14_find(bc, ioh, sc)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
u14_find(iot, ioh, sc)
bus_space_tag_t iot;
bus_space_handle_t ioh;
struct uha_softc *sc;
{
u_int16_t model, config;
int irq, drq;
int resetcount = 4000; /* 4 secs? */
model = (bus_io_read_1(bc, ioh, U14_ID + 0) << 8) |
(bus_io_read_1(bc, ioh, U14_ID + 1) << 0);
model = (bus_space_read_1(iot, ioh, U14_ID + 0) << 8) |
(bus_space_read_1(iot, ioh, U14_ID + 1) << 0);
if ((model & 0xfff0) != 0x5640)
return (0);
config = (bus_io_read_1(bc, ioh, U14_CONFIG + 0) << 8) |
(bus_io_read_1(bc, ioh, U14_CONFIG + 1) << 0);
config = (bus_space_read_1(iot, ioh, U14_CONFIG + 0) << 8) |
(bus_space_read_1(iot, ioh, U14_CONFIG + 1) << 0);
switch (model & 0x000f) {
case 0x0000:
@ -212,10 +212,10 @@ u14_find(bc, ioh, sc)
return (0);
}
bus_io_write_1(bc, ioh, U14_LINT, UHA_ASRST);
bus_space_write_1(iot, ioh, U14_LINT, UHA_ASRST);
while (--resetcount) {
if (bus_io_read_1(bc, ioh, U14_LINT))
if (bus_space_read_1(iot, ioh, U14_LINT))
break;
delay(1000); /* 1 mSec per loop */
}
@ -242,12 +242,12 @@ u14_start_mbox(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
int spincount = 100000; /* 1s should be enough */
while (--spincount) {
if ((bus_io_read_1(bc, ioh, U14_LINT) & U14_LDIP) == 0)
if ((bus_space_read_1(iot, ioh, U14_LINT) & U14_LDIP) == 0)
break;
delay(100);
}
@ -257,11 +257,11 @@ u14_start_mbox(sc, mscp)
Debugger();
}
bus_io_write_4(bc, ioh, U14_OGMPTR, KVTOPHYS(mscp));
bus_space_write_4(iot, ioh, U14_OGMPTR, KVTOPHYS(mscp));
if (mscp->flags & MSCP_ABORT)
bus_io_write_1(bc, ioh, U14_LINT, U14_ABORT);
bus_space_write_1(iot, ioh, U14_LINT, U14_ABORT);
else
bus_io_write_1(bc, ioh, U14_LINT, U14_OGMFULL);
bus_space_write_1(iot, ioh, U14_LINT, U14_OGMFULL);
if ((mscp->xs->flags & SCSI_POLL) == 0)
timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000);
@ -278,15 +278,15 @@ u14_poll(sc, xs, count)
struct scsi_xfer *xs;
int count;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
while (count) {
/*
* If we had interrupts enabled, would we
* have got an interrupt?
*/
if (bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP)
if (bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP)
u14_intr(sc);
if (xs->flags & ITSDONE)
return (0);
@ -304,8 +304,8 @@ u14_intr(arg)
void *arg;
{
struct uha_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
struct uha_mscp *mscp;
u_char uhastat;
u_long mboxval;
@ -314,7 +314,7 @@ u14_intr(arg)
printf("%s: uhaintr ", sc->sc_dev.dv_xname);
#endif /*UHADEBUG */
if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0)
if ((bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP) == 0)
return (0);
for (;;) {
@ -322,10 +322,10 @@ u14_intr(arg)
* First get all the information and then
* acknowledge the interrupt
*/
uhastat = bus_io_read_1(bc, ioh, U14_SINT);
mboxval = bus_io_read_4(bc, ioh, U14_ICMPTR);
uhastat = bus_space_read_1(iot, ioh, U14_SINT);
mboxval = bus_space_read_4(iot, ioh, U14_ICMPTR);
/* XXX Send an ABORT_ACK instead? */
bus_io_write_1(bc, ioh, U14_SINT, U14_ICM_ACK);
bus_space_write_1(iot, ioh, U14_SINT, U14_ICM_ACK);
#ifdef UHADEBUG
printf("status = 0x%x ", uhastat);
@ -344,7 +344,7 @@ u14_intr(arg)
untimeout(uha_timeout, mscp);
uha_done(sc, mscp);
if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0)
if ((bus_space_read_1(iot, ioh, U14_SINT) & U14_SDIP) == 0)
return (1);
}
}
@ -353,15 +353,15 @@ void
u14_init(sc)
struct uha_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
/* make sure interrupts are enabled */
#ifdef UHADEBUG
printf("u14_init: lmask=%02x, smask=%02x\n",
bus_io_read_1(bc, ioh, U14_LMASK),
bus_io_read_1(bc, ioh, U14_SMASK));
bus_space_read_1(iot, ioh, U14_LMASK),
bus_space_read_1(iot, ioh, U14_SMASK));
#endif
bus_io_write_1(bc, ioh, U14_LMASK, 0xd1); /* XXX */
bus_io_write_1(bc, ioh, U14_SMASK, 0x91); /* XXX */
bus_space_write_1(iot, ioh, U14_LMASK, 0xd1); /* XXX */
bus_space_write_1(iot, ioh, U14_SMASK, 0x91); /* XXX */
}