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Split the UltraStor driver apart.

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This commit is contained in:
mycroft 1996-08-31 20:26:48 +00:00
parent 06fdef11fd
commit 44bb2d98e1
6 changed files with 1382 additions and 1390 deletions
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307
sys/dev/eisa/uha_eisa.c Normal file
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#include <sys/types.h>
#include <sys/param.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <dev/eisa/eisavar.h>
#include <dev/eisa/eisadevs.h>
#include <dev/ic/uhareg.h>
#include <dev/ic/uhavar.h>
#define UHA_EISA_SLOT_OFFSET 0xc80
#define UHA_EISA_IOSIZE 0x020
int uha_eisa_match __P((struct device *, void *, void *));
void uha_eisa_attach __P((struct device *, struct device *, void *));
struct cfattach uha_eisa_ca = {
sizeof(struct uha_softc), uha_eisa_match, uha_eisa_attach
};
#define KVTOPHYS(x) vtophys(x)
int u24_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *));
void u24_start_mbox __P((struct uha_softc *, struct uha_mscp *));
int u24_poll __P((struct uha_softc *, struct scsi_xfer *, int));
int u24_intr __P((void *));
void u24_init __P((struct uha_softc *));
/*
* Check the slots looking for a board we recognise
* If we find one, note it's address (slot) and call
* the actual probe routine to check it out.
*/
int
uha_eisa_match(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct eisa_attach_args *ea = aux;
bus_chipset_tag_t bc = ea->ea_bc;
bus_io_handle_t ioh;
int rv;
/* must match one of our known ID strings */
if (strncmp(ea->ea_idstring, "USC024", 6))
return (0);
if (bus_io_map(bc, EISA_SLOT_ADDR(ea->ea_slot) + UHA_EISA_SLOT_OFFSET,
UHA_EISA_IOSIZE, &ioh))
return (0);
rv = u24_find(bc, ioh, NULL);
bus_io_unmap(bc, ioh, UHA_EISA_IOSIZE);
return (rv);
}
/*
* Attach all the sub-devices we can find
*/
void
uha_eisa_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct eisa_attach_args *ea = aux;
struct uha_softc *sc = (void *)self;
bus_chipset_tag_t bc = ea->ea_bc;
bus_io_handle_t ioh;
eisa_chipset_tag_t ec = ea->ea_ec;
eisa_intr_handle_t ih;
const char *model, *intrstr;
if (!strncmp(ea->ea_idstring, "USC024", 6))
model = EISA_PRODUCT_USC0240;
else
model = "unknown model!";
printf(": %s\n", model);
if (bus_io_map(bc, EISA_SLOT_ADDR(ea->ea_slot) + UHA_EISA_SLOT_OFFSET,
UHA_EISA_IOSIZE, &ioh))
panic("uha_attach: could not map I/O addresses");
sc->sc_bc = bc;
sc->sc_ioh = ioh;
if (!u24_find(bc, ioh, sc))
panic("uha_attach: u24_find failed!");
if (eisa_intr_map(ec, sc->sc_irq, &ih)) {
printf("%s: couldn't map interrupt (%d)\n",
sc->sc_dev.dv_xname, sc->sc_irq);
return;
}
intrstr = eisa_intr_string(ec, ih);
sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
u24_intr, sc);
if (sc->sc_ih == NULL) {
printf("%s: couldn't establish interrupt",
sc->sc_dev.dv_xname);
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
/* Save function pointers for later use. */
sc->start_mbox = u24_start_mbox;
sc->poll = u24_poll;
sc->init = u24_init;
uha_attach(sc);
}
int
u24_find(bc, ioh, sc)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
struct uha_softc *sc;
{
u_int8_t config0, config1, config2;
int irq, drq;
int resetcount = 4000; /* 4 secs? */
config0 = bus_io_read_1(bc, ioh, U24_CONFIG + 0);
config1 = bus_io_read_1(bc, ioh, U24_CONFIG + 1);
config2 = bus_io_read_1(bc, ioh, U24_CONFIG + 2);
if ((config0 & U24_MAGIC1) == 0 ||
(config1 & U24_MAGIC2) == 0)
return (0);
drq = -1;
switch (config0 & U24_IRQ_MASK) {
case U24_IRQ10:
irq = 10;
break;
case U24_IRQ11:
irq = 11;
break;
case U24_IRQ14:
irq = 14;
break;
case U24_IRQ15:
irq = 15;
break;
default:
printf("u24_find: illegal irq setting %x\n",
config0 & U24_IRQ_MASK);
return (0);
}
bus_io_write_1(bc, ioh, U24_LINT, UHA_ASRST);
while (--resetcount) {
if (bus_io_read_1(bc, ioh, U24_LINT))
break;
delay(1000); /* 1 mSec per loop */
}
if (!resetcount) {
printf("u24_find: board timed out during reset\n");
return (0);
}
/* if we want to fill in softc, do so now */
if (sc != NULL) {
sc->sc_irq = irq;
sc->sc_drq = drq;
sc->sc_scsi_dev = config2 & U24_HOSTID_MASK;
}
return (1);
}
void
u24_start_mbox(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
int spincount = 100000; /* 1s should be enough */
while (--spincount) {
if ((bus_io_read_1(bc, ioh, U24_LINT) & U24_LDIP) == 0)
break;
delay(100);
}
if (!spincount) {
printf("%s: uha_start_mbox, board not responding\n",
sc->sc_dev.dv_xname);
Debugger();
}
bus_io_write_4(bc, ioh, U24_OGMPTR, KVTOPHYS(mscp));
if (mscp->flags & MSCP_ABORT)
bus_io_write_1(bc, ioh, U24_OGMCMD, 0x80);
else
bus_io_write_1(bc, ioh, U24_OGMCMD, 0x01);
bus_io_write_1(bc, ioh, U24_LINT, U24_OGMFULL);
if ((mscp->xs->flags & SCSI_POLL) == 0)
timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000);
}
int
u24_poll(sc, xs, count)
struct uha_softc *sc;
struct scsi_xfer *xs;
int count;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
while (count) {
/*
* If we had interrupts enabled, would we
* have got an interrupt?
*/
if (bus_io_read_1(bc, ioh, U24_SINT) & U24_SDIP)
u24_intr(sc);
if (xs->flags & ITSDONE)
return (0);
delay(1000);
count--;
}
return (1);
}
int
u24_intr(arg)
void *arg;
{
struct uha_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
struct uha_mscp *mscp;
u_char uhastat;
u_long mboxval;
#ifdef UHADEBUG
printf("%s: uhaintr ", sc->sc_dev.dv_xname);
#endif /*UHADEBUG */
if ((bus_io_read_1(bc, ioh, U24_SINT) & U24_SDIP) == 0)
return (0);
for (;;) {
/*
* First get all the information and then
* acknowledge the interrupt
*/
uhastat = bus_io_read_1(bc, ioh, U24_SINT);
mboxval = bus_io_read_4(bc, ioh, U24_ICMPTR);
bus_io_write_1(bc, ioh, U24_SINT, U24_ICM_ACK);
bus_io_write_1(bc, ioh, U24_ICMCMD, 0);
#ifdef UHADEBUG
printf("status = 0x%x ", uhastat);
#endif /*UHADEBUG*/
/*
* Process the completed operation
*/
mscp = uha_mscp_phys_kv(sc, mboxval);
if (!mscp) {
printf("%s: BAD MSCP RETURNED!\n",
sc->sc_dev.dv_xname);
continue; /* whatever it was, it'll timeout */
}
untimeout(uha_timeout, mscp);
uha_done(sc, mscp);
if ((bus_io_read_1(bc, ioh, U24_SINT) & U24_SDIP) == 0)
return (1);
}
}
void
u24_init(sc)
struct uha_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
/* free OGM and ICM */
bus_io_write_1(bc, ioh, U24_OGMCMD, 0);
bus_io_write_1(bc, ioh, U24_ICMCMD, 0);
/* make sure interrupts are enabled */
#ifdef UHADEBUG
printf("u24_init: lmask=%02x, smask=%02x\n",
bus_io_read_1(bc, ioh, U24_LMASK),
bus_io_read_1(bc, ioh, U24_SMASK));
#endif
bus_io_write_1(bc, ioh, U24_LMASK, 0xd2); /* XXX */
bus_io_write_1(bc, ioh, U24_SMASK, 0x92); /* XXX */
}

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sys/dev/ic/uha.c Normal file
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/* $NetBSD: uha.c,v 1.1 1996/08/31 20:26:50 mycroft Exp $ */
#undef UHADEBUG
#ifdef DDB
#define integrate
#else
#define integrate static inline
#endif
/*
* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles M. Hannum.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Ported for use with the UltraStor 14f by Gary Close (gclose@wvnvms.wvnet.edu)
* Slight fixes to timeouts to run with the 34F
* Thanks to Julian Elischer for advice and help with this port.
*
* Originally written by Julian Elischer (julian@tfs.com)
* for TRW Financial Systems for use under the MACH(2.5) operating system.
*
* TRW Financial Systems, in accordance with their agreement with Carnegie
* Mellon University, makes this software available to CMU to distribute
* or use in any manner that they see fit as long as this message is kept with
* the software. For this reason TFS also grants any other persons or
* organisations permission to use or modify this software.
*
* TFS supplies this software to be publicly redistributed
* on the understanding that TFS is not responsible for the correct
* functioning of this software in any circumstances.
*
* commenced: Sun Sep 27 18:14:01 PDT 1992
* slight mod to make work with 34F as well: Wed Jun 2 18:05:48 WST 1993
*/
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/errno.h>
#include <sys/ioctl.h>
#include <sys/device.h>
#include <sys/malloc.h>
#include <sys/buf.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <dev/ic/uhareg.h>
#include <dev/ic/uhavar.h>
#ifndef DDB
#define Debugger() panic("should call debugger here (ultra14f.c)")
#endif /* ! DDB */
#define KVTOPHYS(x) vtophys(x)
void uha_reset_mscp __P((struct uha_softc *, struct uha_mscp *));
void uha_free_mscp __P((struct uha_softc *, struct uha_mscp *));
void uha_init_mscp __P((struct uha_softc *, struct uha_mscp *));
struct uha_mscp *uha_get_mscp __P((struct uha_softc *, int));
void uhaminphys __P((struct buf *));
int uha_scsi_cmd __P((struct scsi_xfer *));
struct scsi_adapter uha_switch = {
uha_scsi_cmd,
uhaminphys,
0,
0,
};
/* the below structure is so we have a default dev struct for out link struct */
struct scsi_device uha_dev = {
NULL, /* Use default error handler */
NULL, /* have a queue, served by this */
NULL, /* have no async handler */
NULL, /* Use default 'done' routine */
};
struct cfdriver uha_cd = {
NULL, "uha", DV_DULL
};
#define UHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */
/*
* Attach all the sub-devices we can find
*/
void
uha_attach(sc)
struct uha_softc *sc;
{
(sc->init)(sc);
TAILQ_INIT(&sc->sc_free_mscp);
/*
* fill in the prototype scsi_link.
*/
sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
sc->sc_link.adapter_softc = sc;
sc->sc_link.adapter_target = sc->sc_scsi_dev;
sc->sc_link.adapter = &uha_switch;
sc->sc_link.device = &uha_dev;
sc->sc_link.openings = 2;
/*
* ask the adapter what subunits are present
*/
config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
}
integrate void
uha_reset_mscp(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
mscp->flags = 0;
}
/*
* A mscp (and hence a mbx-out) is put onto the free list.
*/
void
uha_free_mscp(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
int s;
s = splbio();
uha_reset_mscp(sc, mscp);
TAILQ_INSERT_HEAD(&sc->sc_free_mscp, mscp, chain);
/*
* If there were none, wake anybody waiting for one to come free,
* starting with queued entries.
*/
if (mscp->chain.tqe_next == 0)
wakeup(&sc->sc_free_mscp);
splx(s);
}
integrate void
uha_init_mscp(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
int hashnum;
bzero(mscp, sizeof(struct uha_mscp));
/*
* put in the phystokv hash table
* Never gets taken out.
*/
mscp->hashkey = KVTOPHYS(mscp);
hashnum = MSCP_HASH(mscp->hashkey);
mscp->nexthash = sc->sc_mscphash[hashnum];
sc->sc_mscphash[hashnum] = mscp;
uha_reset_mscp(sc, mscp);
}
/*
* Get a free mscp
*
* If there are none, see if we can allocate a new one. If so, put it in the
* hash table too otherwise either return an error or sleep.
*/
struct uha_mscp *
uha_get_mscp(sc, flags)
struct uha_softc *sc;
int flags;
{
struct uha_mscp *mscp;
int s;
s = splbio();
/*
* If we can and have to, sleep waiting for one to come free
* but only if we can't allocate a new one
*/
for (;;) {
mscp = sc->sc_free_mscp.tqh_first;
if (mscp) {
TAILQ_REMOVE(&sc->sc_free_mscp, mscp, chain);
break;
}
if (sc->sc_nummscps < UHA_MSCP_MAX) {
mscp = (struct uha_mscp *) malloc(sizeof(struct uha_mscp),
M_TEMP, M_NOWAIT);
if (!mscp) {
printf("%s: can't malloc mscp\n",
sc->sc_dev.dv_xname);
goto out;
}
uha_init_mscp(sc, mscp);
sc->sc_nummscps++;
break;
}
if ((flags & SCSI_NOSLEEP) != 0)
goto out;
tsleep(&sc->sc_free_mscp, PRIBIO, "uhamsc", 0);
}
mscp->flags |= MSCP_ALLOC;
out:
splx(s);
return (mscp);
}
/*
* given a physical address, find the mscp that it corresponds to.
*/
struct uha_mscp *
uha_mscp_phys_kv(sc, mscp_phys)
struct uha_softc *sc;
u_long mscp_phys;
{
int hashnum = MSCP_HASH(mscp_phys);
struct uha_mscp *mscp = sc->sc_mscphash[hashnum];
while (mscp) {
if (mscp->hashkey == mscp_phys)
break;
mscp = mscp->nexthash;
}
return (mscp);
}
/*
* We have a mscp which has been processed by the adaptor, now we look to see
* how the operation went.
*/
void
uha_done(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
struct scsi_sense_data *s1, *s2;
struct scsi_xfer *xs = mscp->xs;
SC_DEBUG(xs->sc_link, SDEV_DB2, ("uha_done\n"));
/*
* Otherwise, put the results of the operation
* into the xfer and call whoever started it
*/
if ((mscp->flags & MSCP_ALLOC) == 0) {
printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
Debugger();
return;
}
if (xs->error == XS_NOERROR) {
if (mscp->host_stat != UHA_NO_ERR) {
switch (mscp->host_stat) {
case UHA_SBUS_TIMEOUT: /* No response */
xs->error = XS_SELTIMEOUT;
break;
default: /* Other scsi protocol messes */
printf("%s: host_stat %x\n",
sc->sc_dev.dv_xname, mscp->host_stat);
xs->error = XS_DRIVER_STUFFUP;
}
} else if (mscp->target_stat != SCSI_OK) {
switch (mscp->target_stat) {
case SCSI_CHECK:
s1 = &mscp->mscp_sense;
s2 = &xs->sense;
*s2 = *s1;
xs->error = XS_SENSE;
break;
case SCSI_BUSY:
xs->error = XS_BUSY;
break;
default:
printf("%s: target_stat %x\n",
sc->sc_dev.dv_xname, mscp->target_stat);
xs->error = XS_DRIVER_STUFFUP;
}
} else
xs->resid = 0;
}
uha_free_mscp(sc, mscp);
xs->flags |= ITSDONE;
scsi_done(xs);
}
void
uhaminphys(bp)
struct buf *bp;
{
if (bp->b_bcount > ((UHA_NSEG - 1) << PGSHIFT))
bp->b_bcount = ((UHA_NSEG - 1) << PGSHIFT);
minphys(bp);
}
/*
* start a scsi operation given the command and the data address. Also
* needs the unit, target and lu.
*/
int
uha_scsi_cmd(xs)
struct scsi_xfer *xs;
{
struct scsi_link *sc_link = xs->sc_link;
struct uha_softc *sc = sc_link->adapter_softc;
struct uha_mscp *mscp;
struct uha_dma_seg *sg;
int seg; /* scatter gather seg being worked on */
u_long thiskv, thisphys, nextphys;
int bytes_this_seg, bytes_this_page, datalen, flags;
struct iovec *iovp;
int s;
SC_DEBUG(sc_link, SDEV_DB2, ("uha_scsi_cmd\n"));
/*
* get a mscp (mbox-out) to use. If the transfer
* is from a buf (possibly from interrupt time)
* then we can't allow it to sleep
*/
flags = xs->flags;
if ((mscp = uha_get_mscp(sc, flags)) == NULL) {
xs->error = XS_DRIVER_STUFFUP;
return (TRY_AGAIN_LATER);
}
mscp->xs = xs;
mscp->timeout = xs->timeout;
/*
* Put all the arguments for the xfer in the mscp
*/
if (flags & SCSI_RESET) {
mscp->opcode = UHA_SDR;
mscp->ca = 0x01;
} else {
mscp->opcode = UHA_TSP;
/* XXX Not for tapes. */
mscp->ca = 0x01;
bcopy(xs->cmd, &mscp->scsi_cmd, mscp->scsi_cmd_length);
}
mscp->xdir = UHA_SDET;
mscp->dcn = 0x00;
mscp->chan = 0x00;
mscp->target = sc_link->target;
mscp->lun = sc_link->lun;
mscp->scsi_cmd_length = xs->cmdlen;
mscp->sense_ptr = KVTOPHYS(&mscp->mscp_sense);
mscp->req_sense_length = sizeof(mscp->mscp_sense);
mscp->host_stat = 0x00;
mscp->target_stat = 0x00;
if (xs->datalen) {
sg = mscp->uha_dma;
seg = 0;
#ifdef TFS
if (flags & SCSI_DATA_UIO) {
iovp = ((struct uio *) xs->data)->uio_iov;
datalen = ((struct uio *) xs->data)->uio_iovcnt;
xs->datalen = 0;
while (datalen && seg < UHA_NSEG) {
sg->seg_addr = (physaddr)iovp->iov_base;
sg->seg_len = iovp->iov_len;
xs->datalen += iovp->iov_len;
SC_DEBUGN(sc_link, SDEV_DB4, ("(0x%x@0x%x)",
iovp->iov_len, iovp->iov_base));
sg++;
iovp++;
seg++;
datalen--;
}
} else
#endif /*TFS */
{
/*
* Set up the scatter gather block
*/
SC_DEBUG(sc_link, SDEV_DB4,
("%d @0x%x:- ", xs->datalen, xs->data));
datalen = xs->datalen;
thiskv = (int) xs->data;
thisphys = KVTOPHYS(thiskv);
while (datalen && seg < UHA_NSEG) {
bytes_this_seg = 0;
/* put in the base address */
sg->seg_addr = thisphys;
SC_DEBUGN(sc_link, SDEV_DB4, ("0x%x", thisphys));
/* do it at least once */
nextphys = thisphys;
while (datalen && thisphys == nextphys) {
/*
* This page is contiguous (physically)
* with the the last, just extend the
* length
*/
/* how far to the end of the page */
nextphys = (thisphys & ~PGOFSET) + NBPG;
bytes_this_page = nextphys - thisphys;
/**** or the data ****/
bytes_this_page = min(bytes_this_page,
datalen);
bytes_this_seg += bytes_this_page;
datalen -= bytes_this_page;
/* get more ready for the next page */
thiskv = (thiskv & ~PGOFSET) + NBPG;
if (datalen)
thisphys = KVTOPHYS(thiskv);
}
/*
* next page isn't contiguous, finish the seg
*/
SC_DEBUGN(sc_link, SDEV_DB4,
("(0x%x)", bytes_this_seg));
sg->seg_len = bytes_this_seg;
sg++;
seg++;
}
}
/* end of iov/kv decision */
SC_DEBUGN(sc_link, SDEV_DB4, ("\n"));
if (datalen) {
/*
* there's still data, must have run out of segs!
*/
printf("%s: uha_scsi_cmd, more than %d dma segs\n",
sc->sc_dev.dv_xname, UHA_NSEG);
goto bad;
}
mscp->data_addr = KVTOPHYS(mscp->uha_dma);
mscp->data_length = xs->datalen;
mscp->sgth = 0x01;
mscp->sg_num = seg;
} else { /* No data xfer, use non S/G values */
mscp->data_addr = (physaddr)0;
mscp->data_length = 0;
mscp->sgth = 0x00;
mscp->sg_num = 0;
}
mscp->link_id = 0;
mscp->link_addr = (physaddr)0;
s = splbio();
(sc->start_mbox)(sc, mscp);
splx(s);
/*
* Usually return SUCCESSFULLY QUEUED
*/
if ((flags & SCSI_POLL) == 0)
return (SUCCESSFULLY_QUEUED);
/*
* If we can't use interrupts, poll on completion
*/
if ((sc->poll)(sc, xs, mscp->timeout)) {
uha_timeout(mscp);
if ((sc->poll)(sc, xs, mscp->timeout))
uha_timeout(mscp);
}
return (COMPLETE);
bad:
xs->error = XS_DRIVER_STUFFUP;
uha_free_mscp(sc, mscp);
return (COMPLETE);
}
void
uha_timeout(arg)
void *arg;
{
struct uha_mscp *mscp = arg;
struct scsi_xfer *xs = mscp->xs;
struct scsi_link *sc_link = xs->sc_link;
struct uha_softc *sc = sc_link->adapter_softc;
int s;
sc_print_addr(sc_link);
printf("timed out");
s = splbio();
if (mscp->flags & MSCP_ABORT) {
/* abort timed out */
printf(" AGAIN\n");
/* XXX Must reset! */
} else {
/* abort the operation that has timed out */
printf("\n");
mscp->xs->error = XS_TIMEOUT;
mscp->timeout = UHA_ABORT_TIMEOUT;
mscp->flags |= MSCP_ABORT;
(sc->start_mbox)(sc, mscp);
}
splx(s);
}

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sys/dev/ic/uhareg.h Normal file
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typedef u_long physaddr;
typedef u_long physlen;
/************************** board definitions *******************************/
/*
* I/O Port Interface
*/
#define U14_LMASK 0x0000 /* local doorbell mask reg */
#define U14_LINT 0x0001 /* local doorbell int/stat reg */
#define U14_SMASK 0x0002 /* system doorbell mask reg */
#define U14_SINT 0x0003 /* system doorbell int/stat reg */
#define U14_ID 0x0004 /* product id reg (2 ports) */
#define U14_CONFIG 0x0006 /* config reg (2 ports) */
#define U14_OGMPTR 0x0008 /* outgoing mail ptr (4 ports) */
#define U14_ICMPTR 0x000c /* incoming mail ptr (4 ports) */
#define U24_CONFIG 0x0005 /* config reg (3 ports) */
#define U24_LMASK 0x000c /* local doorbell mask reg */
#define U24_LINT 0x000d /* local doorbell int/stat reg */
#define U24_SMASK 0x000e /* system doorbell mask reg */
#define U24_SINT 0x000f /* system doorbell int/stat reg */
#define U24_OGMCMD 0x0016 /* outgoing commands */
#define U24_OGMPTR 0x0017 /* outgoing mail ptr (4 ports) */
#define U24_ICMCMD 0x001b /* incoming commands */
#define U24_ICMPTR 0x001c /* incoming mail ptr (4 ports) */
/*
* UHA_LMASK bits (read only)
*/
#define UHA_LDIE 0x80 /* local doorbell int enabled */
#define UHA_SRSTE 0x40 /* soft reset enabled */
#define UHA_ABORTEN 0x10 /* abort MSCP enabled */
#define UHA_OGMINTEN 0x01 /* outgoing mail interrupt enabled */
/*
* UHA_LINT bits (read only)
*/
#define U14_LDIP 0x80 /* local doorbell int pending */
#define U24_LDIP 0x02 /* local doorbell int pending */
/*
* UHA_LINT bits (write only)
*/
#define U14_OGMFULL 0x01 /* outgoing mailbox is full */
#define U14_ABORT 0x10 /* abort MSCP */
#define U24_OGMFULL 0x02 /* outgoing mailbox is full */
#define UHA_SBRST 0x40 /* scsi bus reset */
#define UHA_ADRST 0x80 /* adapter soft reset */
#define UHA_ASRST 0xc0 /* adapter and scsi reset */
/*
* UHA_SMASK bits (read/write)
*/
#define UHA_ENSINT 0x80 /* enable system doorbell interrupt */
#define UHA_EN_ABORT_COMPLETE 0x10 /* enable abort MSCP complete int */
#define UHA_ENICM 0x01 /* enable ICM interrupt */
/*
* UHA_SINT bits (read)
*/
#define U14_SDIP 0x80 /* system doorbell int pending */
#define U24_SDIP 0x02 /* system doorbell int pending */
#define UHA_ABORT_SUCC 0x10 /* abort MSCP successful */
#define UHA_ABORT_FAIL 0x18 /* abort MSCP failed */
/*
* UHA_SINT bits (write)
*/
#define U14_ICM_ACK 0x01 /* acknowledge ICM and clear */
#define U24_ICM_ACK 0x02 /* acknowledge ICM and clear */
#define UHA_ABORT_ACK 0x18 /* acknowledge status and clear */
/*
* U14_CONFIG bits (read only)
*/
#define U14_DMA_CH5 0x0000 /* DMA channel 5 */
#define U14_DMA_CH6 0x4000 /* 6 */
#define U14_DMA_CH7 0x8000 /* 7 */
#define U14_DMA_MASK 0xc000
#define U14_IRQ15 0x0000 /* IRQ 15 */
#define U14_IRQ14 0x1000 /* 14 */
#define U14_IRQ11 0x2000 /* 11 */
#define U14_IRQ10 0x3000 /* 10 */
#define U14_IRQ_MASK 0x3000
#define U14_HOSTID_MASK 0x0007
/*
* U24_CONFIG bits (read only)
*/
#define U24_MAGIC1 0x08
#define U24_IRQ15 0x10
#define U24_IRQ14 0x20
#define U24_IRQ11 0x40
#define U24_IRQ10 0x80
#define U24_IRQ_MASK 0xf0
#define U24_MAGIC2 0x04
#define U24_HOSTID_MASK 0x07
/*
* EISA registers (offset from slot base)
*/
#define EISA_VENDOR 0x0c80 /* vendor ID (2 ports) */
#define EISA_MODEL 0x0c82 /* model number (2 ports) */
#define EISA_CONTROL 0x0c84
#define EISA_RESET 0x04
#define EISA_ERROR 0x02
#define EISA_ENABLE 0x01
/*
* host_stat error codes
*/
#define UHA_NO_ERR 0x00 /* No error supposedly */
#define UHA_SBUS_ABORT_ERR 0x84 /* scsi bus abort error */
#define UHA_SBUS_TIMEOUT 0x91 /* scsi bus selection timeout */
#define UHA_SBUS_OVER_UNDER 0x92 /* scsi bus over/underrun */
#define UHA_BAD_SCSI_CMD 0x96 /* illegal scsi command */
#define UHA_AUTO_SENSE_ERR 0x9b /* auto request sense err */
#define UHA_SBUS_RES_ERR 0xa3 /* scsi bus reset error */
#define UHA_BAD_SG_LIST 0xff /* invalid scatter gath list */
#define UHA_NSEG 33 /* number of dma segments supported */
struct uha_dma_seg {
physaddr seg_addr;
physlen seg_len;
};
#pragma pack(1)
struct uha_mscp {
u_char opcode:3;
#define UHA_HAC 0x01 /* host adapter command */
#define UHA_TSP 0x02 /* target scsi pass through command */
#define UHA_SDR 0x04 /* scsi device reset */
u_char xdir:2; /* xfer direction */
#define UHA_SDET 0x00 /* determined by scsi command */
#define UHA_SDIN 0x01 /* scsi data in */
#define UHA_SDOUT 0x02 /* scsi data out */
#define UHA_NODATA 0x03 /* no data xfer */
u_char dcn:1; /* disable disconnect for this command */
u_char ca:1; /* cache control */
u_char sgth:1; /* scatter gather flag */
u_char target:3;
u_char chan:2; /* scsi channel (always 0 for 14f) */
u_char lun:3;
physaddr data_addr;
physlen data_length;
physaddr link_addr;
u_char link_id;
u_char sg_num; /* number of scat gath segs */
/*in s-g list if sg flag is */
/*set. starts at 1, 8bytes per */
u_char req_sense_length;
u_char scsi_cmd_length;
struct scsi_generic scsi_cmd;
u_char host_stat;
u_char target_stat;
physaddr sense_ptr; /* if 0 no auto sense */
struct uha_dma_seg uha_dma[UHA_NSEG];
struct scsi_sense_data mscp_sense;
/*-----------------end of hardware supported fields----------------*/
TAILQ_ENTRY(uha_mscp) chain;
struct uha_mscp *nexthash;
long hashkey;
struct scsi_xfer *xs; /* the scsi_xfer for this cmd */
int flags;
#define MSCP_ALLOC 0x01
#define MSCP_ABORT 0x02
int timeout;
};
#pragma pack(4)

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sys/dev/ic/uhavar.h Normal file
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#define UHA_MSCP_MAX 32 /* store up to 32 MSCPs at one time */
#define MSCP_HASH_SIZE 32 /* hash table size for phystokv */
#define MSCP_HASH_SHIFT 9
#define MSCP_HASH(x) ((((long)(x))>>MSCP_HASH_SHIFT) & (MSCP_HASH_SIZE - 1))
struct uha_softc {
struct device sc_dev;
bus_chipset_tag_t sc_bc;
bus_io_handle_t sc_ioh;
int sc_irq, sc_drq;
void *sc_ih;
void (*start_mbox) __P((struct uha_softc *, struct uha_mscp *));
int (*poll) __P((struct uha_softc *, struct scsi_xfer *, int));
void (*init) __P((struct uha_softc *));
struct uha_mscp *sc_mscphash[MSCP_HASH_SIZE];
TAILQ_HEAD(, uha_mscp) sc_free_mscp;
int sc_nummscps;
int sc_scsi_dev; /* our scsi id */
struct scsi_link sc_link;
};
void uha_attach __P((struct uha_softc *));
void uha_timeout __P((void *arg));
struct uha_mscp *uha_mscp_phys_kv __P((struct uha_softc *, u_long));
void uha_done __P((struct uha_softc *, struct uha_mscp *));

333
sys/dev/isa/uha_isa.c Normal file
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#include <sys/types.h>
#include <sys/param.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/proc.h>
#include <sys/user.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <scsi/scsi_all.h>
#include <scsi/scsiconf.h>
#include <dev/isa/isavar.h>
#include <dev/isa/isadmavar.h>
#include <dev/ic/uhareg.h>
#include <dev/ic/uhavar.h>
#define UHA_ISA_IOSIZE 16
int uha_isa_probe __P((struct device *, void *, void *));
void uha_isa_attach __P((struct device *, struct device *, void *));
struct cfattach uha_isa_ca = {
sizeof(struct uha_softc), uha_isa_probe, uha_isa_attach
};
#define KVTOPHYS(x) vtophys(x)
int u14_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *));
void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *));
int u14_poll __P((struct uha_softc *, struct scsi_xfer *, int));
int u14_intr __P((void *));
void u14_init __P((struct uha_softc *));
/*
* Check the slots looking for a board we recognise
* If we find one, note it's address (slot) and call
* the actual probe routine to check it out.
*/
int
uha_isa_probe(parent, match, aux)
struct device *parent;
void *match, *aux;
{
struct isa_attach_args *ia = aux;
struct uha_softc sc;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
isa_chipset_tag_t ic = ia->ia_ic;
int rv;
if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh))
return (0);
rv = u14_find(bc, ioh, &sc);
bus_io_unmap(bc, ioh, UHA_ISA_IOSIZE);
if (rv) {
if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq)
return (0);
if (ia->ia_drq != -1 && ia->ia_drq != sc.sc_drq)
return (0);
ia->ia_irq = sc.sc_irq;
ia->ia_drq = sc.sc_drq;
ia->ia_msize = 0;
ia->ia_iosize = UHA_ISA_IOSIZE;
}
return (rv);
}
/*
* Attach all the sub-devices we can find
*/
void
uha_isa_attach(parent, self, aux)
struct device *parent, *self;
void *aux;
{
struct isa_attach_args *ia = aux;
struct uha_softc *sc = (void *)self;
bus_chipset_tag_t bc = ia->ia_bc;
bus_io_handle_t ioh;
isa_chipset_tag_t ic = ia->ia_ic;
printf("\n");
if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh))
panic("uha_attach: bus_io_map failed!");
sc->sc_bc = bc;
sc->sc_ioh = ioh;
if (!u14_find(bc, ioh, sc))
panic("uha_attach: u14_find failed!");
if (sc->sc_drq != -1)
isa_dmacascade(sc->sc_drq);
sc->sc_ih = isa_intr_establish(ic, sc->sc_irq, IST_EDGE, IPL_BIO,
u14_intr, sc);
if (sc->sc_ih == NULL) {
printf("%s: couldn't establish interrupt\n",
sc->sc_dev.dv_xname);
return;
}
/* Save function pointers for later use. */
sc->start_mbox = u14_start_mbox;
sc->poll = u14_poll;
sc->init = u14_init;
uha_attach(sc);
}
/*
* Start the board, ready for normal operation
*/
int
u14_find(bc, ioh, sc)
bus_chipset_tag_t bc;
bus_io_handle_t ioh;
struct uha_softc *sc;
{
u_int16_t model, config;
int irq, drq;
int resetcount = 4000; /* 4 secs? */
model = (bus_io_read_1(bc, ioh, U14_ID + 0) << 8) |
(bus_io_read_1(bc, ioh, U14_ID + 1) << 0);
if ((model & 0xfff0) != 0x5640)
return (0);
config = (bus_io_read_1(bc, ioh, U14_CONFIG + 0) << 8) |
(bus_io_read_1(bc, ioh, U14_CONFIG + 1) << 0);
switch (model & 0x000f) {
case 0x0000:
switch (config & U14_DMA_MASK) {
case U14_DMA_CH5:
drq = 5;
break;
case U14_DMA_CH6:
drq = 6;
break;
case U14_DMA_CH7:
drq = 7;
break;
default:
printf("u14_find: illegal drq setting %x\n",
config & U14_DMA_MASK);
return (0);
}
break;
case 0x0001:
/* This is a 34f, and doesn't need an ISA DMA channel. */
drq = -1;
break;
}
switch (config & U14_IRQ_MASK) {
case U14_IRQ10:
irq = 10;
break;
case U14_IRQ11:
irq = 11;
break;
case U14_IRQ14:
irq = 14;
break;
case U14_IRQ15:
irq = 15;
break;
default:
printf("u14_find: illegal irq setting %x\n",
config & U14_IRQ_MASK);
return (0);
}
bus_io_write_1(bc, ioh, U14_LINT, UHA_ASRST);
while (--resetcount) {
if (bus_io_read_1(bc, ioh, U14_LINT))
break;
delay(1000); /* 1 mSec per loop */
}
if (!resetcount) {
printf("u14_find: board timed out during reset\n");
return (0);
}
/* if we want to fill in softc, do so now */
if (sc != NULL) {
sc->sc_irq = irq;
sc->sc_drq = drq;
sc->sc_scsi_dev = config & U14_HOSTID_MASK;
}
return (1);
}
/*
* Function to send a command out through a mailbox
*/
void
u14_start_mbox(sc, mscp)
struct uha_softc *sc;
struct uha_mscp *mscp;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
int spincount = 100000; /* 1s should be enough */
while (--spincount) {
if ((bus_io_read_1(bc, ioh, U14_LINT) & U14_LDIP) == 0)
break;
delay(100);
}
if (!spincount) {
printf("%s: uha_start_mbox, board not responding\n",
sc->sc_dev.dv_xname);
Debugger();
}
bus_io_write_4(bc, ioh, U14_OGMPTR, KVTOPHYS(mscp));
if (mscp->flags & MSCP_ABORT)
bus_io_write_1(bc, ioh, U14_LINT, U14_ABORT);
else
bus_io_write_1(bc, ioh, U14_LINT, U14_OGMFULL);
if ((mscp->xs->flags & SCSI_POLL) == 0)
timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000);
}
/*
* Function to poll for command completion when in poll mode.
*
* wait = timeout in msec
*/
int
u14_poll(sc, xs, count)
struct uha_softc *sc;
struct scsi_xfer *xs;
int count;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
while (count) {
/*
* If we had interrupts enabled, would we
* have got an interrupt?
*/
if (bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP)
u14_intr(sc);
if (xs->flags & ITSDONE)
return (0);
delay(1000);
count--;
}
return (1);
}
/*
* Catch an interrupt from the adaptor
*/
int
u14_intr(arg)
void *arg;
{
struct uha_softc *sc = arg;
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
struct uha_mscp *mscp;
u_char uhastat;
u_long mboxval;
#ifdef UHADEBUG
printf("%s: uhaintr ", sc->sc_dev.dv_xname);
#endif /*UHADEBUG */
if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0)
return (0);
for (;;) {
/*
* First get all the information and then
* acknowledge the interrupt
*/
uhastat = bus_io_read_1(bc, ioh, U14_SINT);
mboxval = bus_io_read_4(bc, ioh, U14_ICMPTR);
/* XXX Send an ABORT_ACK instead? */
bus_io_write_1(bc, ioh, U14_SINT, U14_ICM_ACK);
#ifdef UHADEBUG
printf("status = 0x%x ", uhastat);
#endif /*UHADEBUG*/
/*
* Process the completed operation
*/
mscp = uha_mscp_phys_kv(sc, mboxval);
if (!mscp) {
printf("%s: BAD MSCP RETURNED!\n",
sc->sc_dev.dv_xname);
continue; /* whatever it was, it'll timeout */
}
untimeout(uha_timeout, mscp);
uha_done(sc, mscp);
if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0)
return (1);
}
}
void
u14_init(sc)
struct uha_softc *sc;
{
bus_chipset_tag_t bc = sc->sc_bc;
bus_io_handle_t ioh = sc->sc_ioh;
/* make sure interrupts are enabled */
#ifdef UHADEBUG
printf("u14_init: lmask=%02x, smask=%02x\n",
bus_io_read_1(bc, ioh, U14_LMASK),
bus_io_read_1(bc, ioh, U14_SMASK));
#endif
bus_io_write_1(bc, ioh, U14_LMASK, 0xd1); /* XXX */
bus_io_write_1(bc, ioh, U14_SMASK, 0x91); /* XXX */
}

1390
sys/dev/isa/ultra14f.c
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