1996-10-11 01:23:28 +04:00
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/* $NetBSD: uha_isa.c,v 1.3 1996/10/10 21:23:28 christos Exp $ */
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1996-09-01 04:20:20 +04:00
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/*
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* Copyright (c) 1994, 1996 Charles M. Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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1996-09-01 00:26:48 +04:00
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#include <sys/types.h>
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#include <sys/param.h>
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1996-10-11 01:23:28 +04:00
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#include <sys/systm.h>
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1996-09-01 00:26:48 +04:00
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmavar.h>
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#include <dev/ic/uhareg.h>
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#include <dev/ic/uhavar.h>
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#define UHA_ISA_IOSIZE 16
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int uha_isa_probe __P((struct device *, void *, void *));
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void uha_isa_attach __P((struct device *, struct device *, void *));
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struct cfattach uha_isa_ca = {
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sizeof(struct uha_softc), uha_isa_probe, uha_isa_attach
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};
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#define KVTOPHYS(x) vtophys(x)
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int u14_find __P((bus_chipset_tag_t, bus_io_handle_t, struct uha_softc *));
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void u14_start_mbox __P((struct uha_softc *, struct uha_mscp *));
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int u14_poll __P((struct uha_softc *, struct scsi_xfer *, int));
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int u14_intr __P((void *));
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void u14_init __P((struct uha_softc *));
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/*
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* Check the slots looking for a board we recognise
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* If we find one, note it's address (slot) and call
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* the actual probe routine to check it out.
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*/
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int
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uha_isa_probe(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct isa_attach_args *ia = aux;
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struct uha_softc sc;
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bus_chipset_tag_t bc = ia->ia_bc;
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bus_io_handle_t ioh;
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int rv;
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if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh))
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return (0);
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rv = u14_find(bc, ioh, &sc);
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bus_io_unmap(bc, ioh, UHA_ISA_IOSIZE);
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if (rv) {
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if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq)
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return (0);
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if (ia->ia_drq != -1 && ia->ia_drq != sc.sc_drq)
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return (0);
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ia->ia_irq = sc.sc_irq;
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ia->ia_drq = sc.sc_drq;
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ia->ia_msize = 0;
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ia->ia_iosize = UHA_ISA_IOSIZE;
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}
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return (rv);
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}
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/*
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* Attach all the sub-devices we can find
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*/
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void
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uha_isa_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct isa_attach_args *ia = aux;
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struct uha_softc *sc = (void *)self;
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bus_chipset_tag_t bc = ia->ia_bc;
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bus_io_handle_t ioh;
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isa_chipset_tag_t ic = ia->ia_ic;
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1996-10-11 01:23:28 +04:00
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kprintf("\n");
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1996-09-01 00:26:48 +04:00
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if (bus_io_map(bc, ia->ia_iobase, UHA_ISA_IOSIZE, &ioh))
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panic("uha_attach: bus_io_map failed!");
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sc->sc_bc = bc;
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sc->sc_ioh = ioh;
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if (!u14_find(bc, ioh, sc))
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panic("uha_attach: u14_find failed!");
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if (sc->sc_drq != -1)
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isa_dmacascade(sc->sc_drq);
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sc->sc_ih = isa_intr_establish(ic, sc->sc_irq, IST_EDGE, IPL_BIO,
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u14_intr, sc);
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if (sc->sc_ih == NULL) {
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1996-10-11 01:23:28 +04:00
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kprintf("%s: couldn't establish interrupt\n",
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1996-09-01 00:26:48 +04:00
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sc->sc_dev.dv_xname);
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return;
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}
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/* Save function pointers for later use. */
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sc->start_mbox = u14_start_mbox;
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sc->poll = u14_poll;
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sc->init = u14_init;
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uha_attach(sc);
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}
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/*
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* Start the board, ready for normal operation
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*/
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int
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u14_find(bc, ioh, sc)
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bus_chipset_tag_t bc;
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bus_io_handle_t ioh;
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struct uha_softc *sc;
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{
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u_int16_t model, config;
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int irq, drq;
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int resetcount = 4000; /* 4 secs? */
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model = (bus_io_read_1(bc, ioh, U14_ID + 0) << 8) |
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(bus_io_read_1(bc, ioh, U14_ID + 1) << 0);
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if ((model & 0xfff0) != 0x5640)
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return (0);
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config = (bus_io_read_1(bc, ioh, U14_CONFIG + 0) << 8) |
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(bus_io_read_1(bc, ioh, U14_CONFIG + 1) << 0);
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switch (model & 0x000f) {
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case 0x0000:
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switch (config & U14_DMA_MASK) {
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case U14_DMA_CH5:
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drq = 5;
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break;
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case U14_DMA_CH6:
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drq = 6;
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break;
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case U14_DMA_CH7:
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drq = 7;
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break;
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default:
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1996-10-11 01:23:28 +04:00
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kprintf("u14_find: illegal drq setting %x\n",
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1996-09-01 00:26:48 +04:00
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config & U14_DMA_MASK);
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return (0);
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}
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break;
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case 0x0001:
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/* This is a 34f, and doesn't need an ISA DMA channel. */
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drq = -1;
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break;
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1996-10-11 01:23:28 +04:00
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default:
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kprintf("u14_find: unknown model %x\n", model);
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return (0);
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1996-09-01 00:26:48 +04:00
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}
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switch (config & U14_IRQ_MASK) {
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case U14_IRQ10:
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irq = 10;
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break;
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case U14_IRQ11:
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irq = 11;
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break;
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case U14_IRQ14:
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irq = 14;
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break;
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case U14_IRQ15:
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irq = 15;
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break;
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default:
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1996-10-11 01:23:28 +04:00
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kprintf("u14_find: illegal irq setting %x\n",
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1996-09-01 00:26:48 +04:00
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config & U14_IRQ_MASK);
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return (0);
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}
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bus_io_write_1(bc, ioh, U14_LINT, UHA_ASRST);
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while (--resetcount) {
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if (bus_io_read_1(bc, ioh, U14_LINT))
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break;
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delay(1000); /* 1 mSec per loop */
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}
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if (!resetcount) {
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1996-10-11 01:23:28 +04:00
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kprintf("u14_find: board timed out during reset\n");
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1996-09-01 00:26:48 +04:00
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return (0);
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}
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/* if we want to fill in softc, do so now */
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if (sc != NULL) {
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sc->sc_irq = irq;
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sc->sc_drq = drq;
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sc->sc_scsi_dev = config & U14_HOSTID_MASK;
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}
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return (1);
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}
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/*
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* Function to send a command out through a mailbox
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*/
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void
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u14_start_mbox(sc, mscp)
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struct uha_softc *sc;
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struct uha_mscp *mscp;
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{
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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int spincount = 100000; /* 1s should be enough */
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while (--spincount) {
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if ((bus_io_read_1(bc, ioh, U14_LINT) & U14_LDIP) == 0)
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break;
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delay(100);
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}
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if (!spincount) {
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1996-10-11 01:23:28 +04:00
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kprintf("%s: uha_start_mbox, board not responding\n",
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1996-09-01 00:26:48 +04:00
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sc->sc_dev.dv_xname);
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Debugger();
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}
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bus_io_write_4(bc, ioh, U14_OGMPTR, KVTOPHYS(mscp));
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if (mscp->flags & MSCP_ABORT)
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bus_io_write_1(bc, ioh, U14_LINT, U14_ABORT);
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else
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bus_io_write_1(bc, ioh, U14_LINT, U14_OGMFULL);
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if ((mscp->xs->flags & SCSI_POLL) == 0)
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timeout(uha_timeout, mscp, (mscp->timeout * hz) / 1000);
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}
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/*
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* Function to poll for command completion when in poll mode.
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*
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* wait = timeout in msec
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*/
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int
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u14_poll(sc, xs, count)
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struct uha_softc *sc;
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struct scsi_xfer *xs;
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int count;
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{
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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while (count) {
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/*
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* If we had interrupts enabled, would we
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* have got an interrupt?
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*/
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if (bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP)
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u14_intr(sc);
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if (xs->flags & ITSDONE)
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return (0);
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delay(1000);
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count--;
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}
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return (1);
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}
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/*
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* Catch an interrupt from the adaptor
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*/
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int
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u14_intr(arg)
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void *arg;
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{
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struct uha_softc *sc = arg;
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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struct uha_mscp *mscp;
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u_char uhastat;
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u_long mboxval;
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#ifdef UHADEBUG
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1996-10-11 01:23:28 +04:00
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kprintf("%s: uhaintr ", sc->sc_dev.dv_xname);
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1996-09-01 00:26:48 +04:00
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#endif /*UHADEBUG */
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if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0)
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return (0);
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for (;;) {
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/*
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* First get all the information and then
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* acknowledge the interrupt
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*/
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uhastat = bus_io_read_1(bc, ioh, U14_SINT);
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mboxval = bus_io_read_4(bc, ioh, U14_ICMPTR);
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/* XXX Send an ABORT_ACK instead? */
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bus_io_write_1(bc, ioh, U14_SINT, U14_ICM_ACK);
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#ifdef UHADEBUG
|
1996-10-11 01:23:28 +04:00
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kprintf("status = 0x%x ", uhastat);
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1996-09-01 00:26:48 +04:00
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#endif /*UHADEBUG*/
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/*
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* Process the completed operation
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*/
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mscp = uha_mscp_phys_kv(sc, mboxval);
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if (!mscp) {
|
1996-10-11 01:23:28 +04:00
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kprintf("%s: BAD MSCP RETURNED!\n",
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1996-09-01 00:26:48 +04:00
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sc->sc_dev.dv_xname);
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continue; /* whatever it was, it'll timeout */
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}
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untimeout(uha_timeout, mscp);
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uha_done(sc, mscp);
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if ((bus_io_read_1(bc, ioh, U14_SINT) & U14_SDIP) == 0)
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return (1);
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}
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}
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void
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u14_init(sc)
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struct uha_softc *sc;
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{
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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/* make sure interrupts are enabled */
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#ifdef UHADEBUG
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1996-10-11 01:23:28 +04:00
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kprintf("u14_init: lmask=%02x, smask=%02x\n",
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1996-09-01 00:26:48 +04:00
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bus_io_read_1(bc, ioh, U14_LMASK),
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bus_io_read_1(bc, ioh, U14_SMASK));
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#endif
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bus_io_write_1(bc, ioh, U14_LMASK, 0xd1); /* XXX */
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bus_io_write_1(bc, ioh, U14_SMASK, 0x91); /* XXX */
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}
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