mio
|
a38151bf77
|
Make s390x skey work
|
2021-12-27 23:19:17 +01:00 |
|
mio
|
e977f81813
|
Make s390x build
|
2021-12-26 23:09:25 +01:00 |
|
mio
|
faa689c0f0
|
Merge systemz to the latest uc2 codebase
|
2021-12-26 22:58:32 +01:00 |
|
lazymio
|
cddc9cf2ed
|
Fix arm post init
|
2021-12-25 00:16:51 +01:00 |
|
lazymio
|
4f73d75ea8
|
Fix #1500
|
2021-12-23 21:46:27 +01:00 |
|
lazymio
|
ef6f8a2427
|
Fix x86 CPUID
|
2021-12-22 23:39:41 +01:00 |
|
lazymio
|
7bb756249a
|
Better design of cpuid instruction hook
|
2021-12-22 20:36:56 +01:00 |
|
Nguyen Anh Quynh
|
09b0c66f11
|
move all static vars in translate.c to tcg.h
|
2021-12-07 04:53:32 +08:00 |
|
Nguyen Anh Quynh
|
b042a6a01d
|
add missing files
|
2021-12-06 04:28:13 +08:00 |
|
Nguyen Anh Quynh
|
97b92d8861
|
initial systemz support
|
2021-12-06 04:19:37 +08:00 |
|
lazymio
|
8a0ca8715e
|
Fix SR read/write and a test
|
2021-12-04 23:22:28 +01:00 |
|
Brandon Miller
|
d204dc6374
|
Added SR to M68K reg_read and reg_write (#1507)
|
2021-12-02 14:12:49 +08:00 |
|
lazymio
|
221cde18df
|
Write CPSR as it is initiated from instructions to allow regs switch
|
2021-11-24 17:10:51 +01:00 |
|
lazymio
|
78e0ddbc4d
|
Fix mmio unmap
|
2021-11-24 00:18:19 +01:00 |
|
lazymio
|
c733bbada3
|
Fix wrong offset used in split_region
|
2021-11-23 23:22:53 +01:00 |
|
lazymio
|
c1c5f72918
|
Fix the sizemask for inline hooking
|
2021-11-23 21:18:21 +01:00 |
|
lazymio
|
7a1de17f37
|
Fix UC_HOOK_EDGE_GENERATED to work with indirect jump
For an indirect jump (lookup_tb_ptr), last_tb would be NULL
|
2021-11-23 00:25:55 +01:00 |
|
lazymio
|
083ccf160b
|
Use fprintf
|
2021-11-22 21:22:21 +01:00 |
|
lazymio
|
87a391d549
|
Inline uc_tracecode when there is only exactly one hook
|
2021-11-21 16:44:39 +01:00 |
|
lazymio
|
c1106b811b
|
Fix a memory leak in mmio
|
2021-11-16 22:44:03 +01:00 |
|
lazymio
|
fc467edbc6
|
Fix 32bit target getting wrong offset for mmio
|
2021-11-16 22:40:57 +01:00 |
|
lazymio
|
247ffbe0e8
|
Support nested uc_emu_start calls
|
2021-11-16 21:07:03 +01:00 |
|
lazymio
|
43c643d4af
|
Fix #1488
|
2021-11-16 09:41:21 +01:00 |
|
lazymio
|
7e244f87b4
|
Fix UC_HOOK_EDGE_GENERATED implementation
|
2021-11-11 22:15:15 +01:00 |
|
lazymio
|
23ef5da491
|
Merge pull request #1481 from bet4it/cp15
Restore cp15 registers
|
2021-11-09 16:50:31 +01:00 |
|
Bet4
|
acaed986b5
|
Restore cp15 registers
|
2021-11-09 13:13:08 +08:00 |
|
lazymio
|
640251e1aa
|
Leave out size parameter in callback
|
2021-11-09 00:21:34 +01:00 |
|
lazymio
|
2f61592ff9
|
Fix uc_mem_protect
|
2021-11-07 20:37:58 +01:00 |
|
lazymio
|
c6fdbb3735
|
Add RISCV CSR registers
|
2021-11-07 20:36:04 +01:00 |
|
George Hotz
|
7268c2a19b
|
mips: support reading and writing of hi/lo regs
|
2021-11-07 20:27:02 +01:00 |
|
lazymio
|
94a82ed94d
|
Ensure JIT protection is disabled when generating TB
|
2021-11-07 20:23:25 +01:00 |
|
lazymio
|
613ddf0985
|
Format
|
2021-11-04 19:58:44 +01:00 |
|
lazymio
|
871de4ad65
|
Split mips cpu to 32 and 64
|
2021-11-04 19:58:32 +01:00 |
|
lazymio
|
0555095388
|
Support changing cpu model for ppc
|
2021-11-04 19:53:02 +01:00 |
|
lazymio
|
e5a2eae173
|
Add comment for default cpu model
|
2021-11-04 19:22:50 +01:00 |
|
lazymio
|
64452e249d
|
Support changing cpu model for sparc
|
2021-11-04 19:22:08 +01:00 |
|
lazymio
|
b0280f5e55
|
Support changing cpu model for m68k
|
2021-11-04 19:16:35 +01:00 |
|
lazymio
|
172a2fbe6d
|
Support changing cpu model for riscv
|
2021-11-04 19:13:53 +01:00 |
|
lazymio
|
435ac71f47
|
Support changing cpu model for x86
|
2021-11-04 19:10:29 +01:00 |
|
lazymio
|
837c3be347
|
Support changing cpu model for MIPS
|
2021-11-04 19:05:56 +01:00 |
|
lazymio
|
dfbffa44ec
|
Support changing cpu model for ARM
|
2021-11-04 18:37:10 +01:00 |
|
lazymio
|
3e4b4af7d3
|
Support change page size
|
2021-11-04 17:03:30 +01:00 |
|
lazymio
|
3ead1731fe
|
Also instrument sub2
In this case, users don't need to care about the stuble difference inside tcg opcode
|
2021-11-03 23:48:09 +01:00 |
|
lazymio
|
67e2386da6
|
Add test and close #1477
|
2021-11-03 21:40:13 +01:00 |
|
lazymio
|
6b5529fcb7
|
Merge pull request #1458 from bet4it/patch
Port some patches from Unicorn1 to Unicorn2
|
2021-11-03 20:59:42 +01:00 |
|
lazymio
|
9818840f4e
|
Add tests for UC_HOOK_TCG_OPCODE
|
2021-11-03 20:56:45 +01:00 |
|
lazymio
|
09aa0f944f
|
Merge QDucasse:riscv_extension_d
Fix and close #1469
Fix test for riscv float points
Fix the riscv cpu config we left out
|
2021-11-03 13:20:46 +01:00 |
|
lazymio
|
bcf85be86d
|
Add a new hook type UC_HOOK_TCG_OPCODE
|
2021-11-03 01:46:24 +01:00 |
|
lazymio
|
eb75d459f0
|
Add a regression test for invalidating empty TB and have a better solution
|
2021-11-03 01:07:06 +01:00 |
|
Bet4
|
aaf340d9e4
|
Merge branch 'dev' into patch
|
2021-11-02 18:36:22 +08:00 |
|