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Support changing cpu model for riscv

This commit is contained in:
lazymio 2021-11-04 19:13:53 +01:00
parent 435ac71f47
commit 172a2fbe6d
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GPG Key ID: DFF27E34A47CB873
2 changed files with 13 additions and 13 deletions
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22
qemu/target/riscv/cpu.c
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@ -329,7 +329,7 @@ static const CPUModelInfo cpu_models[] = {
#endif
};
RISCVCPU *cpu_riscv_init(struct uc_struct *uc, const char *cpu_model)
RISCVCPU *cpu_riscv_init(struct uc_struct *uc)
{
RISCVCPU *cpu;
CPUState *cs;
@ -342,16 +342,21 @@ RISCVCPU *cpu_riscv_init(struct uc_struct *uc, const char *cpu_model)
}
#ifdef TARGET_RISCV32
if (!cpu_model) {
cpu_model = TYPE_RISCV_CPU_SIFIVE_U34;
if (uc->cpu_model == INT_MAX) {
uc->cpu_model = 3;
}
#else
/* TARGET_RISCV64 */
if (!cpu_model) {
cpu_model = TYPE_RISCV_CPU_SIFIVE_U54;
if (uc->cpu_model == INT_MAX) {
uc->cpu_model = 3;
}
#endif
if (uc->cpu_model >= ARRAY_SIZE(cpu_models)) {
free(cpu);
return NULL;
}
cs = (CPUState *)cpu;
cc = (CPUClass *)&cpu->cc;
cs->cc = cc;
@ -390,12 +395,7 @@ RISCVCPU *cpu_riscv_init(struct uc_struct *uc, const char *cpu_model)
riscv_cpu_init(uc, cs);
/* init specific CPU model */
for (i = 0; i < ARRAY_SIZE(cpu_models); i++) {
if (strcmp(cpu_model, cpu_models[i].name) == 0) {
cpu_models[i].initfn(cs);
break;
}
}
cpu_models[uc->cpu_model].initfn(cs);
/* realize CPU */
riscv_cpu_realize(uc, cs);

4
qemu/target/riscv/unicorn.c
View File

@ -10,7 +10,7 @@
#include <unicorn/riscv.h>
#include "unicorn.h"
RISCVCPU *cpu_riscv_init(struct uc_struct *uc, const char *cpu_model);
RISCVCPU *cpu_riscv_init(struct uc_struct *uc);
static void riscv_set_pc(struct uc_struct *uc, uint64_t address)
{
@ -326,7 +326,7 @@ static int riscv_cpus_init(struct uc_struct *uc, const char *cpu_model)
RISCVCPU *cpu;
cpu = cpu_riscv_init(uc, cpu_model);
cpu = cpu_riscv_init(uc);
if (cpu == NULL) {
return -1;
}