lazymio
71c729a9d7
Define HAVE_SPRR
2024-02-13 19:09:35 +08:00
lazymio
4245475514
Detect if we have valid pthread_jit_write_protect_np
2024-02-13 16:21:53 +08:00
lazymio
b31081a105
Remove unused var
2024-02-13 14:38:48 +08:00
lazymio
78ea3c8301
Fix m1 defines
2024-02-13 11:52:10 +08:00
lazymio
a4ba7c9dd5
Add inline
2024-02-13 11:48:24 +08:00
lazymio
591b562721
Fix defined
2024-02-13 11:38:49 +08:00
lazymio
a6fb2a6870
Save jit state before/after callback
2024-02-13 11:13:01 +08:00
lazymio
822bb527f3
M1 W^X fully supported
2024-02-12 00:10:44 +08:00
redoste
a070ea95af
Backport qemu/qemu@852f933
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tcg: Fix do_nonatomic_op_* vs signed operations
The smin/smax/umin/umax operations require the operands to be
properly sign extended. Do not drop the MO_SIGN bit from the
load, and additionally extend the val input.
2024-01-24 23:41:30 +01:00
Takacs, Philipp
8d3bf02041
fix cow when using uc_mem_write
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memory_cow expect the address and size to be aligned on pagesize.
2024-01-10 15:54:46 +01:00
mio
e0eeda2362
Add arm for bad assert implementation
2024-01-03 18:07:04 +08:00
mio
3c64e9a9e7
Revert previous wrong fixes
2024-01-03 18:06:09 +08:00
mio
02e3cba4c4
HAVE_ATOMIC128 is defined as a number
2024-01-03 17:45:04 +08:00
mio
3cff3eb2d5
Don't rely on dead code elimination
2024-01-03 16:50:28 +08:00
dotcirill
b0ea433772
Fix PPC32 fault when timer-spr access
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Access to TB, DEC registers was lead to crash
spr_read_decr and others are changed to spr_read_generic
spr_write_decr and others are changed to spr_write_generic
2023-12-06 01:58:50 +03:00
StalkR
db63f2d9d7
qemu: fix UBSAN errors in tcg and arm translation
2023-11-14 10:23:50 +01:00
Dimitris Glynos
9d8e639c69
fix fxsave fpip value, provide tests
2023-10-26 08:42:58 +03:00
Mario Haustein
9a2583e967
fix deprecated storage-class declarations
2023-10-08 13:40:23 +02:00
Mark Giraud
e189e1fb8b
fix: Use correct addresses during memory cow
2023-08-23 10:18:42 +02:00
lazymio
c889258d8e
Avoid overwriting tmp0
2023-08-06 21:25:37 +08:00
basavesh
cf5e75953d
Backport qemu/qemu@75b208c
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target/i386: fix operand order for PDEP and PEXT
For PDEP and PEXT, the mask is provided in the memory (mod+r/m)
operand, and therefore is loaded in s->T0 by gen_ldst_modrm.
The source is provided in the second source operand (VEX.vvvv)
and therefore is loaded in s->T1. Fix the order in which
they are passed to the helpers.
2023-08-03 13:12:39 +02:00
lazymio
6e97e59f54
Fix building on Apple Sillicon
2023-08-03 13:17:26 +08:00
Takacs, Philipp
f6cfe1092b
vtlb only cache access permisions required for the operation
...
see #1845
2023-07-17 12:54:38 +02:00
Takacs, Philipp
df18756234
implement uc_mem_unmap with snapshots
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still has todos and need tests
2023-07-11 11:51:44 +02:00
Takacs, Philipp
e54cf7ee03
find_ram_offset optimization
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The ram_offset allocator searches the smalest gap in the ram_offset address space.
This is slow especialy in combination with many allocation (i.e. snapshots). When
it is known that there is no gap, this is now optimized.
2023-07-11 11:51:44 +02:00
Takacs, Philipp
80bd825420
implement simple memory snapshot mechanismus
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Uses Copy on Write to make it posible to restore the memory state after a snapshot
was made. To restore all MemoryRegions created after the snapshot are removed.
2023-07-11 11:51:40 +02:00
Takacs, Philipp
065af19dc5
use address_space_translate to find memory mapping
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first version has bugs
2023-07-11 11:47:50 +02:00
Takacs, Philipp
cd85f589a2
add memory_region_add_subregion_overlap
2023-07-11 11:47:50 +02:00
mio
a7a5d187e7
Backport 10b8eb94c0
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target/i386: Verify memory operand for lcall and ljmp
These two opcodes only allow a memory operand.
Lacking the check for a register operand, we used the A0 temp
without initialization, which led to a tcg abort.
2023-06-30 20:21:56 +08:00
mio
75676eb0cd
Also rebuild flags for aarch32
2023-06-28 10:39:25 +08:00
Robert Xiao
2b80ab425b
Return new UC_ERR_OVERFLOW instead of UC_ERR_NOMEM when reg buffer is too small
2023-06-16 15:30:59 -07:00
Robert Xiao
30d202b89e
Simplify reg_read/reg_write, obtaining a perf boost.
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Single reg_read/reg_write is now about 25% faster.
2023-06-16 15:23:42 -07:00
Robert Xiao
074566cf69
Slight refactoring to reduce code duplication.
...
This also comes with a performance bump due to inlining of reg_read/reg_write
(as they're only called once now) and the unlikely() on CHECK_REG_TYPE.
2023-06-16 15:23:42 -07:00
Robert Xiao
4055a5ab10
Implement uc_reg_{read,write}{,_batch}2 APIs.
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These APIs take size parameters, which can be used to properly bounds-check the
inputs and outputs for various registers. Additionally, all backends now throw
UC_ERR_ARG if the input register numbers are invalid.
Completes #1831 .
2023-06-16 15:23:42 -07:00
Robert Xiao
d7a806c026
Reformat code with format.sh
2023-06-16 15:23:41 -07:00
mio
fa1f26138e
Fix missing stdint
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Co-authored-by: ζeh Matt <5415177+ZehMatt@users.noreply.github.com>
2023-06-10 23:48:18 +02:00
mio
49ccbde2d0
Leave out essential files
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Co-authored-by: ζeh Matt <5415177+ZehMatt@users.noreply.github.com>
2023-06-10 23:44:05 +02:00
mio
8dffbc159c
Add uc_ctl_get/set_tcg_buffer_size
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We still need this API because the virtual memory address space of
32 bits os is only 4GB and we default need 1G per instance
Credits to @ZehMatt for original idea
Co-authored-by: ζeh Matt <5415177+ZehMatt@users.noreply.github.com>
2023-06-10 23:36:02 +02:00
mio
f8c7969d65
Revert "Add uc_ctl_get/set_tcg_buffer_size"
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This reverts commit 3145e3c426
because not
properly co-authoer-ed.
2023-06-10 23:29:56 +02:00
mio
3145e3c426
Add uc_ctl_get/set_tcg_buffer_size
2023-06-10 16:08:29 +02:00
mio
5057f9925b
Fix typo
2023-06-10 15:26:29 +02:00
mio
9de80cb625
Correct calling convention
2023-06-10 15:03:59 +02:00
mio
3d5b2643f0
Support demand paging via closures and seh
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Reverts 12a79192ee
which exploits normal tcg mechanism
This uses a trampoline to pass extra data to seh handlers
2023-06-10 14:04:56 +02:00
Takacs, Philipp
fa457a3a97
fix UC_MEM_WRITE_PROT callback
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callbacks work on the physical address.
2023-05-22 15:38:37 +02:00
mio
994813a0e5
Also check cpu->stopped
2023-05-19 23:24:42 +02:00
mio
be2f092179
Merge remote-tracking branch 'phl/issuevtlb' into dev
2023-05-19 23:22:23 +02:00
mio
a24e53d794
Rebuild flags after writing to cp registers
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This is buggy as this momemt per https://github.com/unicorn-engine/unicorn/issues/1789#issuecomment-1546807410
We need either doc this or save more information for a context
2023-05-14 13:35:31 +02:00
Takacs, Philipp
4a7b3b7a3a
fixup! load_helper only call cpu_loop_exit() when emulation is running
2023-05-12 12:36:16 +02:00
Takacs, Philipp
073c4b74ca
load_helper only call cpu_loop_exit() when emulation is running
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The load_helper is sometimes called from register writes. When the load
fails check if emulation is running before jump out of the emulated code.
2023-05-09 14:58:40 +02:00
Takacs, Philipp
7bb1501bc2
use int128_get64 in memory_unmap
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This fixes build errors introduced by bbbc7856ac
2023-04-17 17:48:58 +02:00