Fix PPC32 fault when timer-spr access
Access to TB, DEC registers was lead to crash spr_read_decr and others are changed to spr_read_generic spr_write_decr and others are changed to spr_write_generic
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@ -171,6 +171,7 @@ static void spr_write_ureg(DisasContext *ctx, int sprn, int gprn)
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/* SPR common to all non-embedded PowerPC */
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/* DECR */
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#if 0
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static void spr_read_decr(DisasContext *ctx, int gprn, int sprn)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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@ -182,7 +183,11 @@ static void spr_read_decr(DisasContext *ctx, int gprn, int sprn)
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gen_stop_exception(ctx);
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}
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}
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#else
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#define spr_read_decr spr_read_generic
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#endif
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#if 0
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static void spr_write_decr(DisasContext *ctx, int sprn, int gprn)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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@ -194,9 +199,13 @@ static void spr_write_decr(DisasContext *ctx, int sprn, int gprn)
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gen_stop_exception(ctx);
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}
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}
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#else
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#define spr_write_decr spr_write_generic
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#endif
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/* SPR common to all non-embedded PowerPC, except 601 */
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/* Time base */
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#if 0
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static void spr_read_tbl(DisasContext *ctx, int gprn, int sprn)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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@ -209,7 +218,11 @@ static void spr_read_tbl(DisasContext *ctx, int gprn, int sprn)
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gen_stop_exception(ctx);
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}
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}
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#else
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#define spr_read_tbl spr_read_generic
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#endif
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#if 0
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static void spr_read_tbu(DisasContext *ctx, int gprn, int sprn)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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@ -222,6 +235,9 @@ static void spr_read_tbu(DisasContext *ctx, int gprn, int sprn)
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gen_stop_exception(ctx);
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}
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}
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#else
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#define spr_read_tbu spr_read_generic
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#endif
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#if 0
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// ATTRIBUTE_UNUSED
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@ -239,6 +255,7 @@ static void spr_read_atbu(DisasContext *ctx, int gprn, int sprn)
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}
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#endif
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#if 0
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static void spr_write_tbl(DisasContext *ctx, int sprn, int gprn)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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@ -251,7 +268,12 @@ static void spr_write_tbl(DisasContext *ctx, int sprn, int gprn)
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gen_stop_exception(ctx);
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}
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}
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#else
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#define spr_write_tbl spr_write_generic
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#endif
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#if 0
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static void spr_write_tbu(DisasContext *ctx, int sprn, int gprn)
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{
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TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
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@ -264,6 +286,9 @@ static void spr_write_tbu(DisasContext *ctx, int sprn, int gprn)
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gen_stop_exception(ctx);
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}
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}
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#else
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#define spr_write_tbu spr_write_generic
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#endif
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#if 0
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// ATTRIBUTE_UNUSED
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@ -105,8 +105,23 @@ static void test_ppc32_cr(void)
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OK(uc_close(uc));
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}
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static void test_ppc32_spr_time(void)
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{
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char code[] = ("\x7c\x76\x02\xa6" // mfspr r3, DEC
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"\x7c\x6d\x42\xa6" // mfspr r3, TBUr
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);
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uc_engine *uc;
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uc_common_setup(&uc, UC_ARCH_PPC, UC_MODE_32 | UC_MODE_BIG_ENDIAN, code,
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sizeof(code) - 1);
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OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
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OK(uc_close(uc));
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}
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TEST_LIST = {{"test_ppc32_add", test_ppc32_add},
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{"test_ppc32_fadd", test_ppc32_fadd},
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{"test_ppc32_sc", test_ppc32_sc},
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{"test_ppc32_cr", test_ppc32_cr},
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{"test_ppc32_spr_time", test_ppc32_spr_time},
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{NULL, NULL}};
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