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3d304620ec
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Paolo Bonzini 3d304620ec target/i386: fix operand size of unary SSE operations 
VRCPSS, VRSQRTSS and VCVTSx2Sx have a 32-bit or 64-bit memory operand,
which is represented in the decoding tables by X86_VEX_REPScalar.  Add it
to the tables, and make validate_vex() handle the case of an instruction
that is in exception type 4 without the REP prefix and exception type 5
with it; this is the cas of VRCP and VRSQRT.

Reported-by: yongwoo <https://gitlab.com/yongwoo36>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1377
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-01-11 10:44:35 +01:00
..
alpha accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
arm target/arm: align exposed ID registers with Linux 2023-01-05 14:12:34 +00:00
avr target/avr: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cris target/cris: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
hexagon Hexagon (target/hexagon) implement mutability mask for GPRs 2023-01-05 09:19:02 -08:00
hppa target/hppa: Fix fid instruction emulation 2022-12-19 23:14:06 +01:00
i386 target/i386: fix operand size of unary SSE operations 2023-01-11 10:44:35 +01:00
loongarch target/loongarch: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
m68k target/m68k: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
microblaze target/microblaze: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
mips target/mips: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
nios2 target/nios2: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
openrisc target/openrisc: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
ppc target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_interrupt_exittb 2023-01-04 16:20:01 -08:00
riscv First RISC-V PR for QEMU 8.0 2023-01-06 22:15:53 +00:00
rx target/rx: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
s390x target/s390x: Restrict sysemu/reset.h to system emulation 2023-01-09 13:50:13 +01:00
sh4 target/sh4: Mask restore of env->flags from tb->flags 2022-12-18 09:36:07 -08:00
sparc target/sparc: Avoid TCGV_{LOW,HIGH} 2023-01-05 11:41:28 -08:00
tricore target/tricore: Fix gdbstub write to address registers 2022-12-18 09:39:17 -08:00
xtensa target/xtensa: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
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meson.build