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target/hppa: Fix fid instruction emulation

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The fid instruction (Floating-Point Identify) puts the FPU model and
revision into the Status Register. Since those values shouldn't be 0,
store values there which a PCX-L2 (for 32-bit) or a PCX-W2 (for 64-bit)
would return. Noticed while trying to install MPE/iX.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Helge Deller 2022-10-27 19:03:05 +02:00
parent 0786a3b605
commit 59f8c04b22
2 changed files with 12 additions and 4 deletions
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5
target/hppa/insns.decode
View File

@ -388,10 +388,7 @@ fmpyfadd_d 101110 rm1:5 rm2:5 ... 0 1 ..0 0 0 neg:1 t:5 ra3=%rc32
# Floating point class 0
# FID. With r = t = 0, which via fcpy puts 0 into fr0.
# This is machine/revision = 0, which is reserved for simulator.
fcpy_f 001100 00000 00000 00000 000000 00000 \
&fclass01 r=0 t=0
fid_f 001100 00000 00000 000 00 000000 00000
fcpy_f 001100 ..... ..... 010 00 ...... ..... @f0c_0
fabs_f 001100 ..... ..... 011 00 ...... ..... @f0c_0

11
target/hppa/translate.c
View File

@ -3622,6 +3622,17 @@ static void gen_fcpy_f(TCGv_i32 dst, TCGv_env unused, TCGv_i32 src)
tcg_gen_mov_i32(dst, src);
}
static bool trans_fid_f(DisasContext *ctx, arg_fid_f *a)
{
nullify_over(ctx);
#if TARGET_REGISTER_BITS == 64
save_frd(0, tcg_const_i64(0x13080000000000ULL)); /* PA8700 (PCX-W2) */
#else
save_frd(0, tcg_const_i64(0x0f080000000000ULL)); /* PA7300LC (PCX-L2) */
#endif
return nullify_end(ctx);
}
static bool trans_fcpy_f(DisasContext *ctx, arg_fclass01 *a)
{
return do_fop_wew(ctx, a->t, a->r, gen_fcpy_f);