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Lucas Mateus Castro (alqotel) 345531533f target/ppc: Implemented xvi*ger* instructions 
Implement the following PowerISA v3.1 instructions:
xvi4ger8:     VSX Vector 8-bit Signed/Unsigned Integer GER (rank-4 update)
xvi4ger8pp:   VSX Vector 8-bit Signed/Unsigned Integer GER (rank-4 update)
Positive multiply, Positive accumulate
xvi8ger4:     VSX Vector 4-bit Signed Integer GER (rank-8 update)
xvi8ger4pp:   VSX Vector 4-bit Signed Integer GER (rank-8 update)
Positive multiply, Positive accumulate
xvi8ger4spp:  VSX Vector 8-bit Signed/Unsigned Integer GER (rank-4 update)
with Saturate Positive multiply, Positive accumulate
xvi16ger2:    VSX Vector 16-bit Signed Integer GER (rank-2 update)
xvi16ger2pp:  VSX Vector 16-bit Signed Integer GER (rank-2 update)
Positive multiply, Positive accumulate
xvi16ger2s:   VSX Vector 16-bit Signed Integer GER (rank-2 update)
with Saturation
xvi16ger2spp: VSX Vector 16-bit Signed Integer GER (rank-2 update)
with Saturation Positive multiply, Positive accumulate

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220524140537.27451-3-lucas.araujo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-26 17:11:33 -03:00
..
translate
target/ppc: Implemented xvi*ger* instructions
2022-05-26 17:11:33 -03:00
arch_dump.c
…
compat.c
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cpu_init.c
target/ppc: Implement lwsync with weaker memory ordering
2022-05-26 17:11:33 -03:00
cpu-models.c
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cpu-models.h
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cpu-param.h
Normalize header guard symbol definition
2022-05-11 16:50:26 +02:00
cpu-qom.h
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cpu.c
target/ppc: Remove fpscr_* macros from cpu.h
2022-05-05 15:36:17 -03:00
cpu.h
target/ppc: Implemented xvi*ger* instructions
2022-05-26 17:11:33 -03:00
dfp_helper.c
…
excp_helper.c
target/ppc: Remove msr_hv macro
2022-05-05 15:36:17 -03:00
fpu_helper.c
target/ppc: declare xvxsigsp helper with call flags
2022-05-26 17:11:32 -03:00
gdbstub.c
target/ppc: Remove msr_le macro
2022-05-05 15:36:17 -03:00
helper_regs.c
target/ppc: Fix tlbie
2022-05-26 17:11:32 -03:00
helper_regs.h
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helper.h
target/ppc: Implemented xvi*ger* instructions
2022-05-26 17:11:33 -03:00
insn32.decode
target/ppc: Implemented xvi*ger* instructions
2022-05-26 17:11:33 -03:00
insn64.decode
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int_helper.c
target/ppc: Implemented xvi*ger* instructions
2022-05-26 17:11:33 -03:00
internal.h
target/ppc: Implemented xvi*ger* instructions
2022-05-26 17:11:33 -03:00
Kconfig
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kvm_ppc.h
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kvm-stub.c
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kvm.c
target/ppc: Remove msr_ts macro
2022-05-05 15:36:17 -03:00
machine.c
target/ppc: Implement lwsync with weaker memory ordering
2022-05-26 17:11:33 -03:00
mem_helper.c
target/ppc: Remove msr_hv macro
2022-05-05 15:36:17 -03:00
meson.build
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misc_helper.c
target/ppc: Remove msr_hv macro
2022-05-05 15:36:17 -03:00
mmu_common.c
target/ppc: Remove msr_dr macro
2022-05-05 15:36:17 -03:00
mmu_helper.c
target/ppc: Remove msr_cm macro
2022-05-05 15:36:17 -03:00
mmu-book3s-v3.c
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mmu-book3s-v3.h
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mmu-books.h
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mmu-hash32.c
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mmu-hash32.h
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mmu-hash64.c
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mmu-hash64.h
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mmu-radix64.c
target/ppc: Remove msr_hv macro
2022-05-05 15:36:17 -03:00
mmu-radix64.h
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monitor.c
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power8-pmu-regs.c.inc
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power8-pmu.c
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power8-pmu.h
Clean up ill-advised or unusual header guards
2022-05-11 16:50:01 +02:00
spr_common.h
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tcg-stub.c
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timebase_helper.c
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trace-events
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trace.h
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translate.c
target/ppc: Implement lwsync with weaker memory ordering
2022-05-26 17:11:33 -03:00
user_only_helper.c
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