Commit Graph

486 Commits

Author SHA1 Message Date
aliguori
a33609cae0 kvm: Fix cpuid initialization (Jan Kiszka)
Fix (more or less) spurious guest boot failures due to corrupted cpuid
states. The reason was insufficient initialization of cpuid entries
before passing them to the kernel.

At this chance also fix improper entry pointer progression and simplify
the code a bit.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7167 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-17 20:50:54 +00:00
aurel32
1b530a6dfc Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
malc
8cd6345d00 Immediate versions of ro[lr]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6968 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-02 22:54:35 +00:00
aliguori
64bf3f4eec kvm: Drop kvm_patch_opcode_byte (Jan Kiszka)
As cpu_memory_rw_debug is now capable of modifying ROM, we can drop our
own patch function.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6906 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-28 17:51:40 +00:00
aliguori
dc1ded53b8 x86: Add NULL check to lsl (Jan Kiszka)
According to the Intel specs, lsl performs a check against NULL for the
provided selector, just like lar does. helper_lar() includes the
corresponding code, helper_lsl() was lacking it so far.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6863 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-20 16:13:41 +00:00
aurel32
8777643e48 target-i386: use the new bswap* TCG ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6836 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13 09:35:41 +00:00
aurel32
66896cb803 tcg: rename bswap_i32/i64 functions
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13 09:34:48 +00:00
aliguori
e22a25c936 Guest debugging support for KVM (Jan Kiszka)
This is a backport of the guest debugging support for the KVM
accelerator that is now part of the KVM tree. It implements the reworked
KVM kernel API for guest debugging (KVM_CAP_SET_GUEST_DEBUG) which is
not yet part of any mainline kernel but will probably be 2.6.30 stuff.
So far supported is x86, but PPC is expected to catch up soon.

Core features are:
 - unlimited soft-breakpoints via code patching
 - hardware-assisted x86 breakpoints and watchpoints

Changes in this version:
 - use generic hook cpu_synchronize_state to transfer registers between
   user space and kvm
 - push kvm_sw_breakpoints into KVMState

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6825 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-12 20:12:48 +00:00
pbrook
c276471991 The _exit syscall is used for both thread termination in NPTL applications,
and process termination in legacy applications.  Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.


Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07 15:24:59 +00:00
aliguori
b36d24b6c3 Fix cpuid KVM crash on i386 (Lubomir Rintel)
Cpuid should return into vec, not overwrite past address in count.
Changeset 6565 broke this.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6689 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-05 19:01:28 +00:00
balrog
ff3c01ca0a Fix "info registers" under kvm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6684 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-04 21:00:07 +00:00
aliguori
680c30692d x86: use qemu_log_mask on triple faults (Chris Wright)
replace open coded qemu_log_mask with proper macro

Signed-off-by: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6649 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-27 20:05:13 +00:00
aliguori
b136a4c6ef KVM: cpuid function 2: store all values (Amit Shah)
Incrementing the array index was missed in the previous series which causes
us to not store all the values.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6617 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-11 21:00:43 +00:00
aliguori
a36b1029e2 KVM: Get all cpuid values from function 2 (Amit Shah)
cpuid function 2 can have multiple values to describe cache behaviour.
Loop till we have fetched all the values.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6567 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-09 15:50:36 +00:00
aliguori
486bd5a2f2 KVM: Fetch sub-leaf cpuid values for functions 4, 0xb, 0xd. (Amit Shah)
CPUID functions 4, 0xb and 0xd have sub-leaf values which depend on the
input value of ECX. Store these values as well.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6566 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-09 15:50:31 +00:00
aliguori
e00b6f8099 KVM: CPUID takes ecx as input value for some functions (Amit Shah)
The CPUID instruction takes the value of ECX as an input parameter
in addition to the value of EAX as the count for functions 4, 0xb
and 0xd. Make sure we pass the value to the instruction.

Also convert to the qemu-style whitespace for the surrounding code.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6565 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-09 15:50:08 +00:00
aliguori
0d0266a53b targets: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 22:06:11 +00:00
aliguori
9bdba1b67b Add phenom CPU descriptor (Alexander Graf)
As part of my ongoing effort to make nested SVM useful, I started working to get
VMware ESX run inside KVM.

VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate
a machine that officially supports SVM and should thus exploit the powers of
nested virtualization.

This patch adds a Phenom CPU identifier, that resembles a real-world phenom
CPU as closely as possible.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6501 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-02 17:10:57 +00:00
aliguori
eef26553c7 Implement FFXSR (Alexander Graf)
Newer AMD CPUs have the FFXSR capability. This leaves out XMM
register in FXSAVE/FXRESTORE when in CPL=0 and 64-bit mode.

This is required for Hyper-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6500 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-02 17:10:52 +00:00
malc
a5e50b263a Replace noreturn with QEMU_NORETURN
Thanks to Robert Riebisch for analysis [1]

[1] http://marc.info/?l=qemu-devel&m=123352293319271&w=2

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6492 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-01 22:19:27 +00:00
aliguori
33049de782 Fix a typo in ext2_feature_name (Carl-Daniel Hailfinger)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6474 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-29 19:45:28 +00:00
aliguori
6e48a40da5 Use new logging API in reset handling (Jan Kiszka)
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6473 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-29 17:02:21 +00:00
aliguori
dd5e3b1771 MTRR support on x86, part 2 (Carl-Daniel Hailfinger)
Load and save MTRR state together with machine state.

Add support for the MTRRcap MSR which is used by the latest Bochs BIOS
and some operating systems.

Fix a typo in ext2_feature_name.

With this patch, MTRR emulation should be good enough to not trigger any
sanity checks in well behaved BIOS/kernel code.
Some corner cases for BIOS/firmware usage remain to be implemented, but
that can be deferred to another patch.
Also, MTRR accesses on hardware not supporting MTRRs should cause #GP.
That can be enforced by another patch as well.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6472 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-29 17:02:17 +00:00
aliguori
8c6c919e28 kvm-x86: Remove eflags conversion into emulator format (Jan Kiszka)
It seems that the conversion of the kernel-delivered eflags state into
qemu's internal split representation was once needed in an older kvm
design (register read-back may have taken place from inside cpu_exec).
Today it is plain wrong and causes incorrect cpu state reporting (gdb,
monitor) and should also corrupt its saving (savevm, migration). Drop
the related lines.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6461 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 20:32:22 +00:00
aliguori
f55761a0c4 x86: Issue reset on triple faults (Jan Kiszka)
As discussed a few times on this list: A triple fault causes a system
reset on x86, and some guests make use of this (e.g. 386BSD). To keep
the chance of tracing unexpected resets, log them if CPU_LOG_RESET is
set.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6453 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 19:54:36 +00:00
aliguori
eca1bdf415 Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.

This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 19:54:31 +00:00
aliguori
165d9b82eb MTRR support on x86 (Carl-Daniel Hailfinger)
The current codebase ignores MTRR (Memory Type Range Register)
configuration writes and reads because Qemu does not implement caching.
All BIOS/firmware in know of for x86 do implement a mode called
Cache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU
cache like RAM before RAM is enabled. Qemu assumes RAM is accessible
from the start, but it would be nice to be able to run real
BIOS/firmware in Qemu. For that, we need CAR support and for CAR support
we have to support MTRRs.

This patch is a first step in that direction. MTRRs are MSRs supported
by all recent x86 CPUs, even old i586. Besides influencing cache, the
MTRRs can be written and read back, so discarding MTRR writes violates
the expectations of existing code out there.

An added benefit of this patch is that it fixes the following Linux
kernel error message present in recent kernels (provided the BIOS has
the recent MTRR patches applied):
 ------------[ cut here ]------------
WARNING: at arch/x86/kernel/cpu/mtrr/main.c:1500 mtrr_trim_uncached_memory+0x382/0x384()
WARNING: strange, CPU MTRRs all blank?
Modules linked in:
Supported: Yes
Pid: 0, comm: swapper Not tainted 2.6.27.7-9-default #1
 [<c0106570>] dump_trace+0x6b/0x249
 [<c01070a5>] show_trace+0x20/0x39
 [<c0343c02>] dump_stack+0x71/0x76
 [<c012acb2>] warn_slowpath+0x6f/0x90
 [<c0542f8f>] mtrr_trim_uncached_memory+0x382/0x384
 [<c053f24d>] setup_arch+0x40d/0x639
 [<c053a6ac>] start_kernel+0x6b/0x31f
 =======================
 ---[ end trace 4eaa2a86a8e2da22 ]---

Handle common x86 MTRR reads and writes, but don't act on them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6449 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 17:53:04 +00:00
aliguori
8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
aliguori
d12d51d5ba Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.

This patch doesn't try to merge logging macros from different files,
but just unify the debugging code #ifdefs onto a macro on each file. A
further cleanup can unify the debugging macros on a common header, later

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6332 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 21:48:06 +00:00
blueswir1
1c918eba9a Suppress i386 warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6304 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14 19:27:02 +00:00
blueswir1
7d99a001df Add noreturn function attribute
Introduce noreturn attribute and attach it to cpu_loop_exit as well as
interrupt/exception helpers for i386. This avoids a bunch of gcc4
warnings.

[ Note that this patch comes with a workaround to include qemu-common.h
even in cases where is currently causes conflicts with dyngen-exec.h.
I've been told that these conflicts will get resolved in the future
(/me will try to have a look as well - as time permits). ]

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6303 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14 19:00:36 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
malc
b1503cda1e Use the ARRAY_SIZE() macro where appropriate.
Change from v1:
  Avoid changing the existing coding style in certain files.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22 20:33:55 +00:00
aliguori
55308450d4 Initialize msr list size properly in KVM
Hollis Blanchard noticed that the last commit was not sufficient.  We also need
to initialize the msr size in our newly allocated list.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 20:49:31 +00:00
aliguori
4c9f7372fc Correctly initialize msr list in KVM
I believe this was spotted by Gerd Hoffman but I can't find his patch 
now.  This will cause very subtle corruption on the heap because we 
don't allocate the appropriately sized buffer.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 20:41:58 +00:00
malc
f60d2728cc Fix smsw for x86_64 guest and bigendian host case
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 15:51:14 +00:00
blueswir1
d9957a8b0f x86 cleanup
Remove some unnecessary includes, add needed includes, move prototypes to
cpu.h to suppress missing prototype warnings.

Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock,
cpu_unlock, restore_native_fp_state, save_native_fp_state).

Make some functions and data static (f15rk, parity_table, rclw_table,
rclb_table, raise_interrupt, fpu_raise_exception), they are not used
outside op_helper.c anymore.

Make some x86_64 and user only code conditional to avoid warnings.

Document where each function is implemented in cpu.h and exec.h.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6005 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 11:49:17 +00:00
aliguori
40a2d7050a Fix crash in kvm.c (Stefan Weil)
Fix crash with kvm enabled.

Signed-off-by: Stefan Weil <weil@mail.berlios.de> 
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5984 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11 21:03:10 +00:00
aurel32
32938e127f target-i386: Fix jmp im on x86_64 when executing 32-bit code
When running grub-install (32-bit) on an x86_64 Linux system in qemu, it
hangs on a pagefault forever, because an integer overflow occurs on the
IP on "jmp im". This patch masks overflows for 32 bit IPs on a 64 bit
system, just like it is done for 16 bit IPs already.

Using this patch, x86_64 openSUSE installation works again.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Kevin Wolf <kwolf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5963 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10 15:02:16 +00:00
aurel32
db8d990204 Remove FORCE_RET() and RETURN()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 18:15:54 +00:00
aurel32
0b97134b29 target-i386: fix CVE-2007-1322
The icebp instruction can be abused to terminate the emulation,
resulting in denial of service.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5921 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 18:15:36 +00:00
aliguori
d4b55be509 Fix register name typo in dumping debug registers (Jan Kiszka)
Signed-off-by: Jan Kiszka <jan.kiszka@web.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5855 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-02 19:40:26 +00:00
balrog
dcfd12b83e Fix pmovsx* / pmovzx* SSE instructions (original fix by Frank Mehnert).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5841 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01 01:52:37 +00:00
aurel32
2cbd949d7a Common cpu_loop_exit prototype
All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:23:09 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
aliguori
9c99d2ab02 i386: remove unused function prototypes (Laurent Desnogues)
This patch removes two unused prototypes from i386 target exec.h file.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5795 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 17:19:45 +00:00
aliguori
a59cb4e023 x86: Dump debug registers (Jan Kiszka)
As the debug registers are no longer dummies, let's include their
current state into the 'info registers' output and other register dumps.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5748 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 21:09:47 +00:00
aliguori
01df040b52 x86: Debug register emulation (Jan Kiszka)
Built on top of previously enhanced breakpoint/watchpoint support, this
patch adds full debug register emulation for the x86 architecture.

Many corner cases were considered, and the result was successfully
tested inside a Linux guest with gdb, but I won't be surprised if one
or two scenarios still behave differently in reality.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5747 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 21:08:15 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
aliguori
6b9175478e Refactor translation block CPU state handling (Jan Kiszka)
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:46:41 +00:00
aliguori
622ed3605b Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:36:03 +00:00
pbrook
a7812ae412 TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
aurel32
30913bae9a target-i386: fix helper_pmovmskb_mmx helper
(malc)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5728 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-16 19:15:15 +00:00
aliguori
10781c09ed x86: fix warning without CONFIG_KVM (Mark McLoughlin)
Warning is:

 target-i386/helper.c: In function `cpu_x86_cpuid':
 target-i386/helper.c:1373: warning: implicit declaration of function `host_cpuid'

Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5718 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-13 19:37:46 +00:00
aliguori
5700308503 Fix CPUID ext2 features masking (Avi Kivity)
Typo. Exposes rdtscp which kills some guests.

Signed-off-by: Avi Kivity <avi@redhat.com> 
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5717 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-13 19:28:04 +00:00
aliguori
984b518147 Define kvm_ioctl in the same way as ioctl
The third argument to ioctl is a ... which allows any value to be passed.  In
practice, glibc always treats the argument as a void *.

Do the same thing for the kvm ioctls to keep things consistent with a
traditional ioctl.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5715 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-13 19:21:00 +00:00
balrog
59795a1f92 x86 CPUID extended family/model (Andre Przywara).
x86 CPUs feature extended family/model bits in CPUID leaf
0000_0001|EAX. Refer to page 10 in:
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25481.pdf

Those bits are necessary to model newer AMD CPUs:
-cpu qemu64,family=15,model=65,stepping=3 or
-cpu qemu64,family=16,model=4,stepping=2

Signed-off-by: Andre Przywara <andre.przywara@amd.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5664 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10 01:05:01 +00:00
aliguori
053304480a Add missing files to KVM commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5629 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05 16:29:27 +00:00
aliguori
7ba1e61953 Add KVM support to QEMU
This patch adds very basic KVM support.  KVM is a kernel module for Linux that
allows userspace programs to make use of hardware virtualization support.  It
current supports x86 hardware virtualization using Intel VT-x or AMD-V.  It
also supports IA64 VT-i, PPC 440, and S390.

This patch only implements the bare minimum support to get a guest booting.  It
has very little impact the rest of QEMU and attempts to integrate nicely with
the rest of QEMU.

Even though this implementation is basic, it is significantly faster than TCG.
Booting and shutting down a Linux guest:

w/TCG:  1:32.36 elapsed  84% CPU

w/KVM:  0:31.14 elapsed  59% CPU

Right now, KVM is disabled by default and must be explicitly enabled with
 -enable-kvm.  We can enable it by default later when we have had better
testing.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5627 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05 16:04:33 +00:00
aliguori
6fd805e1d4 Split CPUID from op_helper
KVM needs to call CPUID from outside of the TCG code.  This patch
splits out the CPUID logic into a separate helper that both the op
helper and KVM can call.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5626 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05 15:34:06 +00:00
aliguori
0650f1ab30 Add additional CPU flag definitions
Some x86 CPU definitions that KVM needs

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5625 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-05 15:28:47 +00:00
aliguori
e5ceb24447 Fix restore of older snapshots for target-i386 on big endian hosts
A target_ulong may be 64-bit.  Passing it to a function expecting a 32-bit
pointer is wrong and unfortunately happens to work for x86.  It won't work on
big endian hosts though.  Change the code to work properly on all hosts.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-29 14:16:31 +00:00
balrog
853f6931db Fix cpuid ext_features value for Atom N270 (Blue Swirl).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5558 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-28 00:03:28 +00:00
blueswir1
b1d8e52e63 Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-26 13:43:07 +00:00
aurel32
e65bdffaf2 i386/SVM: return amount of ASIDs
With SVM the TLB supports tagging to distinguish TLB entries from
different virtual CPUs. This tag is called an ASID. The amount of ASIDs is
given in EBX of the SVM-CPUID-leaf. Currently we return 0, which might
break hypervisors. Let's better return something >0 here, say 0x10.
Since we're flushing the complete TLB on every VM entry and exit we're not
making use of the ASID information anyways.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5496 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-17 08:08:48 +00:00
aurel32
45fd08effd target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried to
resemble the original as closely as possible and document what features
are missing still. This patch enables the use of a recent CPU definition
on 32 bit platforms.

It also fixes two issues that went along the line:

- invalid xlevel in core2duo spec
  While looking though the CPUIDs again, I found that xlevel is actually 8.

- non-PSE36 support
  The CoreDuo CPUID does not expose the PSE36 capability, but CPUID
0x80000008 is tied to 36 bits. This broke Windows XP installation for
me, so I just set it to 32 bits width when PSE36 is not available. The
original CPU also exposes 32 bit width in CPUID 0x80000008.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-14 19:20:52 +00:00
balrog
000cacf6f9 Fix crc32w decoding, fix a constant width in blendvpd.
Forced the constant's width to long long so that it doesn't overflow,
problem spotted by C. W. Betts.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5417 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04 11:33:52 +00:00
balrog
fdb0d09d02 x86 "popcnt" affects flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5412 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04 03:32:00 +00:00
balrog
222a3336ec Implement SSE4.1, SSE4.2 (x86).
This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNT
extensions.  Most instructions haven't been tested yet.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-04 03:27:44 +00:00
malc
bdadc0b5b6 Do not use load_seg_vm to load CS in real mode iret handling
load_seg_vm calls cpu_x86_load_seg_cache which updates hflags of
current env, real hardware doesn't do this, nor the code that handles
real mode lret/lcall/ljmp.

This unbreaks "unreal mode" and makes QEMU the first emulator being
able to run Project Angel demo by IMPACT Studios. (Not that there are
many physical machines out there capable of doing the same)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5403 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02 20:02:27 +00:00
blueswir1
b6c4f71f50 Resurrect the safe part of r5274
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5401 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02 19:14:17 +00:00
balrog
6dc2d0daee x86 pextrw destination operand can be r64.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5367 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-01 00:14:39 +00:00
balrog
d5e49a8199 Handle MSR_IA32_PERF_STATUS in rdmsr (Alexander Graf).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5366 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30 23:35:18 +00:00
aliguori
f504975609 Fix save/restore regression introduced by r5318
sysenter_cs is a u32 and is loaded as a u32.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5351 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29 16:09:07 +00:00
pbrook
558fa8361b My core2duo patch introduced a vague statement of "missing features" in
the CPUID specification. This patch addresses this by specifying exactly 
what is missing.
While going along the missing CPUID entries I also stumbled across 
invalid and missing CPUID #defines while comparing them to the Intel 
Documentation. This patch also addresses these. I found them too minor 
to split them up in a separate patch.

Furthermore I looked through CPUID functions > 5 and realized that it 
should be safe to bump the level to 10. I tried booting Linux with that 
and it worked fine.


Signed-off-by: Alexander Graf <agraf@suse.de>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5350 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29 13:55:36 +00:00
balrog
c0d82995d8 Rename -cpu atom to -cpu n270.
As noticed by Alexander Graf Atom is a name of a series with varying
features.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5341 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-28 22:02:30 +00:00
balrog
a876e28951 Fix definition of EMX bit in cpuid (Jens Axboe).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5330 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 21:03:37 +00:00
blueswir1
2ca83a8dd6 Revert r5274 which breaks savevm/loadvm
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5321 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 20:24:19 +00:00
balrog
0086de1c66 Add Atom (x86) cpu identification.
Also add SSSE3 to Core2 features.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5319 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:31:12 +00:00
balrog
2436b61a6b SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).
On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.

Signed-off-by: Alexander Graf <agraf@suse.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5318 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:16:18 +00:00
balrog
e737b32a36 Core 2 Duo specification (Alexander Graf).
This patch adds a Core 2 Duo CPU to the available CPU types. The CPU
definition tries to resemble a real CPU as good as possible, whilst not
exposing features qemu does not implement.
The patch also includes some minor additions that Core 2 Duo CPUs have:

- New MSR: MSR_IA32_PERF_STATUS
- CPUID up to level 5 (cache info and mwait)

Signed-off-by: Alexander Graf <agraf@suse.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5317 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:11:30 +00:00
balrog
c5096daf7f Clean up vendor identification (Alexander Graf).
Right now CPU vendor identification contains a lot of magic numbers. The
patch cleans them up to defines, so we can identify the CPU later on
without copying magic numbers.

Signed-off-by: Alexander Graf <agraf@suse.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5316 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:08:05 +00:00
balrog
4242b1bd8a Implement x86 SSSE3 instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5315 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 18:01:46 +00:00
balrog
bb332cb234 Use qemu_free() on env instead of free.
Fixes a glibc Abort on qemu-x86_64 -cpu foo.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5314 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-25 03:47:59 +00:00
blueswir1
67d8cec34b Add signed versions of save/load functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 08:04:11 +00:00
aliguori
c0a04f0e13 Fix up pxe boot (Glauber Costa)
As discussed in
http://lists.gnu.org/archive/html/qemu-devel/2008-08/msg00667.html,
current pxe boot is broken for some use cases. The problem
goes away if we reduce the number of allowed bits in the address space
to 32 (which has the side effect of reducing guest max mem size to 4Gb).

After digging for a while, it turns out that it happens because pxelinux
tries to access address 0x10009e9a6, which does not fit a 32-bit address.
A closer look, however, reveals this access is totally valid: It's just
0x9e9a6 with an add carry.

To avoid this, this patch casts the address passed to the POPL macro to
a 32-bit value. This is also done, although just theorectically, for
PUSHL too.

Signed-off-by: Glauber Costa <glommer@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Reported-by: Chris Lalancette <clalance@redhat.com>
CC: Eduardo Habkost <ehabkost@redhat.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5182 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09 14:49:02 +00:00
blueswir1
eb38c52c2a Fix most warnings that would be caused by gcc flag -Wundef
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5173 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:47:39 +00:00
blueswir1
79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
aliguori
ca1c9e154b i386: Catch all non-present ptes in cpu_get_phys_page_debug (Jan Kiszka)
It helps debugging guests when yet unmapped pages are correctly reported
as, well, unmapped.

Signed-off-by: Jan Kiszka <jan.kiszka@web.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5025 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-18 18:00:31 +00:00
aliguori
23e6c39908 Fix task register type after reset (Avi Kivity)
Obvious typo that breaks reboots.

Signed-off-by: Avi Kivity <avi@qumranet.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4926 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 13:29:23 +00:00
ths
2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-18 18:01:29 +00:00
bellard
28e1071183 fix cvtsq2s[sd] (Juergen Lock)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4856 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07 20:25:41 +00:00
pbrook
d70040bcae Re-add static qualifier. Fix annother occurance of "const static".
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4850 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-05 17:03:54 +00:00
ths
2c90d79488 Fix constant truncation, spotted by Jindrich Makovicka.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4832 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 04:13:24 +00:00
pbrook
9656f324d2 Move interrupt_request and user_mode_only to common cpu state.
Save and restore env->interrupt_request and env->halted.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-01 20:01:19 +00:00
pbrook
efade670fe Fix rdtsc instruction counting.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4810 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 17:51:26 +00:00
pbrook
b3c7724cbc Move CPU save/load registration to common code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 16:31:04 +00:00
pbrook
2e70f6efa8 Add instruction counter.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
bellard
40f8e2fa41 added model_id and vendor cpu model options (initial patch by Dan Kenigsberg) - various cleanup
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4757 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20 14:50:55 +00:00