Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added more archs. This patch introduces a flag to log CPU resets. Useful for tracing unexpected resets (such as those triggered by x86 triple faults). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -816,6 +816,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
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#define CPU_LOG_PCALL (1 << 6)
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#define CPU_LOG_IOPORT (1 << 7)
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#define CPU_LOG_TB_CPU (1 << 8)
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#define CPU_LOG_RESET (1 << 9)
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/* define log items */
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typedef struct CPULogItem {
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2
exec.c
2
exec.c
@ -1569,6 +1569,8 @@ const CPULogItem cpu_log_items[] = {
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#ifdef TARGET_I386
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{ CPU_LOG_PCALL, "pcall",
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"show protected mode far calls/returns/exceptions" },
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{ CPU_LOG_RESET, "cpu_reset",
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"show CPU state before CPU resets" },
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#endif
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#ifdef DEBUG_IOPORT
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{ CPU_LOG_IOPORT, "ioport",
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@ -159,6 +159,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
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void cpu_reset(CPUARMState *env)
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{
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uint32_t id;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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id = env->cp15.c0_cpuid;
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memset(env, 0, offsetof(CPUARMState, breakpoints));
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if (id)
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@ -3458,6 +3458,11 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
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void cpu_reset (CPUCRISState *env)
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{
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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memset(env, 0, offsetof(CPUCRISState, breakpoints));
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tlb_flush(env, 1);
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@ -418,6 +418,11 @@ void cpu_reset(CPUX86State *env)
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{
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int i;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP);
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}
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memset(env, 0, offsetof(CPUX86State, breakpoints));
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tlb_flush(env, 1);
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@ -143,6 +143,11 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
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void cpu_reset(CPUM68KState *env)
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{
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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memset(env, 0, offsetof(CPUM68KState, breakpoints));
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#if !defined (CONFIG_USER_ONLY)
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env->sr = 0x2700;
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@ -8489,6 +8489,11 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
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void cpu_reset (CPUMIPSState *env)
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{
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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memset(env, 0, offsetof(CPUMIPSState, breakpoints));
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tlb_flush(env, 1);
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@ -2709,10 +2709,14 @@ void cpu_dump_rfi (target_ulong RA, target_ulong msr)
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void cpu_ppc_reset (void *opaque)
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{
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CPUPPCState *env;
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CPUPPCState *env = opaque;
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target_ulong msr;
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env = opaque;
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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msr = (target_ulong)0;
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if (0) {
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/* XXX: find a suitable condition to enable the hypervisor mode */
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@ -184,6 +184,11 @@ void cpu_dump_state(CPUState * env, FILE * f,
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static void cpu_sh4_reset(CPUSH4State * env)
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{
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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#if defined(CONFIG_USER_ONLY)
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env->sr = 0;
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#else
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@ -639,6 +639,11 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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void cpu_reset(CPUSPARCState *env)
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{
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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log_cpu_state(env, 0);
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}
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tlb_flush(env, 1);
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env->cwp = 0;
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env->wim = 1;
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