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303 Commits

Author SHA1 Message Date
pbrook
f090c9d4ad Add strict checking mode for softfp code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 14:33:24 +00:00
ths
c6d6dd7c74 Fix MIPS64 R2 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 03:36:07 +00:00
ths
8c89395eeb Use a valid PRid. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 03:19:58 +00:00
pbrook
5747c0733d Fix int/float inconsistencies. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 14:53:06 +00:00
ths
3e4587d5d1 Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSP 
flags.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-14 03:11:17 +00:00
bellard
aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
ths
8f6f6026f1 Use FORCE_RET, scrap RETURN which was implemented in target-specific code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 23:09:41 +00:00
ths
7df526e317 Move kernel loader parameters from the cpu state to being board specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 17:52:11 +00:00
ths
d26bc2118e Clean out the N32 macros from target-mips, and introduce MIPS ABI specific 
defines for linux-user.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-08 18:05:37 +00:00
ths
855cea8c92 Formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3554 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-08 16:44:01 +00:00
ths
273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
ths
d2123ead89 Preliminary MIPS64R2 mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 09:38:43 +00:00
ths
6276c76758 Fix logic bug which broke TLBL/TLBS handling somewhat. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3478 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 02:57:19 +00:00
ths
1b6fd0bc55 Restrict CP0_PerfCnt to legal values. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3476 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 00:49:32 +00:00
ths
623a930ec3 Implement missing MIPS supervisor mode bits. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 19:45:05 +00:00
ths
05f778c8bd Add sharable clz/clo inline functions and use them for the mips target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 13:05:54 +00:00
ths
5592a750b9 The other half of the mul64 rework. Sorry for the breakage, I committed 
an incomplete version of what I tested.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 22:35:02 +00:00
ths
9f77c1cdcf Remove bogus instruction decode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:52:07 +00:00
ths
6ad3872210 Force proper sign extension for mfc0/mfhc0 on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3432 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:10:32 +00:00
ths
60445285a8 Fix writable length of the index register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:58:21 +00:00
ths
7d307e9edc Enforce proper sign extension for lwl/lwr on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3430 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:23:43 +00:00
ths
9278480e8f Fix CLO calculation for MIPS64. And a small code cleanup. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:22:03 +00:00
ths
7385ac0ba2 Use the standard ASE check for MIPS-3D and MT. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 17:04:27 +00:00
ths
d8a5950a62 Switch bc1any* instructions off if no MIPS-3D is implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 13:15:33 +00:00
ths
647de6ca24 Handle IBE on MIPS properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 19:45:44 +00:00
ths
c7890fc209 Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3402 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 13:43:58 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
ths
d0f48074db Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3383 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-13 19:00:52 +00:00
ths
89fc88da4c Fix off-by-one in address check. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3382 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-13 17:29:09 +00:00
j_mayer
c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths
aa34373598 Use always_inline in the MIPS support where applicable. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:39:58 +00:00
ths
ab19cb4129 Delete file which should have been removed in the lst commit. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3373 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:17:28 +00:00
ths
4e9f853731 Fix [ls][wd][lr] instructions, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:12:08 +00:00
ths
540635ba65 Code provision for n32/n64 mips userland emulation. Not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 01:58:33 +00:00
ths
a09d88b86a Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3278 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 00:45:51 +00:00
ths
671880e651 Supervisor mode implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-29 19:21:36 +00:00
ths
544540979c Less magic constants. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3266 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-29 19:19:59 +00:00
ths
418d7c7169 Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-28 19:30:36 +00:00
ths
198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h. 
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 16:44:32 +00:00
ths
a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 13:57:58 +00:00
ths
08fa4bab83 hflags computation cleanup, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:52:06 +00:00
ths
fe253235b2 Wrap a few often used tests with unlikely(), by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3242 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:50:39 +00:00
ths
42532189df Timer start/stop implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 16:53:15 +00:00
ths
387a8fe505 Optimise instructions accessing CP0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 14:49:47 +00:00
ths
e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 12:48:00 +00:00
ths
2337fdc208 Fix mips usermode emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-23 17:54:29 +00:00
j_mayer
c068688b03 Extend TB flags to 64 bits (Alexander Graf). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 22:47:42 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
ths
ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-11 10:04:58 +00:00
ths
ead9360e2f Partial support for 34K multithreading, not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-06 00:18:15 +00:00
ths
3ddf0b5cde Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-26 17:37:23 +00:00
ths
ae5d8053a1 Fix MIPS cache configuration, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 22:11:46 +00:00
ths
475d91106d Update TODO list. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3057 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-11 10:25:04 +00:00
ths
5e4ef64cfd Simplify round/ceil/floor implementation, spotted by Fabrice Bellard. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-28 14:07:05 +00:00
ths
e3b60f1d9e Fix computation for ceil, floor and round instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-27 19:01:46 +00:00
ths
8dfdb87c8d Implement recip1/recip2/rsqrt1/rsqrt2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-26 20:26:03 +00:00
ths
996ba2ccf5 MIPS64 improvements, based on a patch by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-25 17:34:33 +00:00
ths
e034e2c39a Handle MIPS64 SEGBITS value correctly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-23 18:04:12 +00:00
ths
17044c06b8 Allow emulation of 32bit targets in the MIPS64 capable qemu version. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-22 23:50:19 +00:00
ths
7bfd934a13 Fix write to K0 bits in Config0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3006 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-22 11:50:17 +00:00
ths
bd04c6feb9 Change 20Kc PRID to a later version. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-12 12:43:47 +00:00
ths
70cf0b63f1 R5k has PX implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-09 12:29:32 +00:00
ths
9467d44c4d Move target-specific defines to the target directories. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 21:02:38 +00:00
ths
bfed01fc79 Clean up of some target specifics in exec.c/cpu-exec.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 17:44:37 +00:00
ths
3a95e3a7d9 Check for R2 instructions, and throw RI if we don't emulate R2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-02 00:25:12 +00:00
ths
1e3d0552f5 Update some comments, 64bit FPU support is functional regardless of 
funny non-standard fcr0 bits on earlier CPUs.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 21:57:32 +00:00
ths
8487327a1d Make sure hflags are updated for CP0_Status changes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 17:47:07 +00:00
ths
c13af1ef6c Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2911 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 15:18:04 +00:00
ths
c9c1a06457 Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno. 
Note that the F64 flag isn't usable on any of those (and the R4000),
so all our 64bit FPU goodness goes out of the window until a shadow
capability flag is implemented. :-(


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 14:58:56 +00:00
ths
a7037b2950 Allow again FPU for usermode emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 11:47:24 +00:00
ths
278d070272 Simplify code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 23:42:46 +00:00
ths
33ac7f1630 Don't kill the registered irqs on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:18:58 +00:00
ths
924b2c07cd Add proper float*_is_nan prototypes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:17:52 +00:00
ths
51b2772f28 Fix CPU (re-)selection on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-30 20:46:02 +00:00
ths
78749ba859 Fix usermode check, thanks Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 18:55:34 +00:00
ths
5e755519ac Don't check the FPU state for each FPU instruction, use hflags to 
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 16:52:57 +00:00
ths
6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 20:36:48 +00:00
ths
12a4b2aa1d Fix ddivu for 32bit hosts, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:36:30 +00:00
ths
c811cf2c03 Do not sign extend lwu, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2889 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:09:41 +00:00
ths
9b9e4393dd MIPS64 addressing fixes, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:03:28 +00:00
ths
fd88b6abab The 24k wants more watch and srsmap registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:24:25 +00:00
ths
df1561e22d The previous patch to make breakpoints work was a performance 
disaster, use a similiar hack as ARM does instead.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:18:27 +00:00
ths
3a5b360dac Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 13:27:58 +00:00
ths
93b12ccc62 Fix indexed FP load/store instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 01:36:29 +00:00
ths
57fa1fb31c More MIPS 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 20:29:41 +00:00
ths
f469b9db01 Fix slti/sltiu for MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:45:43 +00:00
ths
5d46d55d4b Fix ldl/ldr implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:44:33 +00:00
ths
fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big. 
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 11:55:54 +00:00
ths
34ae7b51f5 Work around the lack of proper handling for self-modifying code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 01:13:09 +00:00
ths
69d357286d More generic 64 bit multiplication support, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-16 11:59:40 +00:00
ths
100ce98812 Full MIPS64 MMU implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 19:22:13 +00:00
ths
f1b0aa5de7 Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 18:39:10 +00:00
ths
7b62f20c08 Delete misleading comment. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2814 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 15:29:26 +00:00
ths
703eaf379e Don't decode CP0 XContext on 32bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2812 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 14:42:18 +00:00
ths
f2e9ebef12 MMU code improvements, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2811 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 14:07:26 +00:00
ths
388bb21af6 MIPS linux-user update. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:58:00 +00:00
ths
29929e3490 MIPS TLB style selection at runtime, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 13:49:44 +00:00
ths
5a1e8ffbe7 Implemented cabs FP instructions, and improve exception handling for 
trunc/floor/ceil/round.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2804 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 17:08:26 +00:00
ths
287c4b84f4 Another bit of nicer debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2803 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-11 10:43:55 +00:00