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Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
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ths 2007-09-28 19:30:36 +00:00
parent df0d373665
commit 418d7c7169
1 changed files with 0 additions and 13 deletions
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13
target-mips/op_helper.c
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@ -1032,10 +1032,6 @@ FLOAT_OP(name, d) \
update_fcr31(); \
if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) \
FDT2 = 0x7ff7ffffffffffffULL; \
else if (GET_FP_CAUSE(env->fpu->fcr31) & FP_UNDERFLOW) { \
if ((env->fpu->fcr31 & 0x3) == 0) \
FDT2 &= FLOAT_SIGN64; \
} \
} \
FLOAT_OP(name, s) \
{ \
@ -1044,10 +1040,6 @@ FLOAT_OP(name, s) \
update_fcr31(); \
if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) \
FST2 = 0x7fbfffff; \
else if (GET_FP_CAUSE(env->fpu->fcr31) & FP_UNDERFLOW) { \
if ((env->fpu->fcr31 & 0x3) == 0) \
FST2 &= FLOAT_SIGN32; \
} \
} \
FLOAT_OP(name, ps) \
{ \
@ -1058,11 +1050,6 @@ FLOAT_OP(name, ps) \
if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) { \
FST2 = 0x7fbfffff; \
FSTH2 = 0x7fbfffff; \
} else if (GET_FP_CAUSE(env->fpu->fcr31) & FP_UNDERFLOW) { \
if ((env->fpu->fcr31 & 0x3) == 0) { \
FST2 &= FLOAT_SIGN32; \
FSTH2 &= FLOAT_SIGN32; \
} \
} \
}
FLOAT_BINOP(add)