Commit Graph

70237 Commits

Author SHA1 Message Date
Philippe Mathieu-Daudé
3ae0343db6 hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit
Parallel NOR flashes are limited to 16-bit bus accesses.
Remove the 32-bit dead code.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-29-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:34:55 +02:00
Philippe Mathieu-Daudé
b034993717 hw/block/pflash_cfi02: Document commands
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-28-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:34:55 +02:00
Stephen Checkoway
80f2c625cb hw/block/pflash_cfi02: Use chip erase time specified in the CFI table
When erasing the chip, use the typical time specified in the CFI table
rather than arbitrarily selecting 5 seconds.

Since the currently unconfigurable value set in the table is 12, this
means a chip erase takes 4096 ms so this isn't a big change in behavior.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-11-stephen.checkoway@oberlin.edu>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:34:55 +02:00
Stephen Checkoway
ddb6f22548 hw/block/pflash_cfi02: Implement erase suspend/resume
During a sector erase (but not a chip erase), the embeded erase program
can be suspended. Once suspended, the sectors not selected for erasure
may be read and programmed. Autoselect mode is allowed during erase
suspend mode. Presumably, CFI queries are similarly allowed so this
commit allows them as well.

Since guest firmware can use status bits DQ7, DQ6, DQ3, and DQ2 to
determine the current state of sector erasure, these bits are properly
implemented.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-10-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:34:55 +02:00
Stephen Checkoway
a50547aca5 hw/block/pflash_cfi02: Implement multi-sector erase
After two unlock cycles and a sector erase command, the AMD flash chips
start a 50 us erase time out. Any additional sector erase commands add a
sector to be erased and restart the 50 us timeout. During the timeout,
status bit DQ3 is cleared. After the time out, DQ3 is asserted during
erasure.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-9-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:34:55 +02:00
Stephen Checkoway
a979104239 hw/block/pflash_cfi02: Fix reset command not ignored during erase
When the flash device is performing a chip erase, all commands are
ignored. When it is performing a sector erase, only the erase suspend
command is valid, which is currently not supported.

In particular, the reset command should not cause the device to reset to
read array mode while programming is on going.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-8-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:34:51 +02:00
Stephen Checkoway
46fb7809b5 hw/block/pflash_cfi02: Fix CFI in autoselect mode
After a flash device enters CFI mode from autoselect mode, the reset
command returns the device to autoselect mode. An additional reset
command is necessary to return to read array mode.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-7-stephen.checkoway@oberlin.edu>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:32:39 +02:00
Philippe Mathieu-Daudé
8a508e7064 hw/block/pflash_cfi02: Split if() condition
Split the if() condition check and arrange the indentation to
ease the review of the next patches. No logical change.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-21-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:32:39 +02:00
Philippe Mathieu-Daudé
102f0f79a5 hw/block/pflash_cfi02: Extract pflash_regions_count()
Extract the pflash_regions_count() function, the code will be
easier to review.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-20-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:32:39 +02:00
Stephen Checkoway
6465905355 hw/block/pflash_cfi02: Implement nonuniform sector sizes
Some flash chips support sectors of different sizes. For example, the
AMD AM29LV160DT has 31 64 kB sectors, one 32 kB sector, two 8 kB
sectors, and a 16 kB sector, in that order. The AM29LV160DB has those in
the reverse order.

The `num-blocks` and `sector-length` properties work exactly as they did
before: a flash device with uniform sector lengths. To get non-uniform
sector lengths for up to four regions, the following properties may be
set
- region 0. `num-blocks0` and `sector-length0`;
- region 1. `num-blocks1` and `sector-length1`;
- region 2. `num-blocks2` and `sector-length2`; and
- region 3. `num-blocks3` and `sector-length3`.

If the uniform and nonuniform properties are set, then both must specify
a flash device with the same total size. It would be better to disallow
both being set, or make `num-blocks0` and `sector-length0` alias
`num-blocks` and `sector-length`, but that would make testing currently
impossible.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased, add assert() on pri_offset]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:32:26 +02:00
Philippe Mathieu-Daudé
c2c1bf44a9 hw/block/pflash_cfi02: Document 'Page Mode' operations are not supported
The 'page mode' feature entry was implicitly set as zero
(not supported). Document it exists, so we won't discard
it if we squeeze the CFI table.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
d6874c8391 hw/block/pflash_cfi02: Hold the PRI table offset in a variable
Manufacturers are allowed to move the PRI table, this is why the
offset is queryable via fixed offsets 0x15/0x16.
Add a variable to hold the offset, so it will be easier to later
move the PRI table.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-17-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
9ac45b886a hw/block/pflash_cfi02: Document the current CFI values
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
1eb27d692e hw/block/pflash_cfi02: Remove pointless local variable
We can directly use pfl->total_len, remove the local 'chip_len'
variable.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
91d0231213 tests/pflash-cfi02: Refactor to support testing multiple configurations
Introduce the FlashConfig structure, to be able to run the same set
of tests on different flash models/configurations.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-6-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Stephen Checkoway
6682bc1ee4 hw/block/pflash_cfi02: Fix command address comparison
Most AMD commands only examine 11 bits of the address. This masks the
addresses used in the comparison to 11 bits. The exceptions are word or
sector addresses which use offset directly rather than the shifted
offset, boff.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-4-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
aff498cf30 hw/block/pflash_cfi02: Unify the MemoryRegionOps
The pflash_read()/pflash_write() can check the device endianess
via the pfl->be variable, so remove the 'int be' argument.

Since the big/little MemoryRegionOps are now identical, it is
pointless to declare them both. Unify them.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch to ease review]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
06e8b8e3e1 hw/block/pflash_cfi02: Extract the pflash_data_read() function
Extract the code block in a new function, remove a goto statement.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch, remove the XXX tracing comment]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
3e4bcf89b7 hw/block/pflash_cfi02: Use the ldst API in pflash_read()
The load/store API eases code review.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch, simplified tracing]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
c3d25271b2 hw/block/pflash_cfi02: Use the ldst API in pflash_write()
The load/store API eases code review.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
7f7bdcaff5 hw/block/pflash_cfi02: Simplify a statement using fall through
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
1d311e738b hw/block/pflash_cfi02: Add helpers to manipulate the status bits
Pull out all of the code to modify the status into simple helper
functions. Status handling becomes more complex once multiple
chips are interleaved to produce a single device.

No change in functionality is intended with this commit.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
aeaf6c20db hw/block/pflash_cfi02: Add an enum to define the write cycles
No change in functionality is intended with this commit.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:13 +02:00
Philippe Mathieu-Daudé
6536987fd6 hw/block/pflash_cfi02: Fix debug format string
Always compile the debug code to prevent format string to bitrot.
Delete dead code.

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-3-stephen.checkoway@oberlin.edu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Extracted from bigger patch, use PRIx32]
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:31:01 +02:00
Philippe Mathieu-Daudé
c1474acd5d hw/block/pflash: Simplify trace_pflash_data_read/write()
Use a field width format to have a single function to log
the different width accesses.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-4-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:16:50 +02:00
Philippe Mathieu-Daudé
e8aa2d95ea hw/block/pflash: Simplify trace_pflash_io_read/write()
Call the read() trace function after the value is set, so we can
log the returned value.
Rename the I/O trace functions with '_io_' in their name.

Reviewed-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20190627202719.17739-3-philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:16:50 +02:00
Stephen Checkoway
60b725b6d4 tests/pflash-cfi02: Add test for supported CFI commands
Test the AMD command set for parallel flash chips. This test uses an
ARM musicpal board with a pflash drive to test the following list of
currently-supported commands.
- Autoselect
- CFI
- Sector erase
- Chip erase
- Program
- Unlock bypass
- Reset

Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-2-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: reworded the patch subject, g_assert_cmpint -> cmphex]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-02 02:16:50 +02:00
Peter Maydell
7d0e02405f configure improvements and fixes
MAINTAINERS update
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl0Tz0ISHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L7480D4QAJLK8xf0fhB+RR1fcBS1lrxNWvbTkYTQ
 kptVaWUTUYYnvMQbCLsgYYtna3W1zZxhgZKMQcAy7fLzj5wOM+MjalOHLjYHFIxH
 PEYtZt4urJoj0nmZbQVjO7s3Z1Asd5Lwnu9ylCtxBvai1pGxZGNbPfnxwkDRlGP6
 q73XiA2tsi0bmbevV4q15tshJvcPo1yskxPAsNb91YnUEbsE8/09HDOezgAvB2+7
 tR5k66aNEidqtISlQcm6ct215+tRA9lz4wz5gWn5UA0AJFUmDLq96DhgrkL/+l8H
 +N9cq3lw4P+ZFG5ufKbNV1qzDEDPuU1S6xycRg/c53q/UPle9MyZkRHrm0Ml/x5g
 Ro7MkqDEx1TwhkzoMhycDPD1grUFTOP6efiys+t4Z7lWvnhp4/q6FPblaX69wBvd
 rhDRO3Du11387ByEmsYINLsvMDdlee8WqrGUSk0BYHqoSFs6QnP/YSHryRfV3zkE
 iDROxxoQKqonpLrPHTPP6Jj0j0cBR36Th5wbq0uQPYXWg27ZBe9BI09ZKOnzFSbx
 JTMJxQ9VNaBeiOUTcqsZ85PIWzwzRKvdWlQPKJEe88ARrUWY4oXe0lJ2kjR+8/Lo
 lA+CE9eQJ+t8LdwuSWe5Hb3s492J3YCG2X/i1E2TZymoP0zaeEcDWwAMBlH2YZgc
 s5XLbPqHaTDe
 =UxmJ
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-request' into staging

configure improvements and fixes
MAINTAINERS update

# gpg: Signature made Wed 26 Jun 2019 21:02:10 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-patches-pull-request:
  MAINTAINERS: Change maintership of Xen code under hw/9pfs
  configure: use valid args testing sem_timedwait
  configure: disallow spaces and colons in source path and build path
  configure: set source_path only once and make its definition more robust

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 17:40:32 +01:00
Peter Maydell
5e6ebacc3b remove m68k simulator syscall interface
Fix comments format
 Fix gdbstub
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl0Tm1kSHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748wp4P/isXFUM1OKoFQEv80YDfLEMg8gRM5BQb
 AJqbEylTBpCAmMiU5oBdbZI9+kOLi++x8bb+9u86VjpGgP74o1qBTIlX3Eqi4rho
 a3TSPNP+Tpoovw4wnFUH0JrGIuZuLlEJ/ltdiEaB9xLY90RgO2KuxYCgzrKqoD8/
 ASkLOV5QX0CjE74fz7ikz6HIj4zTSyx8M2BfE9N6Lrf7rrnIVa5FVVeQ/fIS71t2
 XNbQ37K5EbGk4N1u6x9Ct/h6kFA5qQ0R8YBEDSR2335uJZxWvRIZnAZ9Yu0Z2gDn
 EDZ9tjXoGCB98jnlJyeEx8OrAAh5iZ1LVXgpUYgjPvkNzOJ0BMmDz4xVXJAec5iB
 kMMcdWYEdqVV3FYaGa6xk225s6N/SNMO9RmleFfe7mczxXwEV+HfGEsVHroKXOJ4
 aU+lWLbYEvXmJh4ND3VjpZlYwGNwfpRMEQagztzPeOs3+ctZZah2tmhTm72BkcFu
 K07/zwJf1npYmfjro1uZMuGQVPfJW3hQLkEKCgSuxLaBJU00Qkij2cdMLryUbs4A
 3PHs3hFSgw07Rq/s9UeGbT1GywnNEzLAiwdTuTEzP7KSkP7JBiFJ9MDWggCkcBhI
 LYS2Z2dk3CaGbg8pk++kc99NntK1dcMstRp6F91qx7mGaNCIH8JNyBBEDiYhfvP1
 wglV4Z0btnub
 =ivUw
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' into staging

remove m68k simulator syscall interface
Fix comments format
Fix gdbstub

# gpg: Signature made Wed 26 Jun 2019 17:20:41 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-next-pull-request:
  linux-user/m68k: remove simulator syscall interface
  m68k comments break patch submission due to being incorrectly formatted
  The m68k gdbstub SR reg request doesnt include Condition-Codes

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 16:59:29 +01:00
Peter Maydell
ae9108f8f0 Update ppc64 feature and default CPU
next setsockops() options
 Improve "-L" option
 Another fix for 5.2-rc1 headers
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl0TYNgSHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748KaMP/3kj/OfTuTuDCp6WOvPXrqY7houUWYFs
 pp1fX72lm+zmRki0rQwzUqoZGaWl6MXkNc/dSTWclNXaeHgdvB8vIgju3f3HOfdq
 IP+T1U9XA0ERayAGwIzB38ivkaaXGdS96bbWOJ5SvmI8PWWSUJHmqDg/GMryUVOh
 xvIFtVMxMl8J30d8OC3T8T1CJs4WdGwtMUhKpixAXVI/CbaTcdgjgK1SlOow5odE
 o5yv7In1l+6FvzrPpPW2Nd/+YRAMffIiQgGQpZ6PhRtQqSc+/F5rwOAu6TGYovr8
 WV+fop09fSnwOPb9JgZkfamEKpQ9fVGr5Egn7ghWM7U8pAMa1j4Mcg+YMxEi97Vj
 jSFI5jZ0DETz1ec1ylkSxBV4Zoe/ERKr1f4I71PCRHg1+nQ9ZUb1iAiuDuHzFQVb
 TffncotU09UR51aSzVHILMR7o7airYjDx3M4W1IFoWVxkqCgGuWeWQc0bsNo0/pX
 yWf0okjGQ7svekgnk/sWEy5F7+0P/cMZu+dfrEppCIKVMkcrimYtPxEhrJwI7Rv7
 EGYAKH/lju06517KP4VFM5wuVOyxxDY5110x3Ny+PKwyeUdXsKGeee9aI9tu+uHw
 RsxQI5KBC/bXn1bnL6fJaevid6sBNlwFX4p56gKdiC4cCmCxvfAe6QhuMgbc6NZF
 bM42J/pWAw+3
 =mVPy
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging

Update ppc64 feature and default CPU
next setsockops() options
Improve "-L" option
Another fix for 5.2-rc1 headers

# gpg: Signature made Wed 26 Jun 2019 13:11:04 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-4.1-pull-request:
  linux-user: set default PPC64 CPU
  linux-user: update PPC64 HWCAP2 feature list
  linux-user: Add support for setsockopt() options IPV6_<ADD|DROP>_MEMBERSHIP
  linux-user: Add support for setsockopt() option SOL_ALG
  linux-user: emulate msgsnd(), msgrcv() and semtimedop()
  util/path: Do not cache all filenames at startup

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 15:55:40 +01:00
Peter Maydell
8351ef7aa9 MIPS queue for June 2016th, 2019
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdE1lSAAoJENSXKoln91plSlYH/j6gKVliJqg9U8KTumTeh+IJ
 74Zvn7G24e3H6R4WyuWAJr90nYh0a1yoR9Hndfvk6z3n6gDXV0oIf7B1FlL9xHMk
 v7xjRLRFqViZATr+K0xMFyWq9MerxItGfPFR5f21CTRoj8S8hgfVYwUq0BrFkeDg
 JnG558R7pazCo5MdokZlHKe2OkMMZdxY/tGR2f5jEfTX4G4KtSrVaodyNl7kbLUG
 YY/VUmJ1p9ySikP9UZGLot9EdAbPNZCkfo/ziBmuZAztMvXArvLboW39ewuA7g8w
 LfPe+HX8ymDWrl42kBpVKJ63/bhaxNbatBUA0kJ/HZwlBdl4lS6Kvx4IOVxMLgg=
 =L0/l
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-26-2019' into staging

MIPS queue for June 2016th, 2019

# gpg: Signature made Wed 26 Jun 2019 12:38:58 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-jun-26-2019:
  target/mips: Fix big endian host behavior for interleave MSA instructions
  tests/tcg: target/mips: Fix some test cases for pack MSA instructions
  tests/tcg: target/mips: Add support for MSA MIPS32R6 testings
  tests/tcg: target/mips: Add support for MSA big-endian target testings
  tests/tcg: target/mips: Amend tests for MSA int multiply instructions
  tests/tcg: target/mips: Amend tests for MSA int dot product instructions
  tests/tcg: target/mips: Add tests for MSA move instructions
  tests/tcg: target/mips: Add tests for MSA bit move instructions
  dma/rc4030: Minor code style cleanup
  dma/rc4030: Fix off-by-one error in specified memory region size
  hw/mips/gt64xxx_pci: Align the pci0-mem size
  hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
  hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()
  hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues
  hw/mips/gt64xxx_pci: Fix 'braces' coding style issues
  hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues
  hw/mips/gt64xxx_pci: Fix multiline comment syntax

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 14:39:45 +01:00
Peter Maydell
39d1b92b81 * Add FTOIZ/UTOF/QSEED insns
* Fix sync of hflags and swapped args of RRPW_INSERT
 -----BEGIN PGP SIGNATURE-----
 
 iQJTBAABCgA9FiEEbmNqfoPy3Qz6bm43CtLGOWtpyhQFAl0SG/8fHGtiYXN0aWFu
 QG1haWwudW5pLXBhZGVyYm9ybi5kZQAKCRAK0sY5a2nKFAViEADxZwdOsQ/sLoZJ
 g5mHZjVrk+G8ukx1zJJ1W46bQbSmJzwGbhwSt8eo9oagaRpya8L2UMezcBVNq59h
 NLOEs47ZcfUPVbQccFjCqDhLC4F5LvoIGadPpBATuFtVlvQPP1nkqLDH93hKD4fb
 JlzzbX7oH21C2E01bHZ0N1z2f0U7TXxPx5dSxBuj0yKF1/0sOuZtmcAuEL5B0THT
 0UB5ej+PtvDALZH8KLbHiaiXPLrWG/SLxAGTe4PPzr7BomGuGdkenu7JiE2YQSr2
 1Kr/WXmlzQr+0JHPpc2f6Y4xpmPfUz/WVQ9JmqFuxY/PQBngaPze02oU6qTOQVO3
 PJeDCZKnLFRoKPwTGAZV9kUOZiB9CmYVLjQoM2BfBLPwHSIzeX6RqBZ1Km0rvH3z
 smBxbUQs5GrgbttMyWKC3PcY6piOljAZ8Pa7NU39QVVo/BaihPhli2XoQzYeucFJ
 FKsDKHNS+wdeQ4ZKcDAf5uhFRLNZOt5rg3gniTRTzl3aozTbfYBxDoGY9y4EojT4
 yL/Prnm56uQt3LfEdJZ5IM91yt18ELQajx7Grb5FR0JXBovcKVurnFOQf5Upc8Tv
 5jCc4GthOXkxe0m5buXaKFrLH0b2JRb7mr31Oik4dzNLVBYcDXLGzEX9wcNLA0EE
 KKGk0A6AzsSfHJ9bKzX9p6dnUFaHnA==
 =0RoC
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20190625' into staging

* Add FTOIZ/UTOF/QSEED insns
* Fix sync of hflags and swapped args of RRPW_INSERT

# gpg: Signature made Tue 25 Jun 2019 14:05:03 BST
# gpg:                using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69CA14
# gpg:                issuer "kbastian@mail.uni-paderborn.de"
# gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" [full]
# Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E  6E37 0AD2 C639 6B69 CA14

* remotes/bkoppelmann2/tags/pull-tricore-20190625:
  tricore: add QSEED instruction
  tricore: sync ctx.hflags with tb->flags
  tricore: fix RRPW_INSERT instruction
  tricore: add UTOF instruction
  tricore: add FTOIZ instruction

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 13:47:21 +01:00
Peter Maydell
ab67678a59 Xen queue
* Fix build
 * xen-block: support feature-large-sector-size
 * xen-block: Support IOThread polling for PV shared rings
 * Avoid usage of a VLA
 * Cleanup Xen headers usage
 -----BEGIN PGP SIGNATURE-----
 
 iQFOBAABCgA4FiEE+AwAYwjiLP2KkueYDPVXL9f7Va8FAl0Q7JgaHGFudGhvbnku
 cGVyYXJkQGNpdHJpeC5jb20ACgkQDPVXL9f7Va8B1wf/bL9gdT/1R9474ZfbWAGZ
 KzkCo0C3jXUWRXd9z/UVwkmOhz0tLj1otx0fR+HFM4An+YAY6D0oZAKO9SCHhGDQ
 XflAK74dw1ieuZI+3Q5PXQO5xM1Oz0J+3TGlOFdZlh5UD68mEzteGnzU/zzs7i4E
 AZiKVOdO4YzMdHLVO4X/AqZH48n82FxjKcog7cZ9fTqDUz8SZGwJVSWocUZ0yOWb
 uhAacvhwHeZj64NuNShyF/RM7jolTk4CZWJv8Gy9CPxOM7noQIv0ttwu+QWCmODg
 pdTxd8HrE4rTnKaQFiHVas/AZ3cOfRw9RjdsARhXtGJq8AaQag9Q0iLZpyBYBfsF
 6w==
 =MDEA
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20190624' into staging

Xen queue

* Fix build
* xen-block: support feature-large-sector-size
* xen-block: Support IOThread polling for PV shared rings
* Avoid usage of a VLA
* Cleanup Xen headers usage

# gpg: Signature made Mon 24 Jun 2019 16:30:32 BST
# gpg:                using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF
# gpg:                issuer "anthony.perard@citrix.com"
# gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [marginal]
# gpg:                 aka "Anthony PERARD <anthony.perard@citrix.com>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 5379 2F71 024C 600F 778A  7161 D8D5 7199 DF83 42C8
#      Subkey fingerprint: F80C 0063 08E2 2CFD 8A92  E798 0CF5 572F D7FB 55AF

* remotes/aperard/tags/pull-xen-20190624:
  xen: Import other xen/io/*.h
  Revert xen/io/ring.h of "Clean up a few header guard symbols"
  xen: Drop includes of xen/hvm/params.h
  xen: Avoid VLA
  xen-bus / xen-block: add support for event channel polling
  xen-bus: allow AioContext to be specified for each event channel
  xen-bus: use a separate fd for each event channel
  xen-block: support feature-large-sector-size

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 13:03:51 +01:00
Peter Maydell
7fec76a022 Block patches:
- The SSH block driver now uses libssh instead of libssh2
 - The VMDK block driver gets read-only support for the seSparse
   subformat
 - Various fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQFGBAABCAAwFiEEkb62CjDbPohX0Rgp9AfbAGHVz0AFAl0Q4XASHG1yZWl0ekBy
 ZWRoYXQuY29tAAoJEPQH2wBh1c9AIU8H+wVaUzYwlIZIgUkC6A9ZiCNbur9TngnZ
 ywt9kc4CW8kEuIHm/m87qayt6cwWlw6OnWktQW14HHEqFVKdg2LwbJN20yG3a+tm
 YAkwcfkIbJ6ZMKx2QZ4TTwov6rbf57yQtwxPtkxXMMMe488WYoN/wZig25+6BYgU
 Z8FLhSW36TVAjbYAxuO+O9/JSx4DzjmHFnTkwW3XRLFYRMmH+eY3jB2T90W2zV/8
 QDDTo8ZvdaSASKlMRnH4iik8lX4QXKRTjfprTzuynoth0Zvtt8jarpfLKKSPyf8Z
 9bpEHBGFxYSyapGq1fHt9Le1jNx3lPVpzVsbEeGpai0FjnHXg+fntDQ=
 =YFoG
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2019-06-24' into staging

Block patches:
- The SSH block driver now uses libssh instead of libssh2
- The VMDK block driver gets read-only support for the seSparse
  subformat
- Various fixes

# gpg: Signature made Mon 24 Jun 2019 15:42:56 BST
# gpg:                using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40
# gpg:                issuer "mreitz@redhat.com"
# gpg: Good signature from "Max Reitz <mreitz@redhat.com>" [full]
# Primary key fingerprint: 91BE B60A 30DB 3E88 57D1  1829 F407 DB00 61D5 CF40

* remotes/maxreitz/tags/pull-block-2019-06-24:
  iotests: Fix 205 for concurrent runs
  ssh: switch from libssh2 to libssh
  vmdk: Add read-only support for seSparse snapshots
  vmdk: Reduce the max bound for L1 table size
  vmdk: Fix comment regarding max l1_size coverage
  iotest 134: test cluster-misaligned encrypted write
  blockdev: enable non-root nodes for transaction drive-backup source
  nvme: do not advertise support for unsupported arbitration mechanism

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01 11:28:28 +01:00
Greg Kurz
b827891d73 MAINTAINERS: Change maintership of Xen code under hw/9pfs
Xen folks are the actual maintainers for this.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Paul Durrant <paul.durrant@citrix.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Message-Id: <155912548463.2019004.3515830305299809902.stgit@bahia.lan>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 18:30:03 +02:00
Daniel P. Berrangé
811294b796 configure: use valid args testing sem_timedwait
The sem_timedwait function has been annotated as requiring
non-null args in latest header files from GCC snapshot
representing the future 2.30 release.

This causes configure to fail when -Werror is used:

config-temp/qemu-conf.c: In function ‘main’:
config-temp/qemu-conf.c:2:25: error: null argument where non-null required (argument 1) [-Werror=nonnull]
    2 | int main(void) { return sem_timedwait(0, 0); }
      |                         ^~~~~~~~~~~~~
config-temp/qemu-conf.c:2:25: error: null argument where non-null required (argument 2) [-Werror=nonnull]

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20190617114114.24897-1-berrange@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 18:27:07 +02:00
Antonio Ospite
4ace32e227 configure: disallow spaces and colons in source path and build path
The configure script breaks when the qemu source directory is in a path
containing white spaces, in particular the list of targets is not
correctly generated when calling "./configure --help" because of how the
default_target_list variable is built.

In addition to that, *building* qemu from a directory with spaces breaks
some assumptions in the Makefiles, even if the original source path does
not contain spaces like in the case of an out-of-tree build, or when
symlinks are involved.

To avoid these issues, refuse to run the configure script and the
Makefile if there are spaces or colons in the source path or the build
path, taking as inspiration what the kbuild system in linux does.

Buglink: https://bugs.launchpad.net/qemu/+bug/1817345

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Antonio Ospite <antonio.ospite@collabora.com>
Message-Id: <20190526144747.30019-3-ao2@ao2.it>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 18:27:00 +02:00
Antonio Ospite
142118254b configure: set source_path only once and make its definition more robust
Since commit 79d77bcd36 (configure: Remove --source-path option,
2019-04-29) source_path cannot be overridden anymore, move it out of the
"default parameters" block since the word "default" may suggest that the
value can change, while in fact it does not.

While at it, only set source_path once and separate the positional
argument of basename with "--" to more robustly cover the case of path
names starting with a dash.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Antonio Ospite <antonio.ospite@collabora.com>
Message-Id: <20190526144747.30019-2-ao2@ao2.it>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 18:26:54 +02:00
Laurent Vivier
c6d0700f57 linux-user/m68k: remove simulator syscall interface
This interface has been introduced in 2005 with the
coldfire implementation (e6e5906b6e ColdFire target.)
and looks like to do what the linux-user interface already
does with the TRAP exception rather than the ILLEGAL
exception.

This interface has not been maintained since that.
The semi-hosting interface is not removed so coldfire kernel
with semi-hosting is always supported.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20190524162049.806-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 17:14:41 +02:00
Lucien Murray-Pitts
808d77bc5f m68k comments break patch submission due to being incorrectly formatted
Altering all comments in target/m68k to match Qemu coding styles so that future
patches wont fail due to style breaches.

Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20190606234125.GA4830@localhost.localdomain>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 17:14:39 +02:00
Lucien Murray-Pitts
bf1fa6912d The m68k gdbstub SR reg request doesnt include Condition-Codes
The register request via gdbstub would return the SR part
which contains the Trace/Master/IRQ state flags, but
would be missing the CR (Condition Register) state bits.

This fix adds this support by merging them in the m68k
specific gdbstub handler m68k_cpu_gdb_read_register for SR register.

Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20190609105154.GA16755@localhost.localdomain>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26 17:12:57 +02:00
Aleksandar Markovic
5a6a1fabfc target/mips: Fix big endian host behavior for interleave MSA instructions
Fix big endian host behavior for interleave MSA instructions. Previous
fix used TARGET_WORDS_BIGENDIAN instead of HOST_WORDS_BIGENDIAN, which
was a mistake.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:56 +02:00
Aleksandar Markovic
23dd244baf tests/tcg: target/mips: Fix some test cases for pack MSA instructions
Fix certian test cases for MSA pack instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:51 +02:00
Aleksandar Markovic
4c399d066c tests/tcg: target/mips: Add support for MSA MIPS32R6 testings
Add files for MSA MIPS32R6 target testings (copiling and running).

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:46 +02:00
Aleksandar Markovic
5258822fcc tests/tcg: target/mips: Add support for MSA big-endian target testings
Add files for MSA big-endian target testings (copiling and running).

Little-endian files are renamed and ammended too.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:41 +02:00
Aleksandar Markovic
0b1450cce8 tests/tcg: target/mips: Amend tests for MSA int multiply instructions
Amend tests for MSA int multiply instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:33 +02:00
Aleksandar Markovic
c0a19f7bf1 tests/tcg: target/mips: Amend tests for MSA int dot product instructions
Add tests for instructions whose result depends on the value in destination
register (prior to instruction execution).

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:28 +02:00
Aleksandar Markovic
3d9569b855 tests/tcg: target/mips: Add tests for MSA move instructions
Add tests for MSA move instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:22 +02:00
Aleksandar Markovic
666952ea7c tests/tcg: target/mips: Add tests for MSA bit move instructions
Add tests for MSA bit move instructions.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1561543629-20327-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:17 +02:00
Aleksandar Markovic
a9e2d149d6 dma/rc4030: Minor code style cleanup
Fix some simple checkpatch.pl warnings in rc4030.c.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <1561472838-32272-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26 13:25:07 +02:00