tests/pflash-cfi02: Add test for supported CFI commands
Test the AMD command set for parallel flash chips. This test uses an ARM musicpal board with a pflash drive to test the following list of currently-supported commands. - Autoselect - CFI - Sector erase - Chip erase - Program - Unlock bypass - Reset Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu> Message-Id: <20190426162624.55977-2-stephen.checkoway@oberlin.edu> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> [PMD: reworded the patch subject, g_assert_cmpint -> cmphex] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
This commit is contained in:
Stephen Checkoway
Philippe Mathieu-Daudé
parent
7d0e02405f
commit
60b725b6d4
@ -260,6 +260,7 @@ check-qtest-arm-y += tests/m25p80-test$(EXESUF)
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check-qtest-arm-y += tests/test-arm-mptimer$(EXESUF)
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check-qtest-arm-y += tests/boot-serial-test$(EXESUF)
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check-qtest-arm-y += tests/hexloader-test$(EXESUF)
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check-qtest-arm-$(CONFIG_PFLASH_CFI02) += tests/pflash-cfi02-test$(EXESUF)
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check-qtest-aarch64-y = tests/numa-test$(EXESUF)
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check-qtest-aarch64-y += tests/boot-serial-test$(EXESUF)
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@ -767,6 +768,7 @@ tests/device-introspect-test$(EXESUF): tests/device-introspect-test.o
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tests/rtc-test$(EXESUF): tests/rtc-test.o
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tests/m48t59-test$(EXESUF): tests/m48t59-test.o
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tests/hexloader-test$(EXESUF): tests/hexloader-test.o
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tests/pflash-cfi02$(EXESUF): tests/pflash-cfi02-test.o
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tests/endianness-test$(EXESUF): tests/endianness-test.o
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tests/prom-env-test$(EXESUF): tests/prom-env-test.o $(libqos-obj-y)
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tests/rtas-test$(EXESUF): tests/rtas-test.o $(libqos-spapr-obj-y)
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225
tests/pflash-cfi02-test.c
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225
tests/pflash-cfi02-test.c
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/*
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* QTest testcase for parallel flash with AMD command set
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*
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* Copyright (c) 2019 Stephen Checkoway
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "libqtest.h"
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/*
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* To test the pflash_cfi02 device, we run QEMU with the musicpal machine with
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* a pflash drive. This enables us to test some flash configurations, but not
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* all. In particular, we're limited to a 16-bit wide flash device.
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*/
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#define MP_FLASH_SIZE_MAX (32 * 1024 * 1024)
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#define BASE_ADDR (0x100000000ULL - MP_FLASH_SIZE_MAX)
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#define FLASH_WIDTH 2
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#define CFI_ADDR (FLASH_WIDTH * 0x55)
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#define UNLOCK0_ADDR (FLASH_WIDTH * 0x5555)
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#define UNLOCK1_ADDR (FLASH_WIDTH * 0x2AAA)
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#define CFI_CMD 0x98
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#define UNLOCK0_CMD 0xAA
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#define UNLOCK1_CMD 0x55
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#define AUTOSELECT_CMD 0x90
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#define RESET_CMD 0xF0
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#define PROGRAM_CMD 0xA0
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#define SECTOR_ERASE_CMD 0x30
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#define CHIP_ERASE_CMD 0x10
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#define UNLOCK_BYPASS_CMD 0x20
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#define UNLOCK_BYPASS_RESET_CMD 0x00
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static char image_path[] = "/tmp/qtest.XXXXXX";
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static inline void flash_write(uint64_t byte_addr, uint16_t data)
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{
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qtest_writew(global_qtest, BASE_ADDR + byte_addr, data);
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}
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static inline uint16_t flash_read(uint64_t byte_addr)
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{
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return qtest_readw(global_qtest, BASE_ADDR + byte_addr);
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}
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static void unlock(void)
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{
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flash_write(UNLOCK0_ADDR, UNLOCK0_CMD);
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flash_write(UNLOCK1_ADDR, UNLOCK1_CMD);
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}
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static void reset(void)
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{
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flash_write(0, RESET_CMD);
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}
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static void sector_erase(uint64_t byte_addr)
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{
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unlock();
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flash_write(UNLOCK0_ADDR, 0x80);
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unlock();
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flash_write(byte_addr, SECTOR_ERASE_CMD);
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}
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static void wait_for_completion(uint64_t byte_addr)
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{
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/* If DQ6 is toggling, step the clock and ensure the toggle stops. */
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if ((flash_read(byte_addr) & 0x40) ^ (flash_read(byte_addr) & 0x40)) {
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/* Wait for erase or program to finish. */
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clock_step_next();
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/* Ensure that DQ6 has stopped toggling. */
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g_assert_cmphex(flash_read(byte_addr), ==, flash_read(byte_addr));
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}
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}
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static void bypass_program(uint64_t byte_addr, uint16_t data)
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{
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flash_write(UNLOCK0_ADDR, PROGRAM_CMD);
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flash_write(byte_addr, data);
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/*
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* Data isn't valid until DQ6 stops toggling. We don't model this as
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* writes are immediate, but if this changes in the future, we can wait
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* until the program is complete.
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*/
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wait_for_completion(byte_addr);
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}
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static void program(uint64_t byte_addr, uint16_t data)
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{
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unlock();
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bypass_program(byte_addr, data);
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}
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static void chip_erase(void)
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{
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unlock();
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flash_write(UNLOCK0_ADDR, 0x80);
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unlock();
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flash_write(UNLOCK0_ADDR, SECTOR_ERASE_CMD);
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}
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static void test_flash(void)
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{
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global_qtest = qtest_initf("-M musicpal,accel=qtest "
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"-drive if=pflash,file=%s,format=raw,copy-on-read",
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image_path);
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/* Check the IDs. */
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unlock();
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flash_write(UNLOCK0_ADDR, AUTOSELECT_CMD);
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g_assert_cmphex(flash_read(FLASH_WIDTH * 0x0000), ==, 0x00BF);
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g_assert_cmphex(flash_read(FLASH_WIDTH * 0x0001), ==, 0x236D);
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reset();
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/* Check the erase blocks. */
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flash_write(CFI_ADDR, CFI_CMD);
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g_assert_cmphex(flash_read(FLASH_WIDTH * 0x10), ==, 'Q');
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g_assert_cmphex(flash_read(FLASH_WIDTH * 0x11), ==, 'R');
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g_assert_cmphex(flash_read(FLASH_WIDTH * 0x12), ==, 'Y');
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/* Num erase regions. */
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g_assert_cmphex(flash_read(FLASH_WIDTH * 0x2C), >=, 1);
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uint32_t nb_sectors = flash_read(FLASH_WIDTH * 0x2D) +
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(flash_read(FLASH_WIDTH * 0x2E) << 8) + 1;
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uint32_t sector_len = (flash_read(FLASH_WIDTH * 0x2F) << 8) +
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(flash_read(FLASH_WIDTH * 0x30) << 16);
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reset();
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/* Erase and program sector. */
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for (uint32_t i = 0; i < nb_sectors; ++i) {
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uint64_t byte_addr = i * sector_len;
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sector_erase(byte_addr);
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/* Read toggle. */
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uint16_t status0 = flash_read(byte_addr);
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/* DQ7 is 0 during an erase. */
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g_assert_cmphex(status0 & 0x80, ==, 0);
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uint16_t status1 = flash_read(byte_addr);
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/* DQ6 toggles during an erase. */
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g_assert_cmphex(status0 & 0x40, !=, status1 & 0x40);
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/* Wait for erase to complete. */
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clock_step_next();
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/* Ensure DQ6 has stopped toggling. */
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g_assert_cmphex(flash_read(byte_addr), ==, flash_read(byte_addr));
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/* Now the data should be valid. */
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g_assert_cmphex(flash_read(byte_addr), ==, 0xFFFF);
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/* Program a bit pattern. */
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program(byte_addr, 0x5555);
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g_assert_cmphex(flash_read(byte_addr), ==, 0x5555);
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program(byte_addr, 0xAA55);
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g_assert_cmphex(flash_read(byte_addr), ==, 0x0055);
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}
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/* Erase the chip. */
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chip_erase();
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/* Read toggle. */
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uint16_t status0 = flash_read(0);
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/* DQ7 is 0 during an erase. */
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g_assert_cmphex(status0 & 0x80, ==, 0);
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uint16_t status1 = flash_read(0);
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/* DQ6 toggles during an erase. */
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g_assert_cmphex(status0 & 0x40, !=, status1 & 0x40);
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/* Wait for erase to complete. */
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clock_step_next();
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/* Ensure DQ6 has stopped toggling. */
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g_assert_cmphex(flash_read(0), ==, flash_read(0));
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/* Now the data should be valid. */
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g_assert_cmphex(flash_read(0), ==, 0xFFFF);
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/* Unlock bypass */
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unlock();
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flash_write(UNLOCK0_ADDR, UNLOCK_BYPASS_CMD);
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bypass_program(0, 0x0123);
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bypass_program(2, 0x4567);
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bypass_program(4, 0x89AB);
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/*
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* Test that bypass programming, unlike normal programming can use any
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* address for the PROGRAM_CMD.
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*/
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flash_write(6, PROGRAM_CMD);
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flash_write(6, 0xCDEF);
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wait_for_completion(6);
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flash_write(0, UNLOCK_BYPASS_RESET_CMD);
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bypass_program(8, 0x55AA); /* Should fail. */
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g_assert_cmphex(flash_read(0), ==, 0x0123);
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g_assert_cmphex(flash_read(2), ==, 0x4567);
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g_assert_cmphex(flash_read(4), ==, 0x89AB);
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g_assert_cmphex(flash_read(6), ==, 0xCDEF);
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g_assert_cmphex(flash_read(8), ==, 0xFFFF);
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qtest_quit(global_qtest);
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}
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static void cleanup(void *opaque)
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{
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unlink(image_path);
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}
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int main(int argc, char **argv)
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{
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int fd = mkstemp(image_path);
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if (fd == -1) {
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g_printerr("Failed to create temporary file %s: %s\n", image_path,
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strerror(errno));
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exit(EXIT_FAILURE);
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}
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if (ftruncate(fd, 8 * 1024 * 1024) < 0) {
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int error_code = errno;
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close(fd);
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unlink(image_path);
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g_printerr("Failed to truncate file %s to 8 MB: %s\n", image_path,
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strerror(error_code));
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exit(EXIT_FAILURE);
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}
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close(fd);
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qtest_add_abrt_handler(cleanup, NULL);
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g_test_init(&argc, &argv, NULL);
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qtest_add_func("pflash-cfi02", test_flash);
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int result = g_test_run();
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cleanup(NULL);
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return result;
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}
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