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277 Commits

Author SHA1 Message Date
Juha Riihimäki
e9bb4aa977 fix ARMv7 data processing instructions 
Modernize parts of target-arm/translate.c in preparation for the
modifications in the subsequent patch in this patch set. This is done
in order to avoid writing new code to target-arm/translate.c that
would use deprecated methods and/or variables.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Signed-off-by: Paul Brook <paul@codesourcery.com>
 2009-05-15 02:48:18 +01:00
aurel32
1b530a6dfc Add new command line option -singlestep for tcg single stepping. 
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-04-05 20:08:59 +00:00
pbrook
cbbccffc7a Fix ARM quadword VDUP (core register). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6857 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-17 12:19:58 +00:00
aurel32
66896cb803 tcg: rename bswap_i32/i64 functions 
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-13 09:34:48 +00:00
aliguori
8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) 
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 22:36:53 +00:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros 
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 22:34:14 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate 
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-04 22:05:52 +00:00
pbrook
fe1479c3ad Implement (very) basic Thumb2-EE support. This doesn't actually implement 
EE state, just the associated system coprocessor registers.  It is sufficient
to keep OS setup and context switching code happy.

Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6104 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-19 13:18:36 +00:00
pbrook
644ad8066d Fix VFP fixed point conversion routines. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6103 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-19 13:02:08 +00:00
balrog
955a7dd5e8 ARM: fix smmul and smmla/smmls usage of registers (Mans Rullgard). 
This fixes the destination and accumulator registers for the smmul
and smmla instructions.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5913 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 14:18:02 +00:00
balrog
ded9d29547 ARM: fix usad8 and usada8 usage of registers (Mans Rullgard). 
This fixes the destination and accumulator registers for the usad8
and usada8 instructions.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5912 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 14:03:27 +00:00
balrog
4cc633c38b Patch holes in ARM translation (Laurent Desnogues). 
- gen_set_CF_bit31:  use the right value to set carry flag
 - shifter_out_im:  remove a spurious semi-colon
 - add a break for VSHRN, VRSHRN, VQSHRN, VQRSHRN
   size 2 case
 - sbfx, ubfx are v6t2 instructions

The correct cps user mode behaviour is unclear so it's left out from the
commit until ARM decides it.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5908 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:32:09 +00:00
balrog
aaf2d97dcb ARM: cosmetics (Laurent Desnogues). 
- remove macros that are not used
  - remove disass structure is_mem field which value is never used
  - correct a typo in a comment.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5907 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-07 13:20:16 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) 
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-25 22:13:57 +00:00
aliguori
bfa50bc263 Remove premature memop TB terminations (Jan Kiszka) 
Now that we can properly restore the pc on watchpoint hits, there is no
more need for prematurely terminating TBs if watchpoints are present.
Remove all related bits.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5742 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 20:26:41 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka) 
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 20:07:32 +00:00
pbrook
a7812ae412 TCG variable type checking. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-17 14:43:54 +00:00
pbrook
c9fb531ab2 VFP fnmsc negative zero fix. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5610 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-03 19:09:29 +00:00
blueswir1
b1d8e52e63 Fix undeclared symbol warnings from sparse 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-26 13:43:07 +00:00
pbrook
a47f43d272 Additional exclusive load/store instruction are v6K, not v6T2. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5518 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-22 21:42:54 +00:00
pbrook
86753403b2 Fix ARMv6t2 strex instructions. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5517 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-22 20:35:54 +00:00
pbrook
3018f2598c Fix ARM NEON vdup and vtbl bugs. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5286 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 00:52:42 +00:00
pbrook
e4b3861d15 Fix neon encoding comment. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5285 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 23:15:38 +00:00
pbrook
36aa55dcd9 Add concat_i32_i64 op. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 13:48:32 +00:00
balrog
b40d0353b0 Fix QADD / QSUB decoding on ARM (Torbjörn Andersson). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5273 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-20 03:18:07 +00:00
blueswir1
79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-30 09:51:20 +00:00
balrog
7997d92f2c ARM: fix CPS masks (Vincent Palatin). 
According to ARM Reference Manual (DDI0100 A4.1.16),
bit 5 is fixed to 0 (bit 4 is the MSB of the mode), so the instruction mask
should be  0x0ff10020 not 0x0ff10010.
Besides, mmod flag is bit 17 (b14 is SBZ)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4899 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-19 10:34:35 +00:00
balrog
22478e79f2 Fix smlald, smlsld, pkhtp, pkhbt, ssat, usat, umul, smul... (Laurent Desnogues). 
helper.c
 - copy reference c0_c2 to runtime c0_c2 and not c0_c1

op_helper.c
 - remove old code (PARAM1, probably some left over from old dyngen)
   that broke do_[us]sat

translate.c
 - gen_smul_dual should sign-extend from 16 bit to 32 bit and not from
   8 to 32
 - disas_arm_insn:
   * smlalxy:  that was completely wrong;  now the addition is
     performed as for smlald
   * pkhtb:  optional ASR not taken into account (similar
   * to [us]sat)
   * pkhtb/pkhbt: tmp2 is dead
   * smlald, smlsld, smuad, smusd, smlad, smlsd: rd
   * and rn swapped


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4898 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-19 10:12:22 +00:00
ths
2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-18 18:01:29 +00:00
pbrook
d60bb01cbb Terminate TB immediately after v7-M exception return. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4868 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-11 00:27:19 +00:00
ths
551bd27f22 Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-03 17:57:36 +00:00
ths
06e80fc927 Silence compiler warning. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4839 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-03 16:40:06 +00:00
ths
bf20dc076b Spelling fixes, spotted by Stuart Brady. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 17:22:19 +00:00
pbrook
a50f5b9186 Suppress bogus compiler warnings. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 15:25:29 +00:00
pbrook
2e70f6efa8 Add instruction counter. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 01:03:05 +00:00
balrog
a60de94777 Mark a dead_tmp as such in ARM msr. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4648 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-02 02:29:26 +00:00
pbrook
fbb4a2e371 Implement ARM magic kernel page and TLS register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4610 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 00:20:44 +00:00
pbrook
cb63669a54 Fix ARM conditional branch bug. 
Add tcg_gen_brcondi.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-24 02:22:00 +00:00
balrog
4aa9aca4c2 Remove arm's local not_i32 tcg op now that there's one in tcg. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4475 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-17 18:15:04 +00:00
pbrook
390efc54fb Add TCG native negation op. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-11 14:35:37 +00:00
pbrook
868314358e Add zero extension (pseudo-)ops. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-11 12:22:01 +00:00
aurel32
d2856f1ad4 Factorize code in translate.c 
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-28 00:32:32 +00:00
balrog
601d70b9e5 Remove an unused field and fix some non-code typos. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4222 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-20 01:03:45 +00:00
balrog
66230e0dee Correct more ARM VFP 32/64 and signed/unsigned typos. 
Fixes unreadable fonts in Maemo guest.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4221 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-20 00:58:01 +00:00
balrog
422ebf6979 Save the exact SWI return address in Thumb mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4217 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-16 23:17:02 +00:00
balrog
e22f8f39f3 Correctly restore pc after an exception occured in Thumb mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4211 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-14 19:14:06 +00:00
balrog
5b340b51fd Fix ARM VFP related segfaults. 
The fconst change is partly a guess.
VFP_OP1 is still unused.
An ARMv6 target still won't boot.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4210 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-14 02:19:57 +00:00
balrog
6a0d8a1d23 Fix the offset in Thumb bl instruction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4204 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-13 13:25:31 +00:00
balrog
2637a3beb9 Set an unset label in ARM strex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4203 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-13 03:15:14 +00:00
balrog
72f1c62f7d Fix ARM and Thumb ldlex/stlex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4202 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-13 01:53:27 +00:00
balrog
6c95676b16 Store the right TCG temp (typo). 
Stops ARMv6 target from segfaulting early.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-13 00:57:49 +00:00
pbrook
6fbe23d50e ARM N=Z=1 flag fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4156 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-01 17:19:11 +00:00
pbrook
e677137d99 ARM TCG conversion 15/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4152 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:49:05 +00:00
pbrook
ad69471ce5 ARM TCG conversion 14/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4151 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:48:30 +00:00
pbrook
8f8e3aa451 ARM TCG conversion 13/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4150 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:48:01 +00:00
pbrook
8984bd2e83 ARM TCG conversion 12/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4149 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:48 +00:00
pbrook
5e3f878ad6 ARM TCG conversion 11/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4148 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:34 +00:00
pbrook
4373f3ceeb ARM TCG conversion 10/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:19 +00:00
pbrook
b010980544 ARM TCG conversion 9/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:47:03 +00:00
pbrook
d9ba48308d ARM TCG conversion 8/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4145 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:46:50 +00:00
pbrook
6ddbc6e4cf ARM TCG conversion 7/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:46:33 +00:00
pbrook
3670669ce2 ARM TCG conversion 6/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4143 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:46:19 +00:00
pbrook
8f01245ee7 ARM TCG conversion 5/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4142 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:46:03 +00:00
pbrook
1497c961af ARM TCG conversion 4/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4141 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:45:50 +00:00
pbrook
9a119ff6c1 ARM TCG conversion 3/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4140 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:45:35 +00:00
pbrook
f51bbbfefe ARM TCG conversion 2/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4139 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:45:13 +00:00
pbrook
b26eefb68e ARM TCG conversion 1/16. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-31 03:44:26 +00:00
bellard
57fec1fee9 use the TCG code generator 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-01 10:50:11 +00:00
pbrook
e160c51ccd Fix msr_mask. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3584 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 14:36:36 +00:00
pbrook
9ee6e8bb85 ARMv7 support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 00:04:49 +00:00
ths
3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths
5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
ths
ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-11 10:04:58 +00:00
balrog
2e23213f26 Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-01 02:31:54 +00:00
pbrook
39524770b2 Fix "blx lr" (Lauro Venancio). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2979 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-11 18:59:35 +00:00
balrog
7a774c875b Use the same offset for all STR and STM instructions that store r15, as specified in ARM ARM (patch from Chris McNett). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2970 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-10 13:53:18 +00:00
balrog
a90b7318ba Implement power state changes (IDLE and SLEEP) for PXA. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2762 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-01 01:28:01 +00:00
balrog
18c9b56060 Implement iwMMXt instruction set for the PXA270 cpu. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-30 02:02:17 +00:00
balrog
c1713132e0 Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-30 01:26:42 +00:00
ths
687fa640d4 Random bug fixes from code inspection, by Wang Cheng Yeh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2580 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 08:18:36 +00:00
pbrook
5fd46862e5 ARM register index+writeback fix (Lauro Ramos Venancio). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2481 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-17 01:43:01 +00:00
pbrook
6658ffb81e Watchpoint support (previous commit got eaten by Savannah server crash). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2479 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-16 23:58:11 +00:00
pbrook
18acad9250 ARM doubleword post-modify fix (Daniel Jacobowitz). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2424 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-02-14 20:17:03 +00:00
pbrook
a94a6abff4 Fix ARM VFP debugging dumps. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2201 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-10-25 17:43:33 +00:00
pbrook
191f9a93f4 ARM postincrememnt addressing fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1970 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-06-14 14:36:07 +00:00
bellard
159f366388 ARM undefined instruction execution (Jason Wessel) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1938 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-05-22 23:06:04 +00:00
pbrook
358bf29e80 Thumb prefetch abort fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1805 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-04-09 14:38:57 +00:00
pbrook
40f137e1ea Add Arm926 core support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1765 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-20 00:33:36 +00:00
pbrook
2ae23e7504 Fix Arm msr spsr bug. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1761 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-11 16:20:39 +00:00
pbrook
3aa22b4b53 Fix Thumb variable shift condition code bug. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1748 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-07 03:34:35 +00:00
pbrook
191abaa2f0 Fix Arm interrupted ldm bug. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1743 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-04 21:50:36 +00:00
pbrook
06c949e62a Implement Arm BKPT instruction. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1740 c046a42c-6fe2-441c-8c8c-71466251a162
 2006-02-04 19:35:26 +00:00
bellard
68998c5de3 cpu_reset() fix (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1712 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-18 16:55:25 +00:00
bellard
ee0971849e Arm mulxy insn fix (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1683 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-12-04 18:56:28 +00:00
bellard
9332f9dafa ARM CPU suspend/halt (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1663 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-26 10:46:39 +00:00
bellard
b5ff1b3127 ARM system emulation (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1661 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-26 10:38:39 +00:00
bellard
173d6cfe51 cpu_exec_init() change 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1643 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-21 23:32:20 +00:00
bellard
6e256c935c use direct jump only for jumps in the same page 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1629 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-20 10:32:05 +00:00
bellard
2531fc7bc0 thumb BLX insn fix (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1607 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-11-06 19:36:29 +00:00
bellard
c53be33474 suppressed JUMP_TB (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1594 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-10-30 21:39:19 +00:00
bellard
1e8a7cfd11 Show thumb state in cpu dump (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1555 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-08-21 10:14:28 +00:00
bellard
bc380d1719 ARM VFP dump fix (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1432 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-05-13 22:50:47 +00:00
bellard
ff8263a951 ARM saturating arithmetic fixes (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1431 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-05-13 22:45:23 +00:00
bellard
5899f386ba ARM thumb fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1418 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-27 20:25:20 +00:00
bellard
e50e6a2019 better arm conditionnal execution implementation (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1399 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-26 20:36:11 +00:00
bellard
74c161bd17 Fix dumping of arm registers (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1387 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-23 18:46:03 +00:00
bellard
8aaca4c0b4 ARM singlestep support (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1384 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-23 18:27:52 +00:00
bellard
1fddef4b1b gdb support for user mode (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1367 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-17 19:16:13 +00:00
bellard
8e96005d86 VFP register ordering (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1355 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-04-07 19:42:46 +00:00
bellard
b7bcbe9524 ARM VFP support (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1309 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-22 19:27:29 +00:00
bellard
b8a9e8f133 initial user mmu support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1270 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-07 23:10:07 +00:00
bellard
7ff4d2180b CF generator for constant operands 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1267 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-02-07 12:42:35 +00:00
bellard
99c475abf1 armv5te support (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1258 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-01-31 20:45:13 +00:00
bellard
0fa85d43d4 64 bit target support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162
 2005-01-03 23:43:32 +00:00
bellard
1e8d4eec48 more complete ARM shift fix 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1168 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-12-08 23:40:14 +00:00
bellard
88920f344d ARM shift fix (Paul Brook) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1167 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-12-08 22:28:39 +00:00
bellard
7fe48483cd monitor fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-10-09 18:08:01 +00:00
bellard
7496f5266c cpu_single_env init 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@967 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-06-22 10:56:50 +00:00
bellard
beddab753d arm load/store half word fix (Ulrich Hecht) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@785 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-05-05 18:36:10 +00:00
bellard
e19e89a5d4 more log items 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@676 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-03-21 17:08:23 +00:00
bellard
537730b956 zero offset optimisation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-02-22 13:40:57 +00:00
bellard
3d57da2a70 suppressed dummy FPU ops 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@610 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-02-16 21:47:14 +00:00
bellard
a6b025d37d added cpu_get_phys_page_debug() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@579 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-01-24 15:18:16 +00:00
bellard
bd49793889 use generic GenOpFunc 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@543 c046a42c-6fe2-441c-8c8c-71466251a162
 2004-01-05 00:06:41 +00:00
bellard
2e134c9c55 64-bit multiplication fix (Ulrich Hecht) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@446 c046a42c-6fe2-441c-8c8c-71466251a162
 2003-11-11 13:55:33 +00:00
bellard
e748ba4f53 ARM half word load/store fix (Ulrich Hecht) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@438 c046a42c-6fe2-441c-8c8c-71466251a162
 2003-11-03 22:25:25 +00:00
bellard
2c0262afa7 new directory structure 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@385 c046a42c-6fe2-441c-8c8c-71466251a162
 2003-09-30 20:34:21 +00:00