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ARM TCG conversion 9/16.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-03-31 03:47:03 +00:00
parent d9ba48308d
commit b010980544
8 changed files with 487 additions and 409 deletions
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2
target-arm/exec.h
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@ -72,8 +72,6 @@ void helper_set_cp(CPUState *, uint32_t, uint32_t);
uint32_t helper_get_cp(CPUState *, uint32_t);
void helper_set_cp15(CPUState *, uint32_t, uint32_t);
uint32_t helper_get_cp15(CPUState *, uint32_t);
void helper_set_r13_banked(CPUState *env, int mode, uint32_t val);
uint32_t helper_get_r13_banked(CPUState *env, int mode);
uint32_t helper_v7m_mrs(CPUState *env, int reg);
void helper_v7m_msr(CPUState *env, int reg, uint32_t val);

8
target-arm/helper.c
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@ -513,12 +513,12 @@ void switch_mode(CPUState *env, int mode)
cpu_abort(env, "Tried to switch out of user mode\n");
}
void helper_set_r13_banked(CPUState *env, int mode, uint32_t val)
void HELPER(set_r13_banked)(CPUState *env, uint32_t mode, uint32_t val)
{
cpu_abort(env, "banked r13 write\n");
}
uint32_t helper_get_r13_banked(CPUState *env, int mode)
uint32_t HELPER(get_r13_banked)(CPUState *env, uint32_t mode)
{
cpu_abort(env, "banked r13 read\n");
return 0;
@ -1793,12 +1793,12 @@ bad_reg:
return 0;
}
void helper_set_r13_banked(CPUState *env, int mode, uint32_t val)
void HELPER(set_r13_banked)(CPUState *env, uint32_t mode, uint32_t val)
{
env->banked_r13[bank_number(mode)] = val;
}
uint32_t helper_get_r13_banked(CPUState *env, int mode)
uint32_t HELPER(get_r13_banked)(CPUState *env, uint32_t mode)
{
return env->banked_r13[bank_number(mode)];
}

14
target-arm/helpers.h
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@ -19,6 +19,13 @@ static inline void gen_helper_##name(TCGv arg1, TCGv arg2) \
{ \
tcg_gen_helper_0_2(helper_##name, arg1, arg2); \
}
#define DEF_HELPER_0_3(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name( \
TCGv arg1, TCGv arg2, TCGv arg3) \
{ \
tcg_gen_helper_0_3(helper_##name, arg1, arg2, arg3); \
}
#define DEF_HELPER_1_0(name, ret, args) \
DEF_HELPER(name, ret, args) \
static inline void gen_helper_##name(TCGv ret) \
@ -48,6 +55,7 @@ static inline void gen_helper_##name(TCGv ret, \
#define DEF_HELPER_0_0 DEF_HELPER
#define DEF_HELPER_0_1 DEF_HELPER
#define DEF_HELPER_0_2 DEF_HELPER
#define DEF_HELPER_0_3 DEF_HELPER
#define DEF_HELPER_1_0 DEF_HELPER
#define DEF_HELPER_1_1 DEF_HELPER
#define DEF_HELPER_1_2 DEF_HELPER
@ -108,6 +116,12 @@ DEF_HELPER_0_0(wfi, void, (void))
DEF_HELPER_0_2(cpsr_write, void, (uint32_t, uint32_t))
DEF_HELPER_1_0(cpsr_read, uint32_t, (void))
DEF_HELPER_1_2(get_r13_banked, uint32_t, (CPUState *, uint32_t))
DEF_HELPER_0_3(set_r13_banked, void, (CPUState *, uint32_t, uint32_t))
DEF_HELPER_1_1(get_user_reg, uint32_t, (uint32_t))
DEF_HELPER_0_2(set_user_reg, void, (uint32_t, uint32_t))
#undef DEF_HELPER
#undef DEF_HELPER_0_0
#undef DEF_HELPER_0_1

42
target-arm/op.c
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@ -589,48 +589,6 @@ void OPPROTO op_movl_T0_cp15(void)
FORCE_RET();
}
/* Access to user mode registers from privileged modes. */
void OPPROTO op_movl_T0_user(void)
{
int regno = PARAM1;
if (regno == 13) {
T0 = env->banked_r13[0];
} else if (regno == 14) {
T0 = env->banked_r14[0];
} else if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
T0 = env->usr_regs[regno - 8];
} else {
T0 = env->regs[regno];
}
FORCE_RET();
}
void OPPROTO op_movl_user_T0(void)
{
int regno = PARAM1;
if (regno == 13) {
env->banked_r13[0] = T0;
} else if (regno == 14) {
env->banked_r14[0] = T0;
} else if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
env->usr_regs[regno - 8] = T0;
} else {
env->regs[regno] = T0;
}
FORCE_RET();
}
void OPPROTO op_movl_T1_r13_banked(void)
{
T1 = helper_get_r13_banked(env, PARAM1);
}
void OPPROTO op_movl_r13_T1_banked(void)
{
helper_set_r13_banked(env, PARAM1, T1);
}
void OPPROTO op_v7m_mrs_T0(void)
{
T0 = helper_v7m_mrs(env, PARAM1);

33
target-arm/op_helper.c
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@ -459,3 +459,36 @@ void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
{
cpsr_write(env, val, mask);
}
/* Access to user mode registers from privileged modes. */
uint32_t HELPER(get_user_reg)(uint32_t regno)
{
uint32_t val;
if (regno == 13) {
val = env->banked_r13[0];
} else if (regno == 14) {
val = env->banked_r14[0];
} else if (regno >= 8
&& (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
val = env->usr_regs[regno - 8];
} else {
val = env->regs[regno];
}
return val;
}
void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
{
if (regno == 13) {
env->banked_r13[0] = val;
} else if (regno == 14) {
env->banked_r14[0] = val;
} else if (regno >= 8
&& (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
env->usr_regs[regno - 8] = val;
} else {
env->regs[regno] = val;
}
}

31
target-arm/op_mem.h
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@ -1,36 +1,5 @@
/* ARM memory operations. */
void helper_ld(uint32_t);
/* Load from address T1 into T0. */
#define MEM_LD_OP(name) \
void OPPROTO glue(op_ld##name,MEMSUFFIX)(void) \
{ \
T0 = glue(ld##name,MEMSUFFIX)(T1); \
FORCE_RET(); \
}
MEM_LD_OP(ub)
MEM_LD_OP(sb)
MEM_LD_OP(uw)
MEM_LD_OP(sw)
MEM_LD_OP(l)
#undef MEM_LD_OP
/* Store T0 to address T1. */
#define MEM_ST_OP(name) \
void OPPROTO glue(op_st##name,MEMSUFFIX)(void) \
{ \
glue(st##name,MEMSUFFIX)(T1, T0); \
FORCE_RET(); \
}
MEM_ST_OP(b)
MEM_ST_OP(w)
MEM_ST_OP(l)
#undef MEM_ST_OP
/* Swap T0 with memory at address T1. */
/* ??? Is this exception safe? */
#define MEM_SWP_OP(name, lname) \

754
target-arm/translate.c
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File diff suppressed because it is too large Load Diff

12
tcg/tcg-op.h
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@ -199,6 +199,18 @@ static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2)
0, NULL, 2, args);
}
static inline void tcg_gen_helper_0_3(void *func,
TCGv arg1, TCGv arg2, TCGv arg3)
{
TCGv args[3];
args[0] = arg1;
args[1] = arg2;
args[2] = arg3;
tcg_gen_call(&tcg_ctx,
tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS,
0, NULL, 3, args);
}
static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2,
TCGv arg3, TCGv arg4)
{