Commit Graph

40 Commits

Author SHA1 Message Date
Aurelien Jarno
cf7e0c80aa target-cris: Switch to AREG0 free mode
Add an explicit CPUCRISState parameter instead of relying on AREG0, and
use cpu_ld* in translation and interrupt handling. Remove AREG0 swapping
in tlb_fill(). Switch to AREG0 free mode

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15 17:44:33 +00:00
Lars Persson
8219314be6 cris: Fix NMI-flag handling on crisv10.
- The M-flag is encoded in different bits on cris v10 and cris v32.

Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-15 13:21:32 +02:00
Edgar E. Iglesias
f756c7a723 cris: Add break support for v10.
Still no retb

Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2012-06-14 15:29:11 +02:00
Andreas Färber
a1170bfd19 target-cris: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUCRISState/g" target-cris/*.[hc]
  sed -i "s/#define CPUCRISState/#define CPUState/" target-cris/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Stefan Weil
7ad757b29b target-cris: Clean includes
The change in cpu.h is needed when HOST_LONG_BITS is defined in qemu-common.h.

Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-28 22:33:42 +01:00
Stefan Sandstrom
774d5c5b16 cris: Handle conditional stores on CRISv10
Signed-off-by: Stefan Sandstrom <Stefan.Sandstrom@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-12-12 11:38:31 +01:00
Blue Swirl
97b348e7d2 Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07 09:32:01 +00:00
Blue Swirl
2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Edgar E. Iglesias
58aebb946a cris: Fix TLB exec bit protection
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-09-18 12:34:59 +02:00
Edgar E. Iglesias
abdfd9500e cris: Avoid spurios hw_abort on recursive bus faults
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-09-16 15:40:27 +02:00
Edgar E. Iglesias
9f5a1fae7e cris: Avoid debug clobbering for both I & D MMU state.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@axis.com>
2010-07-05 11:39:04 +02:00
Edgar E. Iglesias
3c4fe427ed cris: Dont clobber the MMU state across calls to cpu_get_phys_page_debug.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-07-05 10:24:56 +02:00
Blue Swirl
43dc2a645e Replace assert(0) with abort() or cpu_abort()
When building with -DNDEBUG, assert(0) will not stop execution
so it must not be used for abnormal termination.

Use cpu_abort() when in CPU context, abort() otherwise.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-18 18:41:57 +00:00
Paul Brook
d4c430a80f Large page TLB flush
QEMU uses a fixed page size for the CPU TLB.  If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate
all entries covered by the large page.  However the address used to
invalidate the entry may not be present in the QEMU TLB, so we do not
know which regions to clear.

Implementing a full vaiable size TLB is hard and slow, so just keep a
simple address/mask pair to record which addresses may have been mapped by
large pages.  If the guest invalidates this region then flush the
whole TLB.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-17 02:44:41 +00:00
Paul Brook
4fcc562bff Remove cpu_get_phys_page_debug from userspace emulation
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12 18:34:25 +00:00
Edgar E. Iglesias
7a9773563c cris: Add v10 style interrupts.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-02-15 11:47:34 +01:00
Edgar E. Iglesias
218951ef4d CRIS: Segmented addressing only for kernel mode.
Segmented translation through the CRIS MMU is only done for
accesses in kernel mode. In user-mode, all accesses are treated
as paged regardless of the mode config in RW_MM_CFG.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-10-10 17:34:27 +02:00
Edgar E. Iglesias
be9f2ded53 CRIS: Update PR_EDA on TLB faults.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-10-08 12:07:11 +02:00
Anthony Liguori
c227f0995e Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem.  Something
like this _must_ be presented on the list first so people can provide input
and cope with it.

This reverts commit 99a0949b72.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01 16:12:16 -05:00
malc
99a0949b72 Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <av1474@comtv.ru>
2009-10-01 22:45:02 +04:00
Blue Swirl
8167ee8839 Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
Edgar E. Iglesias
2fa73ec818 CRIS: cris_mmu_result_t -> cris_mmu_result
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-04-25 15:51:53 +02:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
aliguori
d12d51d5ba Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.

This patch doesn't try to merge logging macros from different files,
but just unify the debugging code #ifdefs onto a macro on each file. A
further cleanup can unify the debugging macros on a common header, later

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6332 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 21:48:06 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
edgar_igl
cddffe3739 CRIS: Partial EXS reg support and fixes for SPC.
* Add partial support for the EXS (exception status) register.
* Update SPC after each singlestep exception.
* Remove special treatment of break 8.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5448 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-08 14:22:17 +00:00
edgar_igl
a1aebcb8e6 CRIS: Fix brk 8 and add S-flag emulation.
* break 8 sets ERP to the current insn.
* First shot at S flag single-stepping.
* Make it easier to use the local disasm.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5445 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 22:48:41 +00:00
edgar_igl
980f8a0b39 CRIS: Mask off the cache selection bit after MMU translations.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5170 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 17:17:55 +00:00
edgar_igl
7d5099d5a4 CRIS: Remove redundant code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5145 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 14:30:27 +00:00
edgar_igl
1b1a38b0aa CRIS: Emulate NMIs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4719 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 23:18:06 +00:00
edgar_igl
30abcfc7ba CRIS: Restructure the translator to allow for better code generation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4594 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 21:10:56 +00:00
edgar_igl
cf1d97f074 CRIS: Improve TLB management and handle delayslots at page boundaries.
* Dont flush the entire qemu tlb when the $pid changes. Instead we go through
  the guests TLB and choose entries that need to be flushed.
* Add env->dslot and handle delayslots at pageboundaries.
* Remove some unused code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4450 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13 10:59:14 +00:00
edgar_igl
ef29a70d18 CRIS MMU Updates
* Add support for exec faults and for the k protection bit.
* Abort if search_pc causes recursive mmu faults.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4349 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-06 08:04:40 +00:00
edgar_igl
b41f7df018 CRIS updates:
* Support both the I and D MMUs and improve the accuracy of the MMU model.
* Handle the automatic user/kernel stack pointer switching when leaving or entering user mode.
* Move the CCS evaluation into helper funcs.
* Make sure user-mode cannot change flags only writeable in kernel mode.
* More conversion of the translator into TCG.
* Handle exceptions while in a delayslot.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-02 22:16:17 +00:00
edgar_igl
e62b5b133b * Add a model of the ETRAX interrupt controller.
* Clean up the interrupt handling a bit.
* Connect some NOR flash to the test board.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 01:04:24 +00:00
edgar_igl
bbaf29c769 * target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.
* target-cris/helper.c: Update ERP for user-mode simulation aswell.
* hw/etraxfs_timer.c: Support multiple timers.
* hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4004 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-01 17:25:33 +00:00
edgar_igl
9004627f9b More consistent naming for CRIS register-number macros.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-28 08:28:32 +00:00
ths
941db52871 Use the shiny new clz helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3464 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 01:44:40 +00:00
j_mayer
6ebbf39000 Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
ths
81fdc5f8d2 The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08 13:04:02 +00:00