cris: Fix NMI-flag handling on crisv10.
- The M-flag is encoded in different bits on cris v10 and cris v32. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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17
cpu-exec.c
17
cpu-exec.c
@ -467,11 +467,18 @@ int cpu_exec(CPUArchState *env)
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do_interrupt(env);
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next_tb = 0;
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}
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if (interrupt_request & CPU_INTERRUPT_NMI
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&& (env->pregs[PR_CCS] & M_FLAG)) {
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env->exception_index = EXCP_NMI;
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do_interrupt(env);
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next_tb = 0;
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if (interrupt_request & CPU_INTERRUPT_NMI) {
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unsigned int m_flag_archval;
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if (env->pregs[PR_VR] < 32) {
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m_flag_archval = M_FLAG_V10;
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} else {
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m_flag_archval = M_FLAG_V32;
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}
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if ((env->pregs[PR_CCS] & m_flag_archval)) {
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env->exception_index = EXCP_NMI;
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do_interrupt(env);
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next_tb = 0;
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}
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}
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#elif defined(TARGET_M68K)
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if (interrupt_request & CPU_INTERRUPT_HARD
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@ -69,13 +69,14 @@
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/* CPU flags. */
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#define Q_FLAG 0x80000000
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#define M_FLAG 0x40000000
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#define M_FLAG_V32 0x40000000
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#define PFIX_FLAG 0x800 /* CRISv10 Only. */
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#define F_FLAG_V10 0x400
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#define P_FLAG_V10 0x200
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#define S_FLAG 0x200
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#define R_FLAG 0x100
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#define P_FLAG 0x80
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#define M_FLAG_V10 0x80
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#define U_FLAG 0x40
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#define I_FLAG 0x20
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#define X_FLAG 0x10
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@ -127,7 +127,7 @@ static void do_interruptv10(CPUCRISState *env)
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case EXCP_NMI:
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/* NMI is hardwired to vector zero. */
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ex_vec = 0;
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env->pregs[PR_CCS] &= ~M_FLAG;
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env->pregs[PR_CCS] &= ~M_FLAG_V10;
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env->pregs[PRV10_BRP] = env->pc;
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break;
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@ -185,7 +185,7 @@ void do_interrupt(CPUCRISState *env)
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case EXCP_NMI:
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/* NMI is hardwired to vector zero. */
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ex_vec = 0;
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env->pregs[PR_CCS] &= ~M_FLAG;
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env->pregs[PR_CCS] &= ~M_FLAG_V32;
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env->pregs[PR_NRP] = env->pc;
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break;
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@ -247,8 +247,8 @@ void helper_rfn(void)
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if (!rflag)
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env->pregs[PR_CCS] |= P_FLAG;
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/* Always set the M flag. */
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env->pregs[PR_CCS] |= M_FLAG;
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/* Always set the M flag. */
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env->pregs[PR_CCS] |= M_FLAG_V32;
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}
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uint32_t helper_lz(uint32_t t0)
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