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Remove cpu_get_phys_page_debug from userspace emulation

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cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <paul@codesourcery.com>
This commit is contained in:
Paul Brook 2010-03-01 03:46:18 +00:00
parent b3755a915e
commit 4fcc562bff
12 changed files with 16 additions and 64 deletions
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10
cpu-all.h
View File

@ -820,11 +820,6 @@ void cpu_watchpoint_remove_all(CPUState *env, int mask);
void cpu_single_step(CPUState *env, int enabled);
void cpu_reset(CPUState *s);
/* Return the physical page corresponding to a virtual one. Use it
only for debugging because no protection checks are done. Return -1
if no page found. */
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
#define CPU_LOG_TB_OUT_ASM (1 << 0)
#define CPU_LOG_TB_IN_ASM (1 << 1)
#define CPU_LOG_TB_OP (1 << 2)
@ -851,6 +846,11 @@ int cpu_str_to_log_mask(const char *str);
#if !defined(CONFIG_USER_ONLY)
/* Return the physical page corresponding to a virtual one. Use it
only for debugging because no protection checks are done. Return -1
if no page found. */
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr);
/* memory API */
extern int phys_ram_fd;

5
target-alpha/helper.c
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@ -173,11 +173,6 @@ int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr)
{
return addr;
}
void do_interrupt (CPUState *env)
{
env->exception_index = -1;

5
target-arm/helper.c
View File

@ -483,11 +483,6 @@ int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
return addr;
}
/* These should probably raise undefined insn exceptions. */
void HELPER(set_cp)(CPUState *env, uint32_t insn, uint32_t val)
{

5
target-cris/helper.c
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@ -56,11 +56,6 @@ int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
{
return addr;
}
#else /* !CONFIG_USER_ONLY */

5
target-i386/helper.c
View File

@ -1386,11 +1386,6 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
return addr;
}
#else
/* XXX: This value should match the one returned by CPUID

16
target-m68k/helper.c
View File

@ -342,14 +342,6 @@ void m68k_switch_sp(CPUM68KState *env)
env->current_sp = new_sp;
}
/* MMU */
/* TODO: This will need fixing once the MMU is implemented. */
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
return addr;
}
#if defined(CONFIG_USER_ONLY)
int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
@ -362,6 +354,14 @@ int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
#else
/* MMU */
/* TODO: This will need fixing once the MMU is implemented. */
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
return addr;
}
int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int mmu_idx, int is_softmmu)
{

5
target-microblaze/helper.c
View File

@ -45,11 +45,6 @@ int cpu_mb_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
{
return addr;
}
#else /* !CONFIG_USER_ONLY */
int cpu_mb_handle_mmu_fault (CPUState *env, target_ulong address, int rw,

6
target-mips/helper.c
View File

@ -253,19 +253,17 @@ static void raise_mmu_exception(CPUState *env, target_ulong address,
env->error_code = error_code;
}
#if !defined(CONFIG_USER_ONLY)
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
#if defined(CONFIG_USER_ONLY)
return addr;
#else
target_phys_addr_t phys_addr;
int prot;
if (get_physical_address(env, &phys_addr, &prot, addr, 0, ACCESS_INT) != 0)
return -1;
return phys_addr;
#endif
}
#endif
int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int mmu_idx, int is_softmmu)

5
target-ppc/helper.c
View File

@ -97,11 +97,6 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr)
{
return addr;
}
#else
/* Common routines used by software and hardware TLBs emulation */
static inline int pte_is_valid(target_ulong pte0)

5
target-s390x/helper.c
View File

@ -46,11 +46,6 @@ CPUS390XState *cpu_s390x_init(const char *cpu_model)
return env;
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
return addr;
}
void cpu_reset(CPUS390XState *env)
{
if (qemu_loglevel_mask(CPU_LOG_RESET)) {

5
target-sh4/helper.c
View File

@ -53,11 +53,6 @@ int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
return 1;
}
target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
{
return addr;
}
int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
{
/* For user mode, only U0 area is cachable. */

8
target-sparc/helper.c
View File

@ -652,13 +652,7 @@ void dump_mmu(CPUState *env)
#endif /* !CONFIG_USER_ONLY */
#if defined(CONFIG_USER_ONLY)
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
return addr;
}
#else
#if !defined(CONFIG_USER_ONLY)
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
target_phys_addr_t phys_addr;