2012-04-12 04:17:53 +04:00
|
|
|
/*
|
|
|
|
* QEMU MicroBlaze CPU
|
|
|
|
*
|
2012-04-12 04:26:28 +04:00
|
|
|
* Copyright (c) 2009 Edgar E. Iglesias
|
|
|
|
* Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd.
|
2012-04-12 04:17:53 +04:00
|
|
|
* Copyright (c) 2012 SUSE LINUX Products GmbH
|
2014-01-13 07:35:26 +04:00
|
|
|
* Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
|
2012-04-12 04:17:53 +04:00
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2.1 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
|
|
* License along with this library; if not, see
|
|
|
|
* <http://www.gnu.org/licenses/lgpl-2.1.html>
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "cpu.h"
|
|
|
|
#include "qemu-common.h"
|
2013-04-23 16:27:09 +04:00
|
|
|
#include "hw/qdev-properties.h"
|
2013-01-20 22:03:32 +04:00
|
|
|
#include "migration/vmstate.h"
|
2012-04-12 04:17:53 +04:00
|
|
|
|
2015-06-19 07:16:38 +03:00
|
|
|
static const struct {
|
|
|
|
const char *name;
|
|
|
|
uint8_t version_id;
|
|
|
|
} mb_cpu_lookup[] = {
|
|
|
|
/* These key value are as per MBV field in PVR0 */
|
|
|
|
{"5.00.a", 0x01},
|
|
|
|
{"5.00.b", 0x02},
|
|
|
|
{"5.00.c", 0x03},
|
|
|
|
{"6.00.a", 0x04},
|
|
|
|
{"6.00.b", 0x06},
|
|
|
|
{"7.00.a", 0x05},
|
|
|
|
{"7.00.b", 0x07},
|
|
|
|
{"7.10.a", 0x08},
|
|
|
|
{"7.10.b", 0x09},
|
|
|
|
{"7.10.c", 0x0a},
|
|
|
|
{"7.10.d", 0x0b},
|
|
|
|
{"7.20.a", 0x0c},
|
|
|
|
{"7.20.b", 0x0d},
|
|
|
|
{"7.20.c", 0x0e},
|
|
|
|
{"7.20.d", 0x0f},
|
|
|
|
{"7.30.a", 0x10},
|
|
|
|
{"7.30.b", 0x11},
|
|
|
|
{"8.00.a", 0x12},
|
|
|
|
{"8.00.b", 0x13},
|
|
|
|
{"8.10.a", 0x14},
|
|
|
|
{"8.20.a", 0x15},
|
|
|
|
{"8.20.b", 0x16},
|
|
|
|
{"8.30.a", 0x17},
|
|
|
|
{"8.40.a", 0x18},
|
|
|
|
{"8.40.b", 0x19},
|
|
|
|
{"8.50.a", 0x1A},
|
|
|
|
{"9.0", 0x1B},
|
|
|
|
{"9.1", 0x1D},
|
|
|
|
{"9.2", 0x1F},
|
|
|
|
{"9.3", 0x20},
|
|
|
|
{NULL, 0},
|
|
|
|
};
|
2012-04-12 04:17:53 +04:00
|
|
|
|
2013-06-21 21:09:18 +04:00
|
|
|
static void mb_cpu_set_pc(CPUState *cs, vaddr value)
|
|
|
|
{
|
|
|
|
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
|
|
|
|
|
|
|
|
cpu->env.sregs[SR_PC] = value;
|
|
|
|
}
|
|
|
|
|
2013-08-25 20:53:55 +04:00
|
|
|
static bool mb_cpu_has_work(CPUState *cs)
|
|
|
|
{
|
|
|
|
return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
|
|
|
|
}
|
|
|
|
|
2014-01-13 07:35:26 +04:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
static void microblaze_cpu_set_irq(void *opaque, int irq, int level)
|
|
|
|
{
|
|
|
|
MicroBlazeCPU *cpu = opaque;
|
|
|
|
CPUState *cs = CPU(cpu);
|
|
|
|
int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
|
|
|
|
|
|
|
|
if (level) {
|
|
|
|
cpu_interrupt(cs, type);
|
|
|
|
} else {
|
|
|
|
cpu_reset_interrupt(cs, type);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-04-12 04:17:53 +04:00
|
|
|
/* CPUClass::reset() */
|
|
|
|
static void mb_cpu_reset(CPUState *s)
|
|
|
|
{
|
|
|
|
MicroBlazeCPU *cpu = MICROBLAZE_CPU(s);
|
|
|
|
MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(cpu);
|
|
|
|
CPUMBState *env = &cpu->env;
|
|
|
|
|
|
|
|
mcc->parent_reset(s);
|
|
|
|
|
2015-05-29 09:30:05 +03:00
|
|
|
memset(env, 0, offsetof(CPUMBState, pvr));
|
2012-06-01 07:23:28 +04:00
|
|
|
env->res_addr = RES_ADDR_NONE;
|
2013-09-04 04:19:44 +04:00
|
|
|
tlb_flush(s, 1);
|
2012-04-12 04:26:28 +04:00
|
|
|
|
|
|
|
/* Disable stack protector. */
|
|
|
|
env->shr = ~0;
|
|
|
|
|
2015-07-23 18:13:56 +03:00
|
|
|
env->sregs[SR_PC] = cpu->cfg.base_vectors;
|
|
|
|
|
2015-05-29 09:30:05 +03:00
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
/* start in user mode with interrupts enabled. */
|
|
|
|
env->sregs[SR_MSR] = MSR_EE | MSR_IE | MSR_VM | MSR_UM;
|
|
|
|
#else
|
|
|
|
env->sregs[SR_MSR] = 0;
|
|
|
|
mmu_init(&env->mmu);
|
|
|
|
env->mmu.c_mmu = 3;
|
|
|
|
env->mmu.c_mmu_tlb_access = 3;
|
|
|
|
env->mmu.c_mmu_zones = 16;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2015-06-24 06:57:36 +03:00
|
|
|
static void mb_disas_set_info(CPUState *cpu, disassemble_info *info)
|
|
|
|
{
|
|
|
|
info->mach = bfd_arch_microblaze;
|
|
|
|
info->print_insn = print_insn_microblaze;
|
|
|
|
}
|
|
|
|
|
2015-05-29 09:30:05 +03:00
|
|
|
static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
CPUState *cs = CPU(dev);
|
|
|
|
MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev);
|
|
|
|
MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
|
|
|
|
CPUMBState *env = &cpu->env;
|
2015-06-19 07:16:38 +03:00
|
|
|
uint8_t version_code = 0;
|
|
|
|
int i = 0;
|
2015-05-29 09:30:05 +03:00
|
|
|
|
|
|
|
qemu_init_vcpu(cs);
|
|
|
|
|
2015-06-19 07:16:42 +03:00
|
|
|
env->pvr.regs[0] = PVR0_USE_BARREL_MASK \
|
2012-04-12 04:26:28 +04:00
|
|
|
| PVR0_USE_DIV_MASK \
|
|
|
|
| PVR0_USE_HW_MUL_MASK \
|
|
|
|
| PVR0_USE_EXC_MASK \
|
|
|
|
| PVR0_USE_ICACHE_MASK \
|
|
|
|
| PVR0_USE_DCACHE_MASK \
|
|
|
|
| (0xb << 8);
|
|
|
|
env->pvr.regs[2] = PVR2_D_OPB_MASK \
|
|
|
|
| PVR2_D_LMB_MASK \
|
|
|
|
| PVR2_I_OPB_MASK \
|
|
|
|
| PVR2_I_LMB_MASK \
|
|
|
|
| PVR2_USE_MSR_INSTR \
|
|
|
|
| PVR2_USE_PCMP_INSTR \
|
|
|
|
| PVR2_USE_BARREL_MASK \
|
|
|
|
| PVR2_USE_DIV_MASK \
|
|
|
|
| PVR2_USE_HW_MUL_MASK \
|
|
|
|
| PVR2_USE_MUL64_MASK \
|
|
|
|
| PVR2_FPU_EXC_MASK \
|
|
|
|
| 0;
|
2015-05-29 09:30:43 +03:00
|
|
|
|
2015-06-19 07:16:38 +03:00
|
|
|
for (i = 0; mb_cpu_lookup[i].name && cpu->cfg.version; i++) {
|
|
|
|
if (strcmp(mb_cpu_lookup[i].name, cpu->cfg.version) == 0) {
|
|
|
|
version_code = mb_cpu_lookup[i].version_id;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!version_code) {
|
|
|
|
qemu_log("Invalid MicroBlaze version number: %s\n", cpu->cfg.version);
|
|
|
|
}
|
|
|
|
|
2015-05-29 09:31:58 +03:00
|
|
|
env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) |
|
2015-06-19 07:16:29 +03:00
|
|
|
(cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) |
|
2015-06-19 07:16:35 +03:00
|
|
|
(cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) |
|
2015-06-19 07:16:38 +03:00
|
|
|
(cpu->cfg.endi ? PVR0_ENDI_MASK : 0) |
|
2015-06-19 07:16:42 +03:00
|
|
|
(version_code << 16) |
|
|
|
|
(cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0);
|
2015-05-29 09:31:58 +03:00
|
|
|
|
2015-06-19 07:16:25 +03:00
|
|
|
env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |
|
|
|
|
(cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0);
|
2015-05-29 09:30:43 +03:00
|
|
|
|
2015-06-19 07:16:32 +03:00
|
|
|
env->pvr.regs[5] |= cpu->cfg.dcache_writeback ?
|
|
|
|
PVR5_DCACHE_WRITEBACK_MASK : 0;
|
|
|
|
|
2012-04-12 04:26:28 +04:00
|
|
|
env->pvr.regs[10] = 0x0c000000; /* Default to spartan 3a dsp family. */
|
|
|
|
env->pvr.regs[11] = PVR11_USE_MMU | (16 << 17);
|
|
|
|
|
2013-01-05 18:27:31 +04:00
|
|
|
mcc->parent_realize(dev, errp);
|
|
|
|
}
|
|
|
|
|
2012-04-12 04:34:40 +04:00
|
|
|
static void mb_cpu_initfn(Object *obj)
|
|
|
|
{
|
2013-01-17 15:13:41 +04:00
|
|
|
CPUState *cs = CPU(obj);
|
2012-04-12 04:34:40 +04:00
|
|
|
MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj);
|
|
|
|
CPUMBState *env = &cpu->env;
|
2013-01-20 04:10:52 +04:00
|
|
|
static bool tcg_initialized;
|
2012-04-12 04:34:40 +04:00
|
|
|
|
2013-01-17 15:13:41 +04:00
|
|
|
cs->env_ptr = env;
|
2015-06-24 05:31:18 +03:00
|
|
|
cpu_exec_init(cs, &error_abort);
|
2012-04-12 04:34:40 +04:00
|
|
|
|
|
|
|
set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
|
2013-01-20 04:10:52 +04:00
|
|
|
|
2014-01-13 07:35:26 +04:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
/* Inbound IRQ and FIR lines */
|
|
|
|
qdev_init_gpio_in(DEVICE(cpu), microblaze_cpu_set_irq, 2);
|
|
|
|
#endif
|
|
|
|
|
2013-01-20 04:10:52 +04:00
|
|
|
if (tcg_enabled() && !tcg_initialized) {
|
|
|
|
tcg_initialized = true;
|
|
|
|
mb_tcg_init();
|
|
|
|
}
|
2012-04-12 04:34:40 +04:00
|
|
|
}
|
|
|
|
|
2013-01-20 22:03:32 +04:00
|
|
|
static const VMStateDescription vmstate_mb_cpu = {
|
|
|
|
.name = "cpu",
|
|
|
|
.unmigratable = 1,
|
|
|
|
};
|
|
|
|
|
2013-04-23 16:27:09 +04:00
|
|
|
static Property mb_properties[] = {
|
2015-05-29 09:31:20 +03:00
|
|
|
DEFINE_PROP_UINT32("base-vectors", MicroBlazeCPU, cfg.base_vectors, 0),
|
2015-05-29 09:30:43 +03:00
|
|
|
DEFINE_PROP_BOOL("use-stack-protection", MicroBlazeCPU, cfg.stackprot,
|
2015-05-29 09:32:35 +03:00
|
|
|
false),
|
2015-05-29 09:31:58 +03:00
|
|
|
/* If use-fpu > 0 - FPU is enabled
|
|
|
|
* If use-fpu = 2 - Floating point conversion and square root instructions
|
|
|
|
* are enabled
|
|
|
|
*/
|
2015-06-19 07:16:25 +03:00
|
|
|
DEFINE_PROP_UINT8("use-fpu", MicroBlazeCPU, cfg.use_fpu, 2),
|
2015-06-19 07:16:29 +03:00
|
|
|
DEFINE_PROP_BOOL("use-mmu", MicroBlazeCPU, cfg.use_mmu, true),
|
2015-06-19 07:16:32 +03:00
|
|
|
DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
|
|
|
|
false),
|
2015-06-19 07:16:35 +03:00
|
|
|
DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
|
2015-06-19 07:16:38 +03:00
|
|
|
DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
|
2015-06-19 07:16:42 +03:00
|
|
|
DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
|
2013-04-23 16:27:09 +04:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
2012-04-12 04:17:53 +04:00
|
|
|
static void mb_cpu_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
2013-01-20 22:03:32 +04:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
2012-04-12 04:17:53 +04:00
|
|
|
CPUClass *cc = CPU_CLASS(oc);
|
|
|
|
MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_CLASS(oc);
|
|
|
|
|
2013-01-05 18:27:31 +04:00
|
|
|
mcc->parent_realize = dc->realize;
|
|
|
|
dc->realize = mb_cpu_realizefn;
|
|
|
|
|
2012-04-12 04:17:53 +04:00
|
|
|
mcc->parent_reset = cc->reset;
|
|
|
|
cc->reset = mb_cpu_reset;
|
2013-01-20 22:03:32 +04:00
|
|
|
|
2013-08-25 20:53:55 +04:00
|
|
|
cc->has_work = mb_cpu_has_work;
|
2013-02-02 13:57:51 +04:00
|
|
|
cc->do_interrupt = mb_cpu_do_interrupt;
|
2014-09-13 20:45:30 +04:00
|
|
|
cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
|
2013-05-27 03:33:50 +04:00
|
|
|
cc->dump_state = mb_cpu_dump_state;
|
2013-06-21 21:09:18 +04:00
|
|
|
cc->set_pc = mb_cpu_set_pc;
|
2013-06-29 06:18:45 +04:00
|
|
|
cc->gdb_read_register = mb_cpu_gdb_read_register;
|
|
|
|
cc->gdb_write_register = mb_cpu_gdb_write_register;
|
2013-08-26 05:01:33 +04:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
cc->handle_mmu_fault = mb_cpu_handle_mmu_fault;
|
|
|
|
#else
|
2013-06-29 20:55:54 +04:00
|
|
|
cc->do_unassigned_access = mb_cpu_unassigned_access;
|
|
|
|
cc->get_phys_page_debug = mb_cpu_get_phys_page_debug;
|
|
|
|
#endif
|
2013-01-20 22:03:32 +04:00
|
|
|
dc->vmsd = &vmstate_mb_cpu;
|
2013-04-23 16:27:09 +04:00
|
|
|
dc->props = mb_properties;
|
2013-06-29 01:18:47 +04:00
|
|
|
cc->gdb_num_core_regs = 32 + 5;
|
2015-06-24 06:57:36 +03:00
|
|
|
|
|
|
|
cc->disas_set_info = mb_disas_set_info;
|
qdev: Protect device-list-properties against broken devices
Several devices don't survive object_unref(object_new(T)): they crash
or hang during cleanup, or they leave dangling pointers behind.
This breaks at least device-list-properties, because
qmp_device_list_properties() needs to create a device to find its
properties. Broken in commit f4eb32b "qmp: show QOM properties in
device-list-properties", v2.1. Example reproducer:
$ qemu-system-aarch64 -nodefaults -display none -machine none -S -qmp stdio
{"QMP": {"version": {"qemu": {"micro": 50, "minor": 4, "major": 2}, "package": ""}, "capabilities": []}}
{ "execute": "qmp_capabilities" }
{"return": {}}
{ "execute": "device-list-properties", "arguments": { "typename": "pxa2xx-pcmcia" } }
qemu-system-aarch64: /home/armbru/work/qemu/memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed.
Aborted (core dumped)
[Exit 134 (SIGABRT)]
Unfortunately, I can't fix the problems in these devices right now.
Instead, add DeviceClass member cannot_destroy_with_object_finalize_yet
to mark them:
* Hang during cleanup (didn't debug, so I can't say why):
"realview_pci", "versatile_pci".
* Dangling pointer in cpus: most CPUs, plus "allwinner-a10", "digic",
"fsl,imx25", "fsl,imx31", "xlnx,zynqmp", because they create such
CPUs
* Assert kvm_enabled(): "host-x86_64-cpu", host-i386-cpu",
"host-powerpc64-cpu", "host-embedded-powerpc-cpu",
"host-powerpc-cpu" (the powerpc ones can't currently reach the
assertion, because the CPUs are only registered when KVM is enabled,
but the assertion is arguably in the wrong place all the same)
Make qmp_device_list_properties() fail cleanly when the device is so
marked. This improves device-list-properties from "crashes, hangs or
leaves dangling pointers behind" to "fails". Not a complete fix, just
a better-than-nothing work-around. In the above reproducer,
device-list-properties now fails with "Can't list properties of device
'pxa2xx-pcmcia'".
This also protects -device FOO,help, which uses the same machinery
since commit ef52358 "qdev-monitor: include QOM properties in -device
FOO, help output", v2.2. Example reproducer:
$ qemu-system-aarch64 -machine none -device pxa2xx-pcmcia,help
Before:
qemu-system-aarch64: .../memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed.
After:
Can't list properties of device 'pxa2xx-pcmcia'
Cc: "Andreas Färber" <afaerber@suse.de>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Anthony Green <green@moxielogic.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Jia Liu <proljc@gmail.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>
Cc: qemu-ppc@nongnu.org
Cc: qemu-stable@nongnu.org
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <1443689999-12182-10-git-send-email-armbru@redhat.com>
2015-10-01 11:59:58 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Reason: mb_cpu_initfn() calls cpu_exec_init(), which saves the
|
|
|
|
* object in cpus -> dangling pointer after final object_unref().
|
|
|
|
*/
|
|
|
|
dc->cannot_destroy_with_object_finalize_yet = true;
|
2012-04-12 04:17:53 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo mb_cpu_type_info = {
|
|
|
|
.name = TYPE_MICROBLAZE_CPU,
|
|
|
|
.parent = TYPE_CPU,
|
|
|
|
.instance_size = sizeof(MicroBlazeCPU),
|
2012-04-12 04:34:40 +04:00
|
|
|
.instance_init = mb_cpu_initfn,
|
2012-04-12 04:17:53 +04:00
|
|
|
.class_size = sizeof(MicroBlazeCPUClass),
|
|
|
|
.class_init = mb_cpu_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void mb_cpu_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&mb_cpu_type_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(mb_cpu_register_types)
|