Stanislav Shwartsman
a220edc5bb
compile fixes
2010-03-26 11:09:12 +00:00
Stanislav Shwartsman
f5ce2a7639
split crreg access functions to separate file
2010-03-25 21:33:07 +00:00
Stanislav Shwartsman
5b6a14656d
Make XSAVE as runtime option
2010-02-26 22:53:43 +00:00
Stanislav Shwartsman
033a20b3b2
allow to configure CPU features at runtime - implemened on example of SSE/AES/MOVBE/POPCNT
2010-02-25 22:04:31 +00:00
Stanislav Shwartsman
6d71bdb785
cleanups and optimizations
2009-11-02 15:00:47 +00:00
Stanislav Shwartsman
7254ea36a1
copyright fixes + small optimization
2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8a95120e12
deprecate --enable-vme option, now it will be supported iff CPU_LEVEL >= 5 (like in real life)
2009-08-10 15:44:50 +00:00
Stanislav Shwartsman
f8185a6bc6
Added Intel VMX emulation to Bochs CPU
2009-01-31 10:43:24 +00:00
Stanislav Shwartsman
9929e6ed78
- updated FSF address
2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
6451356d2b
make function to calculate allowed bits in cr4
2009-01-10 10:37:23 +00:00
Stanislav Shwartsman
87396f051a
msr phy addr check use new function
2009-01-02 13:23:06 +00:00
Stanislav Shwartsman
e182e74a4d
Added ability to define user MSRs spec for emulated CPU
2008-12-28 20:30:48 +00:00
Stanislav Shwartsman
f9ce1171fe
rename crreg accessors
2008-12-06 10:21:55 +00:00
Stanislav Shwartsman
b3bbf8ded2
define generic MSR
2008-12-05 13:10:51 +00:00
Stanislav Shwartsman
892fa99c6f
- prefetch hint should be NOP when use in register mode
...
- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
e91409704f
Convert EFER to val32 register, similar to other control registers
2008-03-31 20:56:27 +00:00
Stanislav Shwartsman
b929a2b2b8
Fixed minor issues - compilation and not only
2008-02-13 17:06:44 +00:00
Stanislav Shwartsman
457152334e
step2 in XSAVE implementation
2008-02-13 16:45:21 +00:00
Stanislav Shwartsman
8615022962
Added first stubs for XSAVE/XRESTOR implementation
...
Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
83f6eb6945
Changes copyrights for the files I wrote :)
...
Also split EqId G1 group for x86-64
2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
f69a21ab2b
Fix some copyright messages
2007-10-15 22:07:52 +00:00
Stanislav Shwartsman
8adbbcf17c
Started first implementation of MONITOR/MWAIT
2007-10-11 21:29:01 +00:00
Stanislav Shwartsman
b4df87c9b0
Added CVS id
2007-09-10 16:04:41 +00:00
Stanislav Shwartsman
412eeeeb7c
Get crregs definition to separate file from cpu.h
2007-09-10 16:00:15 +00:00
