Stanislav Shwartsman
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d766cc8112
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implemented SCA (Side-Channel-Attack) Prevention reporting and corresponding MSR registers, enabled for Icelake-U CPU definition
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2019-10-26 20:09:30 +00:00 |
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Stanislav Shwartsman
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a580b0ccbe
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cosmetic change with no logic affected
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2019-10-24 20:33:05 +00:00 |
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Stanislav Shwartsman
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c97bb62b6c
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VMX: Fix RDRAND/RDSEED VMEXIT Instruction-Information Field
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2019-10-24 20:12:00 +00:00 |
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Stanislav Shwartsman
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330c691367
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VMX: Fix RDRAND/RDSEED VMEXIT Instruction-Information Field
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2019-10-24 20:10:56 +00:00 |
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Stanislav Shwartsman
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27e23ad1eb
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give priority for VMX induced #UD in INVPCID and RDTSCP instructions over all other exeptions that could be generated there
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2019-10-24 19:49:25 +00:00 |
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Stanislav Shwartsman
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72b9d26717
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coding style changes, tab2space, macro2function or macro2const
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2019-10-17 19:23:27 +00:00 |
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Stanislav Shwartsman
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eec720c62b
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convert bochs.h macros to inline functions with strong types
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2019-10-16 20:46:00 +00:00 |
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Stanislav Shwartsman
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64ae3fe1ba
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convert bochs.h macros to inline functions with strong types
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2019-10-16 20:19:34 +00:00 |
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Stanislav Shwartsman
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bb5ccc97c1
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remove unused function parameter
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2019-10-16 19:53:04 +00:00 |
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Stanislav Shwartsman
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9c61e9e9f5
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remove unused function parameter
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2019-10-16 19:48:21 +00:00 |
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Stanislav Shwartsman
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10c23b5d39
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implement fasstring for 64-bit mode as well
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2019-10-14 19:50:47 +00:00 |
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Stanislav Shwartsman
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9d7233a9b5
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fixed code duplication in fast string invocaion code
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2019-10-14 19:15:01 +00:00 |
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Stanislav Shwartsman
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bf16e720f8
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add faststring mode for REP MOVSW in 32-bit mode
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2019-10-14 18:12:37 +00:00 |
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Stanislav Shwartsman
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fe7acbb6a0
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more faststring cleanup
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2019-10-14 14:54:07 +00:00 |
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Stanislav Shwartsman
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ee3f1b91a3
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allow fast string only for forward strings and simplify the code
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2019-10-14 14:45:01 +00:00 |
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Stanislav Shwartsman
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f0245b5f2b
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introduce special handlers for zero-idiom instructions - ~1% speedup to simulation. infra for fast string emulation in 64-bit mode
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2019-10-14 06:40:19 +00:00 |
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Stanislav Shwartsman
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d6e08702e4
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add Icelake-U model to CPUDB database. TODO: verify its VMX features
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2019-09-24 20:26:14 +00:00 |
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Stanislav Shwartsman
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4f0094c472
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update CHANGES
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2019-08-09 19:59:00 +00:00 |
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Stanislav Shwartsman
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2ae332cce8
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patch by Luigu.B - significantly speedup multi-threaded guest simulation
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2019-08-09 19:57:13 +00:00 |
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Stanislav Shwartsman
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2eb47f866f
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added minor clarifications based on most recent AMD SDM published
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2019-07-30 18:17:21 +00:00 |
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Stanislav Shwartsman
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49ebaf8397
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typofix: attached MASK_K0 attr to wrong opcode
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2019-05-25 19:10:55 +00:00 |
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Stanislav Shwartsman
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bc4af1b08d
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add missing break statement in disasm.cc
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2019-05-25 19:08:39 +00:00 |
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Stanislav Shwartsman
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4d10852c04
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impemented recently published VP2INTERSECTD/Q instructions
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2019-05-25 19:07:09 +00:00 |
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Stanislav Shwartsman
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85780d939a
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extract MONITOR/MWAIT stuff to separate trsnlation unit
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2019-05-25 18:32:17 +00:00 |
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Stanislav Shwartsman
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55d2dc6b0c
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add some CPUID and VMCS definitions from latest SDM
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2019-05-22 18:22:22 +00:00 |
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Stanislav Shwartsman
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0c28705b18
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fixed compilation under MAC env
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2019-05-18 04:50:07 +00:00 |
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Volker Ruppert
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64f3339c8d
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Added ATAPI command "get event status notification" (patch by Ben Lunt).
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2019-04-22 18:54:04 +00:00 |
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Volker Ruppert
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dbf7da542f
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Check if Xrandr extension is present.
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2019-04-21 20:08:32 +00:00 |
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Stanislav Shwartsman
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662b252507
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added missing endif
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2019-04-17 16:04:34 +00:00 |
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Stanislav Shwartsman
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a022d71774
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fixed compilation
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2019-04-14 04:05:04 +00:00 |
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Stanislav Shwartsman
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54bdb24e4b
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remove MOVDIRI opcode extension for now until fugured out how nicely do MOVDIR64B, they better to be both done with same CPUID feature name
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2019-02-22 19:15:53 +00:00 |
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Stanislav Shwartsman
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3e007fbdea
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fixed copy-pasted issue with decoding
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2019-02-17 21:54:38 +00:00 |
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Stanislav Shwartsman
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c3f7a34cf5
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fixed copy-pasted issue with decoding
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2019-02-17 21:41:45 +00:00 |
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Stanislav Shwartsman
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3da93728b3
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split some opcode reference tables in new decoder between x86-64 and 32 for better perf
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2019-02-17 21:22:54 +00:00 |
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Stanislav Shwartsman
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cd79d22113
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fixes for 32-bit mode only compilation
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2019-02-16 19:42:04 +00:00 |
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Stanislav Shwartsman
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bfd7bb2c13
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remove redundant VL512 runtime check, redundant with new decoder
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2019-02-16 19:25:32 +00:00 |
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Stanislav Shwartsman
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4f625b23e0
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enable yet another Bochs new decoder. It is a bit slower than old one but it is much more extendable so adding new opcode won't be nightmare anymore
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2019-02-16 15:23:24 +00:00 |
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Stanislav Shwartsman
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93146256f8
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disasm updates
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2019-02-08 16:28:51 +00:00 |
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Stanislav Shwartsman
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4c18ee784f
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disasm updates
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2019-02-08 16:26:56 +00:00 |
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Stanislav Shwartsman
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61dcc4ace7
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remove unreferenced decode table
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2019-01-29 13:44:39 +00:00 |
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Stanislav Shwartsman
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f8ec18acd5
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fix decode/disasm of AVX512-VBMI2 VPSH*D* opcodes
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2019-01-27 18:52:03 +00:00 |
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Stanislav Shwartsman
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0b18a42e4e
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fixed decoding of AVX-512 opcodes
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2019-01-27 17:35:21 +00:00 |
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Stanislav Shwartsman
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5cb4639891
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fixed decoding of AVX-512 opcodes
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2019-01-27 17:31:28 +00:00 |
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Stanislav Shwartsman
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6dc5cfe80b
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fixed typo in opcode name
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2019-01-24 20:10:46 +00:00 |
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Stanislav Shwartsman
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af75c2a81e
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fixed comment in the opcode table for EVEX
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2019-01-22 18:31:39 +00:00 |
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Stanislav Shwartsman
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9bc7faf493
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dump all supported CPU fetures into Bochs log from CPUID object
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2019-01-05 20:17:39 +00:00 |
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Stanislav Shwartsman
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264b797363
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fixed compilation without VMX=2
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2019-01-03 06:28:15 +00:00 |
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Stanislav Shwartsman
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df3ea7b553
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fix ambiguous delete[] not matching new
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2019-01-02 17:13:36 +00:00 |
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Volker Ruppert
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b9aa0de299
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Fixed IRQ logic in edge-triggered mode (found in patch by Oleg)
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2018-12-03 21:56:23 +00:00 |
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Stanislav Shwartsman
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098791bf95
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report MONITOR/MWAITX for Ryzen configuration in CPUID
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2018-12-01 12:15:57 +00:00 |
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