mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
8,421 Commits 11 Branches 185 Tags 48 MiB
c676875421
Commit Graph

2186 Commits

Author SHA1 Message Date
Stanislav Shwartsman
c676875421 vmcs read/write check 2010-11-12 20:26:01 +00:00
Stanislav Shwartsman
e6981218dc next step for fully configurable CPU + more optimal VMX execution 
- check at startup time which VMX fields are accessible
- next step: simplify VMREAD and VMWRITE instructions - eliminate switch statements
 2010-11-11 21:41:03 +00:00
Stanislav Shwartsman
a6d2047f4d dos2unix 2010-11-11 17:09:13 +00:00
Stanislav Shwartsman
93cc615a40 moved vmcs stuff to separate file 2010-11-11 16:25:45 +00:00
Stanislav Shwartsman
49c85b07f6 Fixed address size wrap 2010-10-18 22:19:45 +00:00
Stanislav Shwartsman
5ea2591cd9 fixes 2010-10-07 20:40:01 +00:00
Stanislav Shwartsman
13e2b6eba1 added new file 2010-10-07 16:40:00 +00:00
Stanislav Shwartsman
6d089dd238 changed CPUID constants to defines 2010-10-07 16:39:31 +00:00
Stanislav Shwartsman
e3431a98e6 Bugfix for 32-bit shift/rotate in 64-bit mode 2010-10-01 09:13:21 +00:00
Stanislav Shwartsman
dcc11e1b85 naming change 2010-09-28 14:18:58 +00:00
Stanislav Shwartsman
f2a87171c1 Fixed BX_INSTR_OPCODE callback, now its implementation closer to original definition. 
New, updated definition of the callback:

	void bx_instr_opcode(unsigned cpu, const Bit8u *opcode, unsigned len, bx_bool is32, bx_bool is64);

The  callback  is  called  each  time, when Bochs completes  to  decode  a new
instruction.  Through  this callback function Bochs could provide an opcode of
the instruction, opcode length and an execution mode (16/32/64).

Please note, that Bochs uses translation  caches so each simulated instruction
might be executed multiple times but decoded only once.
 2010-09-27 15:29:36 +00:00
Stanislav Shwartsman
9ed116ada7 avoid similar issues (like it was in mmx.cc) in future 2010-09-26 20:35:24 +00:00
Stanislav Shwartsman
471d33fc1d fix BE issue 2010-09-26 20:20:27 +00:00
Stanislav Shwartsman
f655e33779 imm mode2 could be only with imm_mode1 2010-09-25 10:17:04 +00:00
Stanislav Shwartsman
75f2ae9c18 fetchdecode simplification rework 2010-09-25 09:55:40 +00:00
Stanislav Shwartsman
8308a47168 trying to get rid of b1() in instruction class 2010-09-24 21:15:16 +00:00
Stanislav Shwartsman
369aba757d style change 2010-09-23 20:38:02 +00:00
Stanislav Shwartsman
e0fcc80ec3 introduce bswap functions, big endian fix for CPUID 2010-09-20 20:43:16 +00:00
Stanislav Shwartsman
a0705392d3 Fixed failure on BE hosts 2010-09-12 17:33:34 +00:00
Stanislav Shwartsman
1107ce138e small fetchdecode optimization 2010-09-07 19:54:50 +00:00
Stanislav Shwartsman
31e8bfc5a7 Fixed fsgsbase cpuid bit 2010-07-22 20:19:00 +00:00
Stanislav Shwartsman
55cb12badf fixed missed canonical failure on system access 2010-07-22 20:12:25 +00:00
Stanislav Shwartsman
91ac0df65c implemented GS/FS BASE access instructions published in _319433-007.pdf document 2010-07-22 16:41:59 +00:00
Stanislav Shwartsman
7f7c249934 disasm and some cpuid code according to recently published AVX_319433-007.pdf document 2010-07-22 15:12:08 +00:00
Stanislav Shwartsman
cd6314b65c Added ability to configure CPUID stepping through .bochsrc. 
Next is CPUID model/extended model.
 2010-07-16 21:03:52 +00:00
Stanislav Shwartsman
59ad9d8de8 Fixes 2010-07-15 20:18:03 +00:00
Stanislav Shwartsman
41ddb26c6f Fixed save/restore of x87 regs 2010-07-01 20:00:33 +00:00
Stanislav Shwartsman
4cf15cd18b Fixed RDTSCP VMEXIT reason 2010-07-01 16:31:46 +00:00
Stanislav Shwartsman
d47c84320a swap bits in instr 2010-06-29 19:38:56 +00:00
Stanislav Shwartsman
8e94474e03 bug fix 2010-06-21 05:35:45 +00:00
Stanislav Shwartsman
8099effaf5 typo 2010-06-18 14:24:45 +00:00
Stanislav Shwartsman
9ec1d79b8c warning fix 2010-06-18 14:15:53 +00:00
Stanislav Shwartsman
eaa2e0e0ea [PATCH] cpu/init.cc: proper CPL restore in after_restore_statE 2010-06-04 20:31:04 +00:00
Stanislav Shwartsman
23a28d2892 Fixed compilation with vs2008 2010-06-03 19:36:13 +00:00
Stanislav Shwartsman
f3980b522f bugfux 2010-06-02 05:44:12 +00:00
Stanislav Shwartsman
67aec1dc22 warning fix 2010-05-26 18:37:54 +00:00
Stanislav Shwartsman
84880793f3 optimize for speed 2010-05-26 18:34:25 +00:00
Stanislav Shwartsman
95df639614 compilation fix 2010-05-25 18:52:01 +00:00
Stanislav Shwartsman
8d8d1590f5 fetchdecide rework for AVX (0xF3 SSE prefix encoded as 2 in VEX) 2010-05-23 19:17:41 +00:00
Stanislav Shwartsman
b2dffd9258 undo incorrect change for ia32_feature_control msr init 2010-05-23 05:32:00 +00:00
Stanislav Shwartsman
c21a8fd935 sse4.2 string instruction do not required aligned mem access 2010-05-22 19:55:12 +00:00
Stanislav Shwartsman
1c00193616 cleanup 2010-05-22 10:43:39 +00:00
Stanislav Shwartsman
b6c26d394c enable VMX lock bit - required for VMXON 2010-05-22 10:21:31 +00:00
Stanislav Shwartsman
d8b1d60239 when in HLT run time faster for single cpu 2010-05-22 10:17:58 +00:00
Stanislav Shwartsman
fff0a79aea a little simpler fetchdecode 2010-05-21 21:17:32 +00:00
Stanislav Shwartsman
3dfcfd0ccd Split shift opcodes | optimize SAR opcode 2010-05-18 07:28:05 +00:00
Stanislav Shwartsman
32ff6e4879 MSR BX_DEBUG prints 2010-05-16 13:56:22 +00:00
Stanislav Shwartsman
05bbbb1a2c compilation fix 2010-05-16 05:23:18 +00:00
Volker Ruppert
cdb7e0eb96 - fixed usage of variable 'apic_id_mask' for compatibility with win32 plugin target 2010-05-15 09:23:50 +00:00
Stanislav Shwartsman
9c69b15ecb fetchdecode tables reorg phase1 2010-05-13 05:38:24 +00:00