cleanup
This commit is contained in:
Stanislav Shwartsman
parent
b6c26d394c
commit
1c00193616
@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.678 2010-05-21 21:17:32 sshwarts Exp $
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// $Id: cpu.h,v 1.679 2010-05-22 10:43:39 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2010 The Bochs Project
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@ -2346,39 +2346,6 @@ public: // for now...
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BX_SMF void INVVPID(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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/* VMXx2 */
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/*** Duplicate SSE instructions ***/
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// Although in implementation, these instructions are aliased to the
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// another function, it's nice to have them call a separate function when
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// the decoder is being tested in stand-alone mode.
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#ifdef STAND_ALONE_DECODER
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BX_SMF void MOVUPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVUPD_WpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVAPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVAPD_WpdVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVDQU_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVDQU_WdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVDQA_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVDQA_WdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PUNPCKHDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PUNPCKLDQ_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void ANDPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void ANDNPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void ORPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void XORPD_VpdWpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PAND_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PANDN_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void POR_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void PXOR_VdqWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void UNPCKHPD_VpdWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void UNPCKLPD_VpdWdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVLPD_VsdMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVLPD_MqVsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVHPD_VsdMq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVHPD_MqVsd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVNTPD_MdqVpd(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void MOVNTDQ_MdqVdq(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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#endif
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BX_SMF void CMPXCHG_XBTS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void CMPXCHG_IBTS(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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BX_SMF void CMPXCHG8B(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode.cc,v 1.270 2010-05-21 21:17:32 sshwarts Exp $
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// $Id: fetchdecode.cc,v 1.271 2010-05-22 10:43:39 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2010 The Bochs Project
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@ -751,17 +751,12 @@ static const BxOpcodeInfo_t BxOpcodeInfo32[512*2*2] = {
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/* 0F 0B /wm */ { BxTraceEnd, BX_IA_UD2A },
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/* 0F 0C /wr */ { 0, BX_IA_ERROR },
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/* 0F 0C /wm */ { 0, BX_IA_ERROR },
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/* 0F 0D /wr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0D /wm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0E /wr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /wm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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#if BX_SUPPORT_3DNOW
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/* 0F 0F /wr */ { BxImmediate_Ib, BX_IA_ERROR },
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/* 0F 0F /wm */ { BxImmediate_Ib, BX_IA_ERROR },
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#else
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/* 0F 0F /wr */ { 0, BX_IA_ERROR },
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/* 0F 0F /wm */ { 0, BX_IA_ERROR },
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#endif
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/* 0F 0D /wr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0D /wm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0E /wr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /wm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0F /wr */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 0F /wm */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 10 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 10 /wm */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsM, BxOpcodeGroupSSE_0f10M },
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/* 0F 11 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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@ -1834,17 +1829,12 @@ static const BxOpcodeInfo_t BxOpcodeInfo32[512*2*2] = {
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/* 0F 0B /dm */ { BxTraceEnd, BX_IA_UD2A },
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/* 0F 0C /dr */ { 0, BX_IA_ERROR },
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/* 0F 0C /dm */ { 0, BX_IA_ERROR },
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/* 0F 0D /dr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0D /dm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0E /dr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /dm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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#if BX_SUPPORT_3DNOW
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/* 0F 0F /dr */ { BxImmediate_Ib, BX_IA_ERROR },
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/* 0F 0F /dm */ { BxImmediate_Ib, BX_IA_ERROR },
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#else
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/* 0F 0F /dr */ { 0, BX_IA_ERROR },
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/* 0F 0F /dm */ { 0, BX_IA_ERROR },
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#endif
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/* 0F 0D /dr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0D /dm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0E /dr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /dm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0F /dr */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 0F /dm */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 10 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 10 /dm */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsM, BxOpcodeGroupSSE_0f10M },
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/* 0F 11 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: fetchdecode64.cc,v 1.265 2010-05-21 21:17:32 sshwarts Exp $
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// $Id: fetchdecode64.cc,v 1.266 2010-05-22 10:43:39 sshwarts Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001-2010 The Bochs Project
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@ -695,17 +695,12 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3*2] = {
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/* 0F 0B /wm */ { BxTraceEnd, BX_IA_UD2A },
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/* 0F 0C /wr */ { 0, BX_IA_ERROR },
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/* 0F 0C /wm */ { 0, BX_IA_ERROR },
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/* 0F 0D /wr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0D /wm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0E /wr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /wm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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#if BX_SUPPORT_3DNOW
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/* 0F 0F /wr */ { BxImmediate_Ib, BX_IA_ERROR },
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/* 0F 0F /wm */ { BxImmediate_Ib, BX_IA_ERROR },
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#else
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/* 0F 0F /wr */ { 0, BX_IA_ERROR },
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/* 0F 0F /wm */ { 0, BX_IA_ERROR },
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#endif
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/* 0F 0D /wr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0D /wm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0E /wr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /wm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0F /wr */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 0F /wm */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 10 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 10 /wm */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsM, BxOpcodeGroupSSE_0f10M },
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/* 0F 11 /wr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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@ -1727,17 +1722,12 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3*2] = {
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/* 0F 0B /dm */ { BxTraceEnd, BX_IA_UD2A },
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/* 0F 0C /dr */ { 0, BX_IA_ERROR },
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/* 0F 0C /dm */ { 0, BX_IA_ERROR },
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/* 0F 0D /dr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0D /dm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0E /dr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /dm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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#if BX_SUPPORT_3DNOW
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/* 0F 0F /dr */ { BxImmediate_Ib, BX_IA_ERROR },
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/* 0F 0F /dm */ { BxImmediate_Ib, BX_IA_ERROR },
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#else
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/* 0F 0F /dr */ { 0, BX_IA_ERROR },
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/* 0F 0F /dm */ { 0, BX_IA_ERROR },
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#endif
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/* 0F 0D /dr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0D /dm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0E /dr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /dm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0F /dr */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 0F /dm */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 10 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 10 /dm */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsM, BxOpcodeGroupSSE_0f10M },
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/* 0F 11 /dr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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@ -2759,17 +2749,12 @@ static const BxOpcodeInfo_t BxOpcodeInfo64[512*3*2] = {
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/* 0F 0B /qm */ { BxTraceEnd, BX_IA_UD2A },
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/* 0F 0C /qr */ { 0, BX_IA_ERROR },
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/* 0F 0C /qm */ { 0, BX_IA_ERROR },
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/* 0F 0D /qr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0D /qm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCH on AMD, NOP on Intel
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/* 0F 0E /qr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /qm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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#if BX_SUPPORT_3DNOW
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/* 0F 0F /qr */ { BxImmediate_Ib, BX_IA_ERROR },
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/* 0F 0F /qm */ { BxImmediate_Ib, BX_IA_ERROR },
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#else
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/* 0F 0F /qr */ { 0, BX_IA_ERROR },
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/* 0F 0F /qm */ { 0, BX_IA_ERROR },
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#endif
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/* 0F 0D /qr */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0D /qm */ { 0, BX_IA_PREFETCHW }, // 3DNow! PREFETCHW on AMD, NOP on Intel
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/* 0F 0E /qr */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0E /qm */ { 0, BX_IA_FEMMS }, // 3DNow! FEMMS
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/* 0F 0F /qr */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 0F /qm */ { BxImmediate_Ib, BX_IA_ERROR }, // 3DNow! Opcode Table
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/* 0F 10 /qr */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsR, BxOpcodeGroupSSE_0f10R },
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/* 0F 10 /qm */ { BxPrefixSSE, BX_IA_MOVUPS_VpsWpsM, BxOpcodeGroupSSE_0f10M },
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/* 0F 11 /qr */ { BxPrefixSSE, BX_IA_MOVUPS_WpsVpsR, BxOpcodeGroupSSE_0f11R },
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